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SPI Sniffer misses clock signal changes #141
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Hi JYouren. Bus Pirate v3.5 Could you please write a link to the firmware you are using? http://dangerousprototypes.com/forum/index.php?topic=8498.msg67164#msg67164 Be seeing you. U.Sb |
I was using the latest firmware you had posted which sets the bus pirate to the higher usb com speed by default 115200 from the bus pirate forums. From beginning of this year I think. |
Hi JYouren. Be seeing you. U.Sb |
I believe it was one early this year. It looks to me potentially to be a limitation with the hardware? The SPI communication was very quick - and looking at the source code for the SPI sniffer, I couldn't see any scenarios where it would not work correctly. |
Hi JYouren. http://dangerousprototypes.com/forum/index.php?topic=6765.0 I do not know if it is a limitation of the hardware or not, I remember using 'official' SPI sniffer exe in order to acquire the data exchanged by an SD card and having obtained congruent data to what was captured with a logic analyzer. |
I am sniffing a SPI device using the 'official' SPI sniffer exe and can see that the SPI data read has missing CS transitions, as confirmed by a logic analyser. For example, this snippet:
5B [5C 00 0x00(41 0x41)5C 0A 0x0A(00 0x00)5C 00 0x00(41 0x41)5C 8A 0x8A(00 0x00)5C C1 0xC1(41 0x41)5C 0A 0x0A(00 0x00)5D ]
5B [5C 00 0x00(01 0x01)5C 0A 0x0A(00 0x00)5C 00 0x00(01 0x01)5C 0A 0x0A(00 0x00)5D ]
5B [5C 00 0x00(41 0x41)5C D7 0xD7(00 0x00)5D ]
I would expect them to be structured similarly to
5B [5C 28 0x28(00 0x00)5C 00 0x00(00 0x00)5D ]
which some are.
The logic analyser shows clear CS transitions for every 2 MOSI bytes, where first byte is command/register, second byte is data. CS high lasts for about 1.148us, where low lasts around 19.103us. MOSI and MISO data otherwise seems ok.
Serial speed: 2000000
Bus Pirate v3.5
Community Firmware v7.1 - goo.gl/gCzQnW [HiZ 1-WIRE UART I2C SPI 2WIRE 3WIRE KEYB LCD PIC DIO] Bootloader v4.4
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