From e45345f372b6df0b3c2c4b5309331e15711d9016 Mon Sep 17 00:00:00 2001
From: sinceforYy <1017657683@qq.com>
Date: Mon, 9 Sep 2024 10:50:30 +0800
Subject: [PATCH] fix(Kconfig): use RV_AIA instead of RV_IMSIC

---
 configs/riscv64-dual-xs-ref_defconfig |  1 -
 configs/riscv64-xs-ref_defconfig      |  1 -
 src/cpu/difftest/ref.c                |  4 ++--
 src/isa/riscv64/Kconfig               |  5 -----
 src/isa/riscv64/include/isa-def.h     |  4 ++--
 src/isa/riscv64/init.c                |  4 ++--
 src/isa/riscv64/local-include/csr.h   | 28 +++++++++++++--------------
 src/isa/riscv64/reg.c                 |  8 ++++----
 src/isa/riscv64/system/intr.c         |  4 ++--
 src/isa/riscv64/system/priv.c         | 10 +++++-----
 10 files changed, 31 insertions(+), 38 deletions(-)

diff --git a/configs/riscv64-dual-xs-ref_defconfig b/configs/riscv64-dual-xs-ref_defconfig
index 390cbf513..beb6be130 100644
--- a/configs/riscv64-dual-xs-ref_defconfig
+++ b/configs/riscv64-dual-xs-ref_defconfig
@@ -28,7 +28,6 @@ CONFIG_RVH=y
 CONFIG_RV_SDTRIG=y
 CONFIG_TRIGGER_NUM=4
 CONFIG_RV_AIA=y
-CONFIG_RV_IMSIC=y
 CONFIG_RV_SSTC=y
 CONFIG_RV_SMRNMI=y
 # CONFIG_RV_SMDBLTRP is not set
diff --git a/configs/riscv64-xs-ref_defconfig b/configs/riscv64-xs-ref_defconfig
index 9d6fdff18..a22508a99 100644
--- a/configs/riscv64-xs-ref_defconfig
+++ b/configs/riscv64-xs-ref_defconfig
@@ -29,7 +29,6 @@ CONFIG_RVH=y
 CONFIG_RV_SDTRIG=y
 CONFIG_TRIGGER_NUM=4
 CONFIG_RV_AIA=y
-CONFIG_RV_IMSIC=y
 CONFIG_RV_SSTC=y
 CONFIG_RV_SMRNMI=y
 # CONFIG_RV_SMDBLTRP is not set
diff --git a/src/cpu/difftest/ref.c b/src/cpu/difftest/ref.c
index 1ca41fd80..bc932694e 100644
--- a/src/cpu/difftest/ref.c
+++ b/src/cpu/difftest/ref.c
@@ -225,9 +225,9 @@ void difftest_raise_nmi_intr(bool hasNMI) {
 }
 
 void difftest_virtual_interrupt_is_hvictl_inject(bool virtualInterruptIsHvictlInject) {
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
   cpu.virtualInterruptIsHvictlInject = virtualInterruptIsHvictlInject;
-#endif
+#endif // CONFIG_RV_AIA
 }
 
 void difftest_enable_debug() {
diff --git a/src/isa/riscv64/Kconfig b/src/isa/riscv64/Kconfig
index 3a7403084..d23a841ca 100644
--- a/src/isa/riscv64/Kconfig
+++ b/src/isa/riscv64/Kconfig
@@ -80,11 +80,6 @@ config RV_AIA
   depends on RVH
   default n
 
-config RV_IMSIC
-  bool "Incoming MSI Controller"
-  depends on RV_AIA
-  default n
-
 config RV_SSTC
   bool "RISC-V Sstc Extension for Supervisor-mode Timer Interrupts"
   default n
diff --git a/src/isa/riscv64/include/isa-def.h b/src/isa/riscv64/include/isa-def.h
index 2dc0c0844..6ecf2b74d 100644
--- a/src/isa/riscv64/include/isa-def.h
+++ b/src/isa/riscv64/include/isa-def.h
@@ -152,9 +152,9 @@ typedef struct {
 #ifdef CONFIG_RV_SMRNMI
   bool hasNMI;
 #endif
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
   bool virtualInterruptIsHvictlInject;
-#endif
+#endif // CONFIG_RV_AIA
 
 } riscv64_CPU_state;
 
diff --git a/src/isa/riscv64/init.c b/src/isa/riscv64/init.c
index d8d48bf4f..d02c0f551 100644
--- a/src/isa/riscv64/init.c
+++ b/src/isa/riscv64/init.c
@@ -114,7 +114,7 @@ void init_isa() {
 #ifdef CONFIG_RVB
   misa->extensions |= ext('b');
 #endif // CONFIG_RVB
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
   miselect->val = 0;
   siselect->val = 0;
   vsiselect->val = 0;
@@ -133,7 +133,7 @@ void init_isa() {
   mtopei->val = 0;
   stopei->val = 0;
   vstopei->val = 0;
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 
   misa->mxl = 2; // XLEN = 64
 
diff --git a/src/isa/riscv64/local-include/csr.h b/src/isa/riscv64/local-include/csr.h
index 4e20d3260..400972daf 100644
--- a/src/isa/riscv64/local-include/csr.h
+++ b/src/isa/riscv64/local-include/csr.h
@@ -177,13 +177,13 @@
 
 
 /** Supervisor Advanced Interrupt Architecture Registers **/
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
   #define CSRS_S_AIA(f) \
     f(siselect , 0x150) f(sireg   , 0x151) \
     f(stopei   , 0x15C) f(stopi   , 0xDB0)
 #else
   #define CSRS_S_AIA(f)
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 
 /** ALL **/
 #define CSRS_S(f) \
@@ -247,7 +247,7 @@
     f(vstval     , 0x243) f(vsip       , 0x244) f(vsatp      , 0x280)
 
   /** Hypervisor and VS AIA Registers **/
-  #ifdef CONFIG_RV_IMSIC
+  #ifdef CONFIG_RV_AIA
     #define CSRS_H_VS_AIA(f) \
       f(vsiselect  , 0x250) f(vsireg     , 0x251) \
       f(vstopei    , 0x25C) f(hvien      , 0x608) \
@@ -255,7 +255,7 @@
       f(hviprio2   , 0x647) f(vstopi     , 0xEB0)
   #else
     #define CSRS_H_VS_AIA(f)
-  #endif // CONFIG_RV_IMSIC
+  #endif // CONFIG_RV_AIA
 
   #ifdef CONFIG_RV_SSTC
     #define CSRS_VS_SSTC(f) \
@@ -418,14 +418,14 @@
 #endif // CONFIG_RV_SDEXT
 
 /** Machine AIA Registers **/
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
   #define CSRS_M_AIA(f) \
   f(mvien      , 0x308) f(mvip       , 0x309) \
   f(miselect   , 0x350) f(mireg      , 0x351) \
   f(mtopei     , 0x35C) f(mtopi      , 0xFB0)
 #else
   #define CSRS_M_AIA(f)
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 
 /**  Machine Non-Maskable Interrupt Handling **/
 #ifdef CONFIG_RV_SMRNMI
@@ -806,7 +806,7 @@ CSR_STRUCT_END(mcontext)
 
 #endif // CONFIG_RV_SDTRIG
 
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
 CSR_STRUCT_START(miselect)
 CSR_STRUCT_END(miselect)
 
@@ -844,7 +844,7 @@ CSR_STRUCT_START(mvip)
   uint64_t pad2 : 3; // [8:6]
   uint64_t seip : 1; // [9]
 CSR_STRUCT_END(mvip)
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 
 /* Supervisor-level CSR */
 
@@ -968,7 +968,7 @@ CSR_STRUCT_END(stimecmp)
 #endif
 
 /** Supervisor Advanced Interrupt Architecture CSRs **/
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
 CSR_STRUCT_START(siselect)
 CSR_STRUCT_END(siselect)
   
@@ -986,7 +986,7 @@ CSR_STRUCT_START(stopi)
   uint64_t pad   : 8;  // [15: 8]
   uint64_t iid   : 12; // [27:16] 
 CSR_STRUCT_END(stopi)
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 
 /* hypervisor and Virtual Supervisor CSR */
 
@@ -1178,7 +1178,7 @@ CSR_STRUCT_END(vsatp)
 #endif // CONFIG_RVH
 
 /** Hypervisor and VS AIA CSRs **/
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
 CSR_STRUCT_START(hvien)
   uint64_t pad    : 13;
 #ifdef CONFIG_RV_SSCOFPMF
@@ -1219,7 +1219,7 @@ CSR_STRUCT_START(vstopi)
   uint64_t pad   : 8;  // [15: 8]
   uint64_t iid   : 12; // [27:16] 
 CSR_STRUCT_END(vstopi)
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 
 /* Unprivileged CSR */
 
@@ -1451,13 +1451,13 @@ MAP(CSRS, CSRS_DECL)
 #define SSTATUS_RMASK (SSTATUS_BASE | SSTATUS_SDT)
 
 /** AIA **/
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
   #define ISELECT_2F_MASK 0x2F
   #define ISELECT_3F_MASK 0x3F
   #define ISELECT_6F_MASK 0x6F
   #define ISELECT_MAX_MASK 0xFF
   #define VSISELECT_MAX_MASK 0x1FF
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 
 /** Double Trap**/
 #ifdef CONFIG_RV_SMRNMI
diff --git a/src/isa/riscv64/reg.c b/src/isa/riscv64/reg.c
index aca32e23d..782024b12 100644
--- a/src/isa/riscv64/reg.c
+++ b/src/isa/riscv64/reg.c
@@ -63,14 +63,14 @@ void isa_reg_display() {
       mideleg->val, medeleg->val);
   printf("mtval: " FMT_WORD " stval: " FMT_WORD " mtvec: " FMT_WORD " stvec: " FMT_WORD "\n",
       mtval->val, stval->val, mtvec->val, stvec->val);
-#ifdef CONFIG_RV_IMSIC 
+#ifdef CONFIG_RV_AIA 
   printf("miselect: " FMT_WORD " siselect: " FMT_WORD " mireg: " FMT_WORD " sireg: " FMT_WORD "\n",
       miselect->val, siselect->val, mireg->val, sireg->val);
   printf("mtopi: " FMT_WORD " stopi: " FMT_WORD " mvien: " FMT_WORD " mvip: " FMT_WORD "\n",
       mtopi->val, stopi->val, mvien->val, mvip->val);
   printf("mtopei: " FMT_WORD " stopei: " FMT_WORD "\n",
       mtopei->val, stopei->val);
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 #ifndef CONFIG_FPU_NONE
   printf("fcsr: " FMT_WORD "\n", cpu.fcsr);
 #endif // CONFIG_FPU_NONE
@@ -83,13 +83,13 @@ void isa_reg_display() {
       hgatp->val, vsscratch->val, cpu.vsstatus, vstvec->val);
   printf("vsepc: " FMT_WORD " vscause: " FMT_WORD " vstval: " FMT_WORD " vsatp: " FMT_WORD "\n",
       vsepc->val, vscause->val, vstval->val, vsatp->val);
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
   printf("hvien: " FMT_WORD " hvictl: " FMT_WORD " hviprio1: " FMT_WORD " hviprio2: " FMT_WORD "\n",
       hvien->val, hvictl->val, hviprio1->val, hviprio2->val);
   printf("vsiselect: " FMT_WORD " vsireg: " FMT_WORD " vstopi: " FMT_WORD "\n",
       vsiselect->val, vsireg->val, vstopi->val);
   printf("vstopei: " FMT_WORD "\n", vstopei->val);
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
   printf("virtualization mode: %ld\n", cpu.v);
 #endif
   printf("privilege mode:%ld\n", cpu.mode);
diff --git a/src/isa/riscv64/system/intr.c b/src/isa/riscv64/system/intr.c
index e91ab4c42..6fdbe1ace 100644
--- a/src/isa/riscv64/system/intr.c
+++ b/src/isa/riscv64/system/intr.c
@@ -105,7 +105,7 @@ word_t raise_intr(word_t NO, vaddr_t epc) {
   bool s_EX_DT = MUXDEF(CONFIG_RV_SSDBLTRP, delegS && mstatus->sdt, false);
   bool m_EX_DT = MUXDEF(CONFIG_RV_SMDBLTRP, delegM && mstatus->mdt, false);
 #ifdef CONFIG_RVH
-  bool virtualInterruptIsHvictlInject = MUXDEF(CONFIG_RV_IMSIC, cpu.virtualInterruptIsHvictlInject, false);
+  bool virtualInterruptIsHvictlInject = MUXDEF(CONFIG_RV_AIA, cpu.virtualInterruptIsHvictlInject, false);
   extern bool hld_st;
   int hld_st_temp = hld_st;
   hld_st = 0;
@@ -116,7 +116,7 @@ word_t raise_intr(word_t NO, vaddr_t epc) {
   if ((delegVS && !vs_EX_DT) || (virtualInterruptIsHvictlInject && !isNMI)){
     if (virtualInterruptIsHvictlInject) {
       vscause->val = NO | INTR_BIT;
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
       cpu.virtualInterruptIsHvictlInject = 0;
 #endif
     } else {
diff --git a/src/isa/riscv64/system/priv.c b/src/isa/riscv64/system/priv.c
index 0a4fc1b7f..4c493c418 100644
--- a/src/isa/riscv64/system/priv.c
+++ b/src/isa/riscv64/system/priv.c
@@ -1020,11 +1020,11 @@ static inline void csr_write(word_t *dest, word_t src) {
     }
 #endif // CONFIG_RV_SSDBLTRP
   }
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
   else if (is_write(mtopi)) { return; }
   else if (is_write(stopi)) { return; }
   else if (is_write(vstopi)) { return; }
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 #else
   if (is_write(mstatus)) {
 #ifndef CONFIG_RVH
@@ -1384,7 +1384,7 @@ static inline bool smstateen_extension_permit_check(const word_t *dest_access) {
 
 // AIA extension check
 // !!! Only support in RVH
-#ifdef CONFIG_RV_IMSIC
+#ifdef CONFIG_RV_AIA
 static bool aia_extension_permit_check(const word_t *dest_access) {
   bool has_vi = false;
   if (is_access(stopei)) {
@@ -1450,7 +1450,7 @@ static bool aia_extension_permit_check(const word_t *dest_access) {
   }
   return has_vi;
 }
-#endif // CONFIG_RV_IMSIC
+#endif // CONFIG_RV_AIA
 
 // Fp Vec CSR check
 /**
@@ -1499,7 +1499,7 @@ static inline void csr_permit_check(uint32_t addr, bool is_write) {
   MUXDEF(CONFIG_RV_SMSTATEEN, has_vi |= smstateen_extension_permit_check(dest_access), );
 
   // check aia
-  MUXDEF(CONFIG_RV_IMSIC, has_vi |= aia_extension_permit_check(dest_access), );
+  MUXDEF(CONFIG_RV_AIA, has_vi |= aia_extension_permit_check(dest_access), );
 
   //check satp(satp & hgatp)
   has_vi |= satp_permit_check(dest_access);