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fix(dbltrp): fix sdt/dte interaction logic #3955

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merged 2 commits into from
Nov 28, 2024
Merged

fix(dbltrp): fix sdt/dte interaction logic #3955

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4d585d2
submodule(ready-to-run): Bump spike/nemu ref in ready-to-run
lewislzh Nov 28, 2024
e782efe
fix(dbltrp): fix sdt/dte interaction logic
lewislzh Nov 28, 2024
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2 changes: 1 addition & 1 deletion ready-to-run
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Submodule ready-to-run updated 3 files
+ − riscv64-nemu-interpreter-dual-so
+ − riscv64-nemu-interpreter-so
+ − riscv64-spike-so
11 changes: 8 additions & 3 deletions src/main/scala/xiangshan/backend/fu/NewCSR/MachineLevel.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -500,9 +500,13 @@ class MstatusModule(implicit override val p: Parameters) extends CSRModule("MSta
}
// when DTE is zero, SDT field is read-only zero(write any, read zero, side effect of write 1 is block)
val writeSDT = Wire(Bool())
writeSDT := Mux(this.menvcfg.DTE.asBool, (w.wdataFields.SDT && w.wen) || (wAliasSstatus.wdataFields.SDT && wAliasSstatus.wen), 0.U)
when (!this.menvcfg.DTE) {
regOut.SDT := false.B
writeSDT := (w.wdataFields.SDT && w.wen) || (this.menvcfg.DTE.asBool && wAliasSstatus.wdataFields.SDT && wAliasSstatus.wen)
// menvcfg.DTE only control Smode dbltrp. Thus mstatus.sdt will not control by DTE.
// as sstatus is alias of mstatus, when menvcfg.DTE close write,
// sstatus.sdt cannot lead to shadow write of mstatus.sdt. \
// As a result, we add wmask of sdt, when write source is from alias write.
when (!this.menvcfg.DTE.asBool && wAliasSstatus.wdataFields.SDT && wAliasSstatus.wen ) {
reg.SDT := reg.SDT
}
// SDT and SIE is the same as MDT and MIE
when (writeSDT) {
Expand All @@ -511,6 +515,7 @@ class MstatusModule(implicit override val p: Parameters) extends CSRModule("MSta
// read connection
mstatus :|= regOut
sstatus := mstatus
sstatus.SDT := regOut.SDT && menvcfg.DTE
rdata := mstatus.asUInt
sstatusRdata := sstatus.asUInt
}
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