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recomp.cpp
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recomp.cpp
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#include <cassert>
#include <cstdint>
#include <cstdlib>
#include <cstring>
#include <cinttypes>
#include <unistd.h>
#include <map>
#include <set>
#include <vector>
#include <string>
#include <string_view>
#include "rabbitizer.hpp"
#include "rabbitizer.h"
#include "elf.h"
#if defined(_WIN32) && !defined(__CYGWIN__)
#include <windows.h>
#endif /* _WIN32 && !__CYGWIN__ */
#if !defined(_MSC_VER) && !defined(__CYGWIN__) && !defined(_WIN32)
#define UNIX_PLATFORM
#endif
#ifdef UNIX_PLATFORM
// TODO: determine if any of those headers are not required
#include <csignal>
#include <ctime>
#include <cxxabi.h> // for __cxa_demangle
#include <dlfcn.h> // for dladdr
#include <execinfo.h>
#include <unistd.h>
#endif
#ifndef FULL_TRACEBACK
// Change to non-zero to have full traceback, including names not exported
#define FULL_TRACEBACK 0
#endif
// set this to 1 when testing a new program, to verify that no false function pointers are found
#define INSPECT_FUNCTION_POINTERS 0
#ifndef TRACE
#define TRACE 0
#endif
#define LABELS_64_BIT 1
#ifndef DUMP_INSTRUCTIONS
// Set to non-zero to dump actual disassembly when dumping C code
#define DUMP_INSTRUCTIONS 0
#endif
#define u32be(x) (uint32_t)(((x & 0xff) << 24) + ((x & 0xff00) << 8) + ((x & 0xff0000) >> 8) + ((uint32_t)(x) >> 24))
#define u16be(x) (uint16_t)(((x & 0xff) << 8) + ((x & 0xff00) >> 8))
#define read_u32_be(buf) (uint32_t)(((buf)[0] << 24) + ((buf)[1] << 16) + ((buf)[2] << 8) + ((buf)[3]))
#define UniqueId_cpu_li rabbitizer::InstrId::UniqueId::cpu_USERDEF_00
#define UniqueId_cpu_la rabbitizer::InstrId::UniqueId::cpu_USERDEF_01
using namespace std;
struct Edge {
uint32_t i;
uint8_t function_entry : 1;
uint8_t function_exit : 1;
uint8_t extern_function : 1;
uint8_t function_pointer : 1;
};
struct Insn {
// base instruction
rabbitizer::InstructionCpu instruction;
//
bool is_global_got_memop;
bool no_following_successor;
// patching instructions
bool patched;
// lui pairs
uint32_t patched_addr;
// immediates are 16 bits wide, but they can be either signed or unsigned
// a 32 bits signed member can hold all those possible values
int32_t patched_imms;
rabbitizer::Registers::Cpu::GprO32 lila_dst_reg;
int linked_insn;
union {
uint32_t linked_value;
float linked_float;
};
// jumptable instructions
uint32_t jtbl_addr;
uint32_t num_cases;
rabbitizer::Registers::Cpu::GprO32 index_reg;
// graph
vector<Edge> successors;
vector<Edge> predecessors;
uint64_t b_liveout;
uint64_t b_livein;
uint64_t f_livein;
uint64_t f_liveout;
Insn(uint32_t word, uint32_t vram) : instruction(word, vram) {
this->is_global_got_memop = false;
this->no_following_successor = false;
this->patched = false;
this->patched_addr = 0;
this->patched_imms = 0;
this->lila_dst_reg = rabbitizer::Registers::Cpu::GprO32::GPR_O32_zero;
this->linked_insn = -1;
this->linked_value = 0;
this->jtbl_addr = 0;
this->num_cases = 0;
this->index_reg = rabbitizer::Registers::Cpu::GprO32::GPR_O32_zero;
this->b_liveout = 0;
this->b_livein = 0;
this->f_livein = 0;
this->f_liveout = 0;
}
void patchInstruction(rabbitizer::InstrId::UniqueId instructionId) {
this->patched = true;
RabbitizerInstruction* innerInstr = this->instruction.getCPtr();
innerInstr->uniqueId = (RabbitizerInstrId)(instructionId);
innerInstr->descriptor = &RabbitizerInstrDescriptor_Descriptors[innerInstr->uniqueId];
}
void patchAddress(rabbitizer::InstrId::UniqueId instructionId, uint32_t newAddress) {
this->patchInstruction(instructionId);
this->patched_addr = newAddress;
}
uint32_t getAddress() const {
if (this->patched && this->patched_addr != 0) {
return this->patched_addr;
}
if (this->instruction.hasOperandAlias(rabbitizer::OperandType::cpu_label)) {
return this->instruction.getInstrIndexAsVram();
}
if (this->instruction.isBranch()) {
return this->instruction.getVram() + this->instruction.getBranchOffset();
}
assert(!"unreachable code");
}
void patchImmediate(int32_t newImmediate) {
this->patched = true;
this->patched_imms = newImmediate;
}
int32_t getImmediate() const {
if (this->patched) {
return this->patched_imms;
}
return this->instruction.getProcessedImmediate();
}
std::string disassemble() const {
char buffer[0x1000];
int32_t imm;
switch (this->instruction.getUniqueId()) {
case UniqueId_cpu_li:
imm = this->getImmediate();
if (imm >= 0) {
sprintf(buffer, "li %s, 0x%X", RabbitizerRegister_getNameGpr((int)this->lila_dst_reg),
imm);
} else {
sprintf(buffer, "li %s, %i", RabbitizerRegister_getNameGpr((int)this->lila_dst_reg), imm);
}
return buffer;
case UniqueId_cpu_la:
sprintf(buffer, "la %s, 0x%X", RabbitizerRegister_getNameGpr((int)this->lila_dst_reg),
this->getAddress());
return buffer;
default:
return this->instruction.disassembleInstruction(0);
}
}
};
struct Function {
vector<uint32_t> returns; // points to delay slots
uint32_t end_addr; // address after end
uint32_t nargs;
uint32_t nret;
bool v0_in;
bool referenced_by_function_pointer;
};
bool conservative;
const uint8_t* text_section;
uint32_t text_section_len;
uint32_t text_vaddr;
const uint8_t* rodata_section;
uint32_t rodata_section_len;
uint32_t rodata_vaddr;
const uint8_t* data_section;
uint32_t data_section_len;
uint32_t data_vaddr;
uint32_t bss_section_len;
uint32_t bss_vaddr;
vector<Insn> insns;
set<uint32_t> label_addresses; // labels, both branch labels and jump table labels
vector<uint32_t> got_globals;
vector<uint32_t> got_locals;
uint32_t gp_value;
uint32_t gp_value_adj;
map<uint32_t, string> symbol_names;
vector<pair<uint32_t, uint32_t>> data_function_pointers;
set<uint32_t> la_function_pointers;
map<uint32_t, Function> functions;
uint32_t main_addr;
uint32_t mcount_addr;
uint32_t procedure_table_start;
uint32_t procedure_table_len;
#define FLAG_NO_MEM 1
#define FLAG_VARARG 2
/**
* Struct containing information on external functions that are called using the wrappers in `libc_impl.c`.
*
* name: function name
* params: first char is return type, subsequent chars are argument types. Key to chars used:
* - 'v' void
* - 'i' signed int (int32_t)
* - 'u' unsigned int (uint32_t)
* - 'p' pointer (uintptr_t)
* - 'f' float
* - 'd' double
* - 'l' signed long long (int64_t)
* - 'j' unsigned long long (uint64_t)
* - 't' trampoline
*
* flags: use defines above
*/
const struct ExternFunction {
const char* name;
const char* params;
int flags;
} extern_functions[] = {
{ "exit", "vi", 0 }, // override exit from application
{ "abort", "v", 0 },
{ "sbrk", "pi", 0 },
{ "malloc", "pu", 0 },
{ "calloc", "puu", 0 },
{ "realloc", "ppu", 0 },
{ "free", "vp", 0 },
{ "fscanf", "ipp", FLAG_VARARG },
{ "printf", "ip", FLAG_VARARG },
{ "sprintf", "ipp", FLAG_VARARG },
{ "fprintf", "ipp", FLAG_VARARG },
{ "_doprnt", "ippp", 0 },
{ "strlen", "up", 0 },
{ "open", "ipii", 0 },
{ "creat", "ipi", 0 },
{ "access", "ipi", 0 },
{ "rename", "ipp", 0 },
{ "utime", "ipp", 0 },
{ "flock", "iii", 0 },
{ "chmod", "ipu", 0 },
{ "umask", "ii", FLAG_NO_MEM },
{ "ecvt", "pdipp", 0 },
{ "fcvt", "pdipp", 0 },
{ "sqrt", "dd", FLAG_NO_MEM },
{ "sqrtf", "ff", FLAG_NO_MEM },
{ "atoi", "ip", 0 },
{ "atol", "ip", 0 },
{ "atof", "dp", 0 },
{ "strtol", "ippi", 0 },
{ "strtoul", "uppi", 0 },
{ "strtoll", "lppi", 0 },
{ "strtoull", "jppi", 0 },
{ "strtod", "dpp", 0 },
{ "strchr", "ppi", 0 },
{ "strrchr", "ppi", 0 },
{ "strcspn", "upp", 0 },
{ "strpbrk", "ppp", 0 },
{ "fstat", "iip", 0 },
{ "stat", "ipp", 0 },
{ "ftruncate", "iii", 0 },
{ "truncate", "ipi", 0 },
{ "bcopy", "vppu", 0 },
{ "memcpy", "pppu", 0 },
{ "memccpy", "pppiu", 0 },
{ "read", "iipu", 0 },
{ "write", "iipu", 0 },
{ "fopen", "ppp", 0 },
{ "freopen", "pppp", 0 },
{ "fclose", "ip", 0 },
{ "ftell", "ip", 0 },
{ "rewind", "vp", 0 },
{ "fseek", "ipii", 0 },
{ "lseek", "iiii", 0 },
{ "fflush", "ip", 0 },
{ "fchown", "iiii", 0 },
{ "dup", "ii", 0 },
{ "dup2", "iii", 0 },
{ "pipe", "ip", 0 },
{ "perror", "vp", 0 },
{ "fdopen", "iip", 0 },
{ "memset", "ppiu", 0 },
{ "bcmp", "ippu", 0 },
{ "memcmp", "ippu", 0 },
{ "getpid", "i", FLAG_NO_MEM },
{ "getpgrp", "i", 0 },
{ "remove", "ip", 0 },
{ "unlink", "ip", 0 },
{ "close", "ii", 0 },
{ "strcmp", "ipp", 0 },
{ "strncmp", "ippu", 0 },
{ "strcpy", "ppp", 0 },
{ "strncpy", "pppu", 0 },
{ "strcat", "ppp", 0 },
{ "strncat", "pppu", 0 },
{ "strtok", "ppp", 0 },
{ "strstr", "ppp", 0 },
{ "strdup", "pp", 0 },
{ "toupper", "ii", FLAG_NO_MEM },
{ "tolower", "ii", FLAG_NO_MEM },
{ "gethostname", "ipu", 0 },
{ "isatty", "ii", 0 },
{ "strftime", "upupp", 0 },
{ "times", "ip", 0 },
{ "clock", "i", FLAG_NO_MEM },
{ "ctime", "pp", 0 },
{ "localtime", "pp", 0 },
{ "setvbuf", "ippiu", 0 },
{ "__semgetc", "ip", 0 },
{ "__semputc", "iip", 0 },
{ "fgetc", "ip", 0 },
{ "fgets", "ipip", 0 },
{ "__filbuf", "ip", 0 },
{ "__flsbuf", "iip", 0 },
{ "ungetc", "iip", 0 },
{ "gets", "pp", 0 },
{ "fread", "upuup", 0 },
{ "fwrite", "upuup", 0 },
{ "fputs", "ipp", 0 },
{ "puts", "ip", 0 },
{ "getcwd", "ppu", 0 },
{ "time", "ip", 0 },
{ "bzero", "vpu", 0 },
{ "fp_class_d", "id", FLAG_NO_MEM },
{ "ldexp", "ddi", FLAG_NO_MEM },
{ "__ll_mul", "lll", FLAG_NO_MEM },
{ "__ll_div", "lll", FLAG_NO_MEM },
{ "__ll_rem", "ljl", FLAG_NO_MEM },
{ "__ll_lshift", "llj", FLAG_NO_MEM },
{ "__ll_rshift", "llj", FLAG_NO_MEM },
{ "__ull_div", "jjj", FLAG_NO_MEM },
{ "__ull_rem", "jjj", FLAG_NO_MEM },
{ "__ull_rshift", "jjj", FLAG_NO_MEM },
{ "__d_to_ull", "jd", FLAG_NO_MEM },
{ "__d_to_ll", "ld", FLAG_NO_MEM },
{ "__f_to_ull", "jf", FLAG_NO_MEM },
{ "__f_to_ll", "lf", FLAG_NO_MEM },
{ "__ull_to_f", "fj", FLAG_NO_MEM },
{ "__ll_to_f", "fl", FLAG_NO_MEM },
{ "__ull_to_d", "dj", FLAG_NO_MEM },
{ "__ll_to_d", "dl", FLAG_NO_MEM },
{ "_exit", "vi", 0 },
{ "_cleanup", "v", 0 },
{ "_rld_new_interface", "pu", FLAG_VARARG },
{ "_exithandle", "v", 0 },
{ "_prctl", "ii", FLAG_VARARG },
{ "_atod", "dpii", 0 },
{ "pathconf", "ipi", 0 },
{ "getenv", "pp", 0 },
{ "gettxt", "ppp", 0 },
{ "setlocale", "pip", 0 },
{ "mmap", "ppuiiii", 0 },
{ "munmap", "ipu", 0 },
{ "mprotect", "ipui", 0 },
{ "sysconf", "ii", 0 },
{ "getpagesize", "i", 0 },
{ "strerror", "pi", 0 },
{ "ioctl", "iiu", FLAG_VARARG },
{ "fcntl", "iii", FLAG_VARARG },
{ "signal", "pit", 0 },
{ "sigset", "pit", 0 },
{ "get_fpc_csr", "i", 0 },
{ "set_fpc_csr", "ii", 0 },
{ "setjmp", "ip", 0 },
{ "longjmp", "vpi", 0 },
{ "tempnam", "ppp", 0 },
{ "tmpnam", "pp", 0 },
{ "mktemp", "pp", 0 },
{ "mkstemp", "ip", 0 },
{ "tmpfile", "p", 0 },
{ "wait", "ip", 0 },
{ "kill", "iii", 0 },
{ "execlp", "ip", FLAG_VARARG },
{ "execv", "ipp", 0 },
{ "execvp", "ipp", 0 },
{ "fork", "i", 0 },
{ "system", "ip", 0 },
{ "tsearch", "pppp", 0 },
{ "tfind", "pppp", 0 },
{ "qsort", "vpuut", 0 },
{ "regcmp", "pp", FLAG_VARARG },
{ "regex", "ppp", FLAG_VARARG },
{ "__assert", "vppi", 0 },
{ "twalk", "vpt", 0 },
{ "msync", "ipui", 0 },
{ "mkdir", "ipu", 0 },
{ "fputc", "iip", 0 },
{ "getopt", "iipp", 0 },
{ "link", "ipp", 0 },
{ "vsprintf", "ippp", 0 },
{ "fabs", "dd", FLAG_NO_MEM },
{ "sysid", "ip", 0 },
{ "realpath", "ppp", 0 },
{ "fsync", "ii", 0 },
{ "sleep", "uu", 0 },
{ "socket", "iiii", 0 },
{ "connect", "iipu", 0 },
{ "recv", "iipui", 0 },
{ "send", "iipui", 0 },
{ "shutdown", "iii", 0 },
{ "sscanf", "ipp", FLAG_VARARG },
// C++ functions
{ "__nw__FUi", "pu", 0 },
{ "__dl__FPv", "vp", 0 },
};
void disassemble(void) {
uint32_t i;
RabbitizerConfig_Cfg.misc.omit0XOnSmallImm = true;
RabbitizerConfig_Cfg.misc.opcodeLJust -= 8;
RabbitizerConfig_Cfg.misc.upperCaseImm = false;
insns.reserve(1 + text_section_len / sizeof(uint32_t)); // +1 for dummy instruction
for (i = 0; i < text_section_len; i += sizeof(uint32_t)) {
uint32_t word = read_u32_be(&text_section[i]);
Insn insn(word, text_vaddr + i);
insns.push_back(insn);
}
{
// Add dummy NOP instruction to avoid out of bounds
Insn insn(0x00000000, text_vaddr + i);
insn.no_following_successor = true;
insns.push_back(insn);
}
}
void add_function(uint32_t addr) {
if (addr >= text_vaddr && addr < text_vaddr + text_section_len) {
functions.insert({ addr, {} });
}
}
map<uint32_t, Function>::iterator find_function(uint32_t addr) {
if (functions.size() == 0) {
return functions.end();
}
auto it = functions.upper_bound(addr);
if (it == functions.begin()) {
return functions.end();
}
--it;
return it;
}
rabbitizer::Registers::Cpu::GprO32 get_dest_reg(const Insn& insn) {
switch (insn.instruction.getUniqueId()) {
case rabbitizer::InstrId::UniqueId::cpu_jalr:
// jalr technically modifies rd, so an empty case is here to avoid crashing
break;
case UniqueId_cpu_li:
case UniqueId_cpu_la:
return insn.lila_dst_reg;
default:
if (insn.instruction.modifiesRt()) {
return insn.instruction.GetO32_rt();
} else if (insn.instruction.modifiesRd()) {
return insn.instruction.GetO32_rd();
}
break;
}
return rabbitizer::Registers::Cpu::GprO32::GPR_O32_zero;
}
// try to find a matching LUI for a given register
void link_with_lui(int offset, rabbitizer::Registers::Cpu::GprO32 reg, int mem_imm) {
#define MAX_LOOKBACK 128
// don't attempt to compute addresses for zero offset
// end search after some sane max number of instructions
int end_search = std::max(0, offset - MAX_LOOKBACK);
for (int search = offset - 1; search >= end_search; search--) {
switch (insns[search].instruction.getUniqueId()) {
case rabbitizer::InstrId::UniqueId::cpu_lui:
if (reg == insns[search].instruction.GetO32_rt()) {
goto loop_end;
}
continue;
case rabbitizer::InstrId::UniqueId::cpu_lw:
case rabbitizer::InstrId::UniqueId::cpu_ld:
case rabbitizer::InstrId::UniqueId::cpu_addiu:
case rabbitizer::InstrId::UniqueId::cpu_add:
case rabbitizer::InstrId::UniqueId::cpu_sub:
case rabbitizer::InstrId::UniqueId::cpu_subu:
if (reg == get_dest_reg(insns[search])) {
if ((insns[search].instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_lw) &&
insns[search].instruction.GetO32_rs() == rabbitizer::Registers::Cpu::GprO32::GPR_O32_gp) {
int mem_imm0 = insns[search].instruction.getProcessedImmediate();
uint32_t got_entry = (mem_imm0 + gp_value_adj) / sizeof(uint32_t);
if (got_entry < got_locals.size()) {
// used for static functions
uint32_t addr = got_locals[got_entry] + mem_imm;
insns[search].linked_insn = offset;
insns[search].linked_value = addr;
insns[offset].linked_insn = search;
insns[offset].linked_value = addr;
// Patch instruction to contain full address
insns[search].lila_dst_reg = get_dest_reg(insns[search]);
insns[search].patchAddress(UniqueId_cpu_la, addr);
// Patch instruction to have offset 0
switch (insns[offset].instruction.getUniqueId()) {
case rabbitizer::InstrId::UniqueId::cpu_addiu: {
rabbitizer::Registers::Cpu::GprO32 dst_reg = insns[offset].instruction.GetO32_rt();
insns[offset].patchInstruction(rabbitizer::InstrId::UniqueId::cpu_move);
// Patch the destination register too
insns[offset].instruction.Set_rd(dst_reg);
}
if (addr >= text_vaddr && addr < text_vaddr + text_section_len) {
add_function(addr);
}
goto loop_end;
case rabbitizer::InstrId::UniqueId::cpu_lb:
case rabbitizer::InstrId::UniqueId::cpu_lbu:
case rabbitizer::InstrId::UniqueId::cpu_sb:
case rabbitizer::InstrId::UniqueId::cpu_lh:
case rabbitizer::InstrId::UniqueId::cpu_lhu:
case rabbitizer::InstrId::UniqueId::cpu_sh:
case rabbitizer::InstrId::UniqueId::cpu_lw:
case rabbitizer::InstrId::UniqueId::cpu_sw:
case rabbitizer::InstrId::UniqueId::cpu_ldc1:
case rabbitizer::InstrId::UniqueId::cpu_lwc1:
case rabbitizer::InstrId::UniqueId::cpu_swc1:
insns[offset].patchImmediate(0);
goto loop_end;
default:
assert(0 && "Unsupported instruction type");
}
}
goto loop_end;
} else {
// ignore: reg is pointer, offset is probably struct data member
goto loop_end;
}
}
continue;
case rabbitizer::InstrId::UniqueId::cpu_jr:
if ((insns[search].instruction.GetO32_rs() == rabbitizer::Registers::Cpu::GprO32::GPR_O32_ra) &&
(offset - search >= 2)) {
// stop looking when previous `jr ra` is hit,
// but ignore if `offset` is branch delay slot for this `jr ra`
goto loop_end;
}
continue;
default:
continue;
}
}
loop_end:;
}
// for a given `jalr t9`, find the matching t9 load
void link_with_jalr(int offset) {
// end search after some sane max number of instructions
int end_search = std::max(0, offset - MAX_LOOKBACK);
for (int search = offset - 1; search >= end_search; search--) {
if (get_dest_reg(insns[search]) == rabbitizer::Registers::Cpu::GprO32::GPR_O32_t9) {
// should be a switch with returns
switch (insns[search].instruction.getUniqueId()) {
case rabbitizer::InstrId::UniqueId::cpu_lw:
case UniqueId_cpu_la:
if (insns[search].is_global_got_memop ||
(insns[search].instruction.getUniqueId() == UniqueId_cpu_la)) {
insns[search].linked_insn = offset;
insns[offset].linked_insn = search;
insns[offset].linked_value = insns[search].linked_value;
insns[offset].patchAddress(rabbitizer::InstrId::UniqueId::cpu_jal, insns[search].linked_value);
insns[search].patchInstruction(rabbitizer::InstrId::UniqueId::cpu_nop);
insns[search].is_global_got_memop = false;
add_function(insns[search].linked_value);
}
return;
case rabbitizer::InstrId::UniqueId::cpu_addiu:
if (insns[search].linked_insn != -1) {
uint32_t first = insns[search].linked_insn;
// not describing as patched since instruction not edited
insns[search].linked_insn = offset;
insns[offset].linked_insn = first;
insns[offset].linked_value = insns[search].linked_value;
}
return;
case rabbitizer::InstrId::UniqueId::cpu_ld:
case rabbitizer::InstrId::UniqueId::cpu_addu:
case rabbitizer::InstrId::UniqueId::cpu_add:
case rabbitizer::InstrId::UniqueId::cpu_sub:
case rabbitizer::InstrId::UniqueId::cpu_subu:
return;
default:
break;
}
} else if ((insns[search].instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_jr) &&
(insns[search].instruction.GetO32_rs() == rabbitizer::Registers::Cpu::GprO32::GPR_O32_ra)) {
// stop looking when previous `jr ra` is hit
return;
}
}
}
// TODO: uniformise use of insn vs insns[i]
void pass1(void) {
for (size_t i = 0; i < insns.size(); i++) {
Insn& insn = insns[i];
// TODO: replace with BAL. Or just fix properly
if (insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_bal) {
insn.patchAddress(rabbitizer::InstrId::UniqueId::cpu_jal,
insn.instruction.getVram() + insn.instruction.getBranchOffset());
}
if (insn.instruction.isJump()) {
if (insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_jal ||
insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_j) {
uint32_t target = insn.getAddress();
label_addresses.insert(target);
add_function(target);
} else if (insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_jr) {
// sltiu $at, $ty, z
// sw $reg, offset($sp) (very seldom, one or more, usually in func entry)
// lw $gp, offset($sp) (if PIC, and very seldom)
// beqz $at, .L
// some other instruction (not always)
// lui $at, %hi(jtbl)
// sll $tx, $ty, 2
// addu $at, $at, $tx
// lw $tx, %lo(jtbl)($at)
// nop (code compiled with 5.3)
// addu $tx, $tx, $gp (if PIC)
// jr $tx
// IDO 7.1:
// lw at,offset(gp)
// andi t9,t8,0x3f
// sll t9,t9,0x2
// addu at,at,t9
// lw t9,offset(at)
// addu t9,t9,gp
// jr t9
// IDO 5.3:
// lw at,offset(gp)
// andi t3,t2,0x3f
// sll t3,t3,0x2
// addu at,at,t3
// something
// lw t3,offset(at)
// something
// addu t3,t3,gp
// jr t3
if (i >= 7 && rodata_section != NULL) {
bool is_pic =
(insns[i - 1].instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_addu) &&
(insns[i - 1].instruction.GetO32_rt() == rabbitizer::Registers::Cpu::GprO32::GPR_O32_gp);
bool has_nop =
insns[i - is_pic - 1].instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_nop;
bool has_extra = insns[i - is_pic - has_nop - 5].instruction.getUniqueId() !=
rabbitizer::InstrId::UniqueId::cpu_beqz;
int lw = i - (int)is_pic - (int)has_nop - 1;
if (insns[lw].instruction.getUniqueId() != rabbitizer::InstrId::UniqueId::cpu_lw) {
--lw;
}
if ((insns[lw].instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_lw) &&
(insns[lw].linked_insn != -1)) {
int sltiu_index = -1;
int andi_index = -1;
uint32_t addu_index = lw - 1;
uint32_t num_cases;
bool found = false;
bool and_variant = false;
int end = 14;
if (insns[addu_index].instruction.getUniqueId() != rabbitizer::InstrId::UniqueId::cpu_addu) {
--addu_index;
}
if (insns[addu_index].instruction.getUniqueId() != rabbitizer::InstrId::UniqueId::cpu_addu) {
goto skip;
}
if (insns[addu_index - 1].instruction.getUniqueId() != rabbitizer::InstrId::UniqueId::cpu_sll) {
goto skip;
}
if (get_dest_reg(insns[addu_index - 1]) != insn.instruction.GetO32_rs()) {
goto skip;
}
for (int j = 3; j <= 4; j++) {
if (insns[lw - j].instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_andi) {
andi_index = lw - j;
break;
}
}
if (i == 368393) {
// In copt
end = 18;
}
for (int j = 5; j <= end; j++) {
if ((insns[lw - has_extra - j].instruction.getUniqueId() ==
rabbitizer::InstrId::UniqueId::cpu_sltiu) &&
(insns[lw - has_extra - j].instruction.GetO32_rt() ==
rabbitizer::Registers::Cpu::GprO32::GPR_O32_at)) {
sltiu_index = j;
break;
}
if (insns[lw - has_extra - j].instruction.getUniqueId() ==
rabbitizer::InstrId::UniqueId::cpu_jr) {
// Prevent going into a previous switch
break;
}
}
if (sltiu_index != -1) {
andi_index = -1;
}
if (sltiu_index != -1 && insns[lw - has_extra - sltiu_index].instruction.getUniqueId() ==
rabbitizer::InstrId::UniqueId::cpu_sltiu) {
num_cases = insns[lw - has_extra - sltiu_index].instruction.getProcessedImmediate();
found = true;
} else if (andi_index != -1) {
num_cases = insns[andi_index].instruction.getProcessedImmediate() + 1;
found = true;
and_variant = true;
} else if (i == 219382) {
// Special hard case in copt where the initial sltiu is in another basic block
found = true;
num_cases = 13;
} else if (i == 370995) {
// Special hard case in copt where the initial sltiu is in another basic block
found = true;
num_cases = 12;
} else if (i == 37743) {
// Special hard case in edgcpfe where the initial sltiu is in another basic block
if ((lw == 37740) && (addu_index == 37739)) {
// few extra checks to try to ensure we are in edgcpfe
if ((insns[lw].instruction.getRaw() == 0x8C3970A4) &&
(insns[addu_index].instruction.getRaw() == 0x00390821)) {
found = true;
num_cases = 6;
}
}
} else if (i == 208684) {
// Special hard case in edgcpfe where the initial sltiu is in another basic block
if ((lw == 208681) && (addu_index == 208680)) {
// few extra checks to try to ensure we are in edgcpfe
if ((insns[lw].instruction.getRaw() == 0x8C2B227C) &&
(insns[addu_index].instruction.getRaw() == 0x002B0821)) {
found = true;
num_cases = 8;
}
}
}
if (found) {
uint32_t jtbl_addr = insns[lw].linked_value;
if (is_pic) {
insns[i - 1].patchInstruction(rabbitizer::InstrId::UniqueId::cpu_nop);
}
insn.jtbl_addr = jtbl_addr;
insn.num_cases = num_cases;
insn.index_reg = insns[addu_index - 1].instruction.GetO32_rt();
insns[lw].patchInstruction(rabbitizer::InstrId::UniqueId::cpu_nop);
insns[addu_index].patchInstruction(rabbitizer::InstrId::UniqueId::cpu_nop);
insns[addu_index - 1].patchInstruction(rabbitizer::InstrId::UniqueId::cpu_nop);
if (!and_variant) {
insns[addu_index - 2].patchInstruction(rabbitizer::InstrId::UniqueId::cpu_nop);
}
if (jtbl_addr < rodata_vaddr ||
jtbl_addr + num_cases * sizeof(uint32_t) > rodata_vaddr + rodata_section_len) {
fprintf(stderr, "jump table outside rodata\n");
exit(EXIT_FAILURE);
}
for (uint32_t case_index = 0; case_index < num_cases; case_index++) {
uint32_t target_addr = read_u32_be(rodata_section + (jtbl_addr - rodata_vaddr) +
case_index * sizeof(uint32_t));
target_addr += gp_value;
// printf("%08X\n", target_addr);
label_addresses.insert(target_addr);
}
}
skip:;
}
}
} else if (insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_jalr) {
// empty
} else {
assert(!"Unreachable code");
}
} else if (insn.instruction.isBranch()) {
uint32_t target = insn.getAddress();
label_addresses.insert(target);
}
switch (insns[i].instruction.getUniqueId()) {
// find floating point LI
case rabbitizer::InstrId::UniqueId::cpu_mtc1: {
rabbitizer::Registers::Cpu::GprO32 rt = insns[i].instruction.GetO32_rt();
for (int s = i - 1; s >= 0; s--) {
switch (insns[s].instruction.getUniqueId()) {
case rabbitizer::InstrId::UniqueId::cpu_lui:
if (insns[s].instruction.GetO32_rt() == rt) {
float f;
uint32_t lui_imm = insns[s].instruction.getProcessedImmediate() << 16;
memcpy(&f, &lui_imm, sizeof(f));
// link up the LUI with this instruction and the float
insns[s].linked_insn = i;
insns[s].linked_float = f;
// rewrite LUI instruction to be LI
insns[s].lila_dst_reg = get_dest_reg(insns[s]);
insns[s].patchInstruction(UniqueId_cpu_li);
insns[s].patchImmediate(lui_imm);
}
goto loop_end;
case rabbitizer::InstrId::UniqueId::cpu_lw:
case rabbitizer::InstrId::UniqueId::cpu_ld:
case rabbitizer::InstrId::UniqueId::cpu_lh:
case rabbitizer::InstrId::UniqueId::cpu_lhu:
case rabbitizer::InstrId::UniqueId::cpu_lb:
case rabbitizer::InstrId::UniqueId::cpu_lbu:
case rabbitizer::InstrId::UniqueId::cpu_addiu:
if (rt == insns[s].instruction.GetO32_rt()) {
goto loop_end;
}
continue;
case rabbitizer::InstrId::UniqueId::cpu_add:
case rabbitizer::InstrId::UniqueId::cpu_sub:
case rabbitizer::InstrId::UniqueId::cpu_subu:
if (rt == insns[s].instruction.GetO32_rd()) {
goto loop_end;
}
continue;
case rabbitizer::InstrId::UniqueId::cpu_jr:
if (insns[s].instruction.GetO32_rs() == rabbitizer::Registers::Cpu::GprO32::GPR_O32_ra) {
goto loop_end;
}
continue;
default:
continue;
}
}
loop_end:;
} break;
case rabbitizer::InstrId::UniqueId::cpu_sd:
case rabbitizer::InstrId::UniqueId::cpu_sw:
case rabbitizer::InstrId::UniqueId::cpu_sh:
case rabbitizer::InstrId::UniqueId::cpu_sb:
case rabbitizer::InstrId::UniqueId::cpu_lb:
case rabbitizer::InstrId::UniqueId::cpu_lbu:
case rabbitizer::InstrId::UniqueId::cpu_ld:
case rabbitizer::InstrId::UniqueId::cpu_ldl:
case rabbitizer::InstrId::UniqueId::cpu_ldr:
case rabbitizer::InstrId::UniqueId::cpu_lh:
case rabbitizer::InstrId::UniqueId::cpu_lhu:
case rabbitizer::InstrId::UniqueId::cpu_lw:
case rabbitizer::InstrId::UniqueId::cpu_lwu:
case rabbitizer::InstrId::UniqueId::cpu_ldc1:
case rabbitizer::InstrId::UniqueId::cpu_lwc1:
case rabbitizer::InstrId::UniqueId::cpu_lwc2:
case rabbitizer::InstrId::UniqueId::cpu_swc1:
case rabbitizer::InstrId::UniqueId::cpu_swc2: {
rabbitizer::Registers::Cpu::GprO32 mem_rs = insns[i].instruction.GetO32_rs();
int32_t mem_imm = insns[i].instruction.getProcessedImmediate();
if (mem_rs == rabbitizer::Registers::Cpu::GprO32::GPR_O32_gp) {
unsigned int got_entry = (mem_imm + gp_value_adj) / sizeof(unsigned int);
if (got_entry >= got_locals.size()) {
got_entry -= got_locals.size();
if (got_entry < got_globals.size()) {
assert(insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_lw);
unsigned int dest_vaddr = got_globals[got_entry];
insns[i].is_global_got_memop = true;
insns[i].linked_value = dest_vaddr;
// patch to LA
insns[i].lila_dst_reg = get_dest_reg(insns[i]);
insns[i].patchAddress(UniqueId_cpu_la, dest_vaddr);
}
}
} else {
link_with_lui(i, mem_rs, mem_imm);
}
} break;
case rabbitizer::InstrId::UniqueId::cpu_addiu:
case rabbitizer::InstrId::UniqueId::cpu_ori: {
// could be insn?
rabbitizer::Registers::Cpu::GprO32 rt = insns[i].instruction.GetO32_rt();
rabbitizer::Registers::Cpu::GprO32 rs = insns[i].instruction.GetO32_rs();
int32_t imm = insns[i].instruction.getProcessedImmediate();
if (rs == rabbitizer::Registers::Cpu::GprO32::GPR_O32_zero) { // becomes LI
insns[i].lila_dst_reg = get_dest_reg(insns[i]);
insns[i].patchInstruction(UniqueId_cpu_li);
insns[i].patchImmediate(imm);
} else if (rt != rabbitizer::Registers::Cpu::GprO32::GPR_O32_gp) { // only look for LUI if rt and rs are
// the same
link_with_lui(i, rs, imm);
}
} break;
case rabbitizer::InstrId::UniqueId::cpu_jalr: {
rabbitizer::Registers::Cpu::GprO32 rs = insn.instruction.GetO32_rs();
if (rs == rabbitizer::Registers::Cpu::GprO32::GPR_O32_t9) {
link_with_jalr(i);
if (insn.linked_insn != -1) {
insn.patchAddress(rabbitizer::InstrId::UniqueId::cpu_jal, insn.linked_value);
label_addresses.insert(insn.linked_value);