From c32dc0729bffe3307d2d418fb7686aa1a34a2be3 Mon Sep 17 00:00:00 2001 From: Roman Leonov Date: Mon, 18 Nov 2024 14:32:58 +0100 Subject: [PATCH] feature(esp_tinyusb): Added DMA mode configuration for dcd_dwc2 layer --- device/esp_tinyusb/CHANGELOG.md | 4 ++++ device/esp_tinyusb/Kconfig | 22 +++++++++++++++++++--- device/esp_tinyusb/include/tusb_config.h | 24 ++++++++++++++++++++++++ 3 files changed, 47 insertions(+), 3 deletions(-) diff --git a/device/esp_tinyusb/CHANGELOG.md b/device/esp_tinyusb/CHANGELOG.md index 17010403..3ed34ab0 100644 --- a/device/esp_tinyusb/CHANGELOG.md +++ b/device/esp_tinyusb/CHANGELOG.md @@ -1,3 +1,7 @@ +## 1.5.0 (Unreleased) + +- esp_tinyusb: Added DMA mode option to tinyusb DCD DWC2 configuration + ## 1.4.5 - CDC-ACM: Fixed memory leak at VFS unregister diff --git a/device/esp_tinyusb/Kconfig b/device/esp_tinyusb/Kconfig index 9edbce1b..c12c79fa 100644 --- a/device/esp_tinyusb/Kconfig +++ b/device/esp_tinyusb/Kconfig @@ -17,6 +17,20 @@ menu "TinyUSB Stack" bool "HS" endchoice + menu "TinyUSB DCD" + choice TINYUSB_MODE + prompt "DCD Mode" + default TINYUSB_MODE_DMA + help + TinyUSB DCD DWC2 Driver supports two modes: Slave mode (based on IRQ) and Buffer DMA mode. + + config TINYUSB_MODE_SLAVE + bool "Slave/IRQ" + config TINYUSB_MODE_DMA + bool "Buffer DMA" + endchoice + endmenu # "TinyUSB DCD" + menu "TinyUSB task configuration" config TINYUSB_NO_DEFAULT_TASK bool "Do not create a TinyUSB task" @@ -71,7 +85,7 @@ menu "TinyUSB Stack" This is especially useful in multicore scenarios, when we need to pin the task to a specific core and, at the same time initialize TinyUSB stack (i.e. install interrupts) on the same core. - endmenu + endmenu # "TinyUSB task configuration" menu "Descriptor configuration" comment "You can provide your custom descriptors via tinyusb_driver_install()" @@ -151,8 +165,10 @@ menu "TinyUSB Stack" config TINYUSB_MSC_BUFSIZE depends on TINYUSB_MSC_ENABLED int "MSC FIFO size" - default 512 - range 64 10000 + default 512 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 + default 8192 if IDF_TARGET_ESP32P4 + range 64 8192 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 + range 64 32768 if IDF_TARGET_ESP32P4 help MSC FIFO size, in bytes. diff --git a/device/esp_tinyusb/include/tusb_config.h b/device/esp_tinyusb/include/tusb_config.h index 71e76fd9..32afa788 100644 --- a/device/esp_tinyusb/include/tusb_config.h +++ b/device/esp_tinyusb/include/tusb_config.h @@ -90,6 +90,30 @@ extern "C" { # define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE | OPT_MODE_FULL_SPEED #endif +// ------------------------------------------------------------------------ +// DCD DWC2 Mode +// ------------------------------------------------------------------------ +#define CFG_TUD_DWC2_SLAVE_ENABLE 1 // Enable Slave/IRQ by default + +// ------------------------------------------------------------------------ +// DMA & Cache +// ------------------------------------------------------------------------ +#ifdef CONFIG_TINYUSB_MODE_DMA +// DMA Mode has a priority over Slave/IRQ mode and will be used if hardware supports it +#define CFG_TUD_DWC2_DMA_ENABLE 1 // Enable DMA + +#if CONFIG_CACHE_L1_CACHE_LINE_SIZE +// To enable the dcd_dcache clean/invalidate/clean_invalidate calls +# define CFG_TUD_MEM_DCACHE_ENABLE 1 +#define CFG_TUD_MEM_DCACHE_LINE_SIZE CONFIG_CACHE_L1_CACHE_LINE_SIZE +// NOTE: starting with esp-idf v5.3 there is specific attribute present: DRAM_DMA_ALIGNED_ATTR +# define CFG_TUSB_MEM_SECTION __attribute__((aligned(CONFIG_CACHE_L1_CACHE_LINE_SIZE))) DRAM_ATTR +#else +# define CFG_TUD_MEM_CACHE_ENABLE 0 +# define CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) DRAM_ATTR +#endif // CONFIG_CACHE_L1_CACHE_LINE_SIZE +#endif // CONFIG_TINYUSB_MODE_DMA + #define CFG_TUSB_OS OPT_OS_FREERTOS /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.