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[CIR][NFC] move data member pointer lowering to CXXABI #1130

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@Lancern Lancern commented Nov 15, 2024

This PR moves the lowering code for data member pointers from the conversion patterns to the implementation of CXXABI because this part should be ABI-specific.

mlir::Value loweredAddr, mlir::Value loweredMember,
mlir::OpBuilder &builder) const {
auto llvmElementTy = mlir::IntegerType::get(op.getContext(), 8);
return builder.create<mlir::LLVM::GEPOp>(
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We should not assume LLVM lowering at this level and emit a GEP here, target lowering is supposed to understand CIR to CIR. In theory CIR types and etc should be already on the right ABI, so that LLVM lowering has no extra work. Have you tried only returning the necessary information for lower to LLVM to emit the GEP?

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In theory CIR types and etc should be already on the right ABI, so that LLVM lowering has no extra work.

Basically this PR does ABI lowering work. Thus I'm thinking that I should move the changes here to some prior pass that do ABI lowering works. LoweringPrepare seems good to me at first but I found it a bit difficult to lower type, attributes, and ops all at the same time there, and I'm not sure whether it's conceptually right to do ABI lowering during LoweringPrepare. Should we invent a new ABI lowering pass for this kind of stuff? CallConvLowering already does some ABI related lowering but that's for function calls and function signatures only.

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It's still fine if these things return CIR-only operations to LowerToLLVM, my understanding is that those will get scheduled to be lowered when the pass continues. Did you try that? Example: when lowering casts we call the rewriter to emit cir::CmpOp, etc.

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Did you try that? Example: when lowering casts we call the rewriter to emit cir::CmpOp, etc.

Wow didn't try this. This is indeed a good way to resolve this if it works. Will try later.

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Updated.

// the class object containing it, represented as a ptrdiff_t
const clang::TargetInfo &target = LM.getTarget();
unsigned width =
target.getTypeWidth(target.getPtrDiffType(clang::LangAS::Default));
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sounds like this method should be about returning width instead? Answering LLVM type questions at this point sounds like layer violation?

bcardosolopes and others added 27 commits November 20, 2024 16:24
The loop was erasing the user of a value while iterating on the value's
users, which results in a use after free. We're already assuming (and
asserting) that there's only one user, so we can just access it directly
instead. CIR/Transforms/Target/x86_64/x86_64-call-conv-lowering-pass.cpp
was failing with ASAN before this change. We're now ASAN-clean except
for llvm#829 (which is also in
progress).
Reland llvm#638

This was reverted due to llvm#655. I
tried to address the problem in the newest commit.

The changes of the PR since the last landed one includes:
- Move the definition of `cir::CIRGenConsumer` to
`clang/include/clang/CIRFrontendAction/CIRGenConsumer.h`, and leave its
`HandleTranslationUnit` interface is left empty. So that
`cir::CIRGenConsumer` won't need to depend on CodeGen any more.
- Change the old definition of `cir::CIRGenConsumer` in
`clang/lib/CIR/FrontendAction/CIRGenAction.cpp` and to
`CIRLoweringConsumer`, inherited from `cir::CIRGenConsumer`, which
implements the original `HandleTranslationUnit` interface.

I feel this may improve the readability more even without my original
patch.
This PR fixes the lowering for multi dimensional arrays.

Consider the following code snippet `test.c`: 
```
void foo() {
  char arr[4][1] = {"a", "b", "c", "d"};
}
```

When ran with `bin/clang test.c -Xclang -fclangir -Xclang -emit-llvm -S
-o -`, It produces the following error:
```
~/clangir/llvm/include/llvm/Support/Casting.h:566: decltype(auto) llvm::cast(const From&) [with To = mlir::ArrayAttr; From = mlir::Attribute]: Assertion `isa<To>(Val) && "cast<Ty>() argument of incompatible type!"' failed.
```

The bug can be traced back to `LoweringHelpers.cpp`. It considers the
values in the array as integer types, and this causes an error in this
case.

This PR updates `convertToDenseElementsAttrImpl` when the array contains
string attributes. I have also added one more similar test. Note that in
the tests I used a **literal match** to avoid matching as regex, so
`!dbg` is useful.
Support expressions at the top level such as

const unsigned int n = 1234;
const int &r = (const int&)n;

Reviewers: bcardosolopes

Pull Request: llvm#857
Fix llvm#829

Thanks @smeenai for pointing out the root cause and UBSan failure!
As title.
Also introduced buildAArch64NeonCall skeleton, which is partially the
counterpart of OG's EmitNeonCall. And this could be use for many other
neon intrinsics.

---------

Co-authored-by: Guojin He <[email protected]>
This PR adds aarch64 big endian support.

Basically the support for aarch64_be itself is expressed only in two
extra cases for the switch statement and changes in the `CIRDataLayout`
are needed to prove that we really support big endian. Hence the idea
for the test - I think the best way for proof is something connected
with bit-fields, so we compare the results of the original codegen and
ours.
This PR splits the old `cir-simplify` pass into two new passes, namely
`cir-canonicalize` and `cir-simplify` (the new `cir-simplify`). The
`cir-canonicalize` pass runs transformations that do not affect
CIR-to-source fidelity much, such as operation folding and redundant
operation elimination. On the other hand, the new `cir-simplify` pass
runs transformations that may significantly change the code and break
high-level code analysis passes, such as more aggresive code
optimizations.

This PR also updates the CIR-to-CIR pipeline to fit these two new
passes. The `cir-canonicalize` pass is moved to the very front of the
pipeline, while the new `cir-simplify` pass is moved to the back of the
pipeline (but still before lowering prepare of course). Additionally,
the new `cir-simplify` now only runs when the user specifies a non-zero
optimization level on the frontend.

Also fixed some typos and resolved some `clang-tidy` complaints along
the way.

Resolves llvm#827 .
Currently the C style cast is not implemented/supported for unions.

This PR adds support for union casts as done in `CGExprAgg.cpp`. I have
also added an extra test in `union-init.c`.
Mistakenly closed llvm#850

llvm#850 (review)
 
This PR fixes array initialization for expression arguments. 

Consider the following code snippet `test.c`: 
```
typedef struct {
  int a;
  int b[2];
} A;

int bar() {
  return 42;
}

void foo() {
  A a = {bar(), {}};
}
```
When ran with `bin/clang test.c -Xclang -fclangir -Xclang -emit-cir -S
-o -`, It produces the following error:
```
~/clangir/clang/lib/CIR/CodeGen/CIRGenExprAgg.cpp:483: void {anonymous}::AggExprEmitter::buildArrayInit(cir::Address, mlir::cir::ArrayType, clang::QualType, clang::Expr*, llvm::ArrayRef<clang::Expr*>, clang::Expr*): Assertion `NumInitElements != 0' failed.
```
The error can be traced back to `CIRGenExprAgg.cpp`, and the fix is
simple. It is possible to have an empty array initialization as an
expression argument!
As title, if element type of vector type is sized, then the vector type
should be deemed sized.
This would enable us generate code for neon without triggering assertion
…eon_vrndaq_v (llvm#871)

as title. 
This also added NeonType support for Float32

Co-authored-by: Guojin He <[email protected]>
It will hit another assert when calling initFullExprCleanup.
This PR fixes the case, when a temporary var is used, and `alloca`
operation is inserted in the block start before the `label` operation.
Implementation: when we search for the `alloca` place in a block, we
take label operations into account as well.

Fix llvm#870

---------

Co-authored-by: Bruno Cardoso Lopes <[email protected]>
__attribute__((annotate()) was only accepting integer literals,
preventing some meta-programming usage for example.
This should be extended to some other kinds of types.

---------

Co-authored-by: Bruno Cardoso Lopes <[email protected]>
Just as the title says, but only covers non-exception path, that's
coming next.
Nothing unblocked yet, just hit next assert in the same path.
… exceptions

Code path still hits an assert sooner, incremental NFC step.
ghehg and others added 15 commits November 20, 2024 23:03
…bsOp to take vector input (llvm#1099)

Extend AbsOp to take vector of int input. With it, we can support
__builtin_elementwise_abs.
We should in the next PR extend FpUnaryOps to support vector type input
so we won't have blocker to implement all elementwise builtins
completely. Now just temporarily have missingFeature
`fpUnaryOPsSupportVectorType`.
Currently, int type UnaryOp support vector type. 

FYI:
[clang's documentation about elementwise
builtins](https://clang.llvm.org/docs/LanguageExtensions.html#vector-builtins)
…vm#1102)

This is a NFC patch that moves declaration from  LowerToLLVM.cpp.

The motivation of the patch is, we hope we can use the abilities from
MLIR's standard dialects without lowering **ALL** clangir operation to
MLIR's standard dialects. For example, currently we have 86 operations
in LowerToLLVM.cpp but only 45 operations under though MLIR. It won't be
easy to add proper lowering for all operation to **different** dialects.

I think the solution may be to allow **mixed** IR. So that we can
lowering CIR to MLIR's standard dialects partially and we can use some
existing analysis and optimizations in MLIR and then we can lower all of
them (the MLIR dialects and unlowered clangir) to LLVM IR. The hybrid IR
is one of the goals of MLIR as far as I know.

NOTE: I completely understand that the DirectlyLLVM pipeline is the
tier-1 pipeline that we want to support. The idea above won't change
this. I just want to offer some oppotunities for the downstream projects
and finally some chances to improve the overall ecosystem.
This is going to be raised in follow up work, which is hard to
do in one go because createBaseClassAddr goes of the OG skeleton
and ideally we want ApplyNonVirtualAndVirtualOffset to work naturally.

This also doesn't handle null checks, coming next.
Now that we fixed the dep on VBase, clean up the rest of the function.
It was always the intention for `cir.cmp` operations to return bool
result. Due
to missing constraints, a bug in codegen has slipped in which created
`cir.cmp`
operations with result type that matches the original AST expression
type. In
C, as opposed to C++, boolean expression types are "int". This resulted
with
extra operations being codegened around boolean expressions and their
usage.

This commit both enforces `cir.cmp` in the op definition and fixes the
mentioned bug.
This is the first patch to support TBAA, following the discussion at
llvm#1076 (comment)

- add skeleton for CIRGen, utilizing `decorateOperationWithTBAA`
- add empty implementation in `CIRGenTBAA`
- introduce `CIR_TBAAAttr` with empty body
- attach `CIR_TBAAAttr` to `LoadOp` and `StoreOp`
- no handling of vtable pointer
- no LLVM lowering
)

The title describes the purpose of the PR. It adds initial support for
structures with padding to the call convention lowering for AArch64.

I have also _initial support_ for the missing feature
[FinishLayout](https://github.com/llvm/clangir/blob/5c5d58402bebdb1e851fb055f746662d4e7eb586/clang/lib/AST/RecordLayoutBuilder.cpp#L786)
for records, and the logic is gotten from the original codegen.

Finally, I added a test for verification.
@Lancern Lancern force-pushed the data-member-lowering branch 2 times, most recently from a564ce0 to 02e6c13 Compare November 22, 2024 02:29
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github-actions bot commented Nov 22, 2024

✅ With the latest revision this PR passed the C/C++ code formatter.

@Lancern
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Lancern commented Nov 22, 2024

Fixed format issues and rebased.

…m#1152)

The function `populateCIRToLLVMConversionPatterns` contains a spaghetti
of LLVM dialect conversion patterns, which results in merge conflicts
very easily. Besides, a few patterns are even registered for more than
once, possibly due to careless resolution of merge conflicts.

This PR attempts to mitigate this problem. Pattern names now are sorted
in alphabetical order, and each source code line now only lists exactly
one pattern name to reduce potential merge conflicts.
ghehg and others added 5 commits November 22, 2024 16:31
…ltinExpr (llvm#1133)

This PR is a NFC as we just NYI every builtID of neon SISD. We will
implement them in subsequent PRs.
…CFG (llvm#1147)

This PR implements NYI in CIRScopeOpFlattening. It seems to me the best
way is to let results of ScopeOp forwarded as block arguments of the
last block split from the cir.scope block.
This patch moves the lowering code for data member pointers from the conversion
patterns to the implementation of CXXABI because this part should be ABI-
specific.
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