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[CIR][OpenMP] Implementation of critical directive #675

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Commits on Jan 31, 2024

  1. [CIR][CIRGen] Handle __extension__ keyword (llvm#421)

    Support \_\_extension\_\_ keyword in CIRGen
    YazZz1k authored and lanza committed Jan 31, 2024
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  2. [CIR][CIRGen] Add missing case to 'isNullValue' (llvm#433)

    Support for BoolAttr in isNullValue
    YazZz1k authored and lanza committed Jan 31, 2024
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Commits on Feb 2, 2024

  1. [CIR][CIRGen] Support for section atttribute (llvm#422)

    This PR adds support for section("$name") attribute
    YazZz1k authored and lanza committed Feb 2, 2024
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  2. [CIR][CIRGen][Bugfix] Fix bool zero initialization (llvm#411)

    Support missing zero initialization of Bools
    YazZz1k authored and lanza committed Feb 2, 2024
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  3. [CIR][Lowering] Support conversion of cir.zero to dense consts (llvm#413

    )
    
    Compiling the given c-code
    
    ```
    void foo() {
      int      i [2][1] = { { 1 }, { 0 } };
      long int li[2][1] = { { 1 }, { 0 } };
      float    fl[2][1] = { { 1 }, { 0 } };
      double   d [2][1] = { { 1 }, { 0 } };
    }
    ```
    
    leads to compilation error
    
    ```
    unknown element in ConstArrayAttr
    UNREACHABLE executed at /home/huawei/cir/repo/van/llvm-project/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp:951!
    ```
    
    PR implements conversion the cir.zero attr to dense constant and fixed
    this error.
    YazZz1k authored and lanza committed Feb 2, 2024
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  4. [CIR][CodeGen] Initial support for dynamic_cast (llvm#426)

    This PR introduces CIR CodeGen support for `dynamic_cast`.
    
    The full feature set of `dynamic_cast` is not fully implemented in this
    PR as it's already pretty large. This PR only include support for
    downcasting and sidecasting a pointer or reference. `dynamic_cast<void
    *>` is not yet implemented.
    Lancern authored and lanza committed Feb 2, 2024
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  5. [CIR][CIRGen] Add codegen for branch prediction info builtins (llvm#439)

    Initial support for the following builtins:
    ```
    __builtin_expect
    __builtin_expect_with_probability
    __builtin_unpredictable
    ```
    This PR supports codegen for this builtins on "-O0" compilation
    pipeline.
    YazZz1k authored and lanza committed Feb 2, 2024
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  6. [CIR][CIRGen] Handle ternary op inside if cond (llvm#440)

    Support for ConditionalOperator inside the if condition stmt
    YazZz1k authored and lanza committed Feb 2, 2024
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  8. [CIR][CIRGen] Support dynamic_cast to void ptr (llvm#442)

    This patch adds CIRGen for downcasting a pointer to the complete object
    through `dynamic_cast<void *>`.
    
    Together with llvm#426 , the full functionality of `dynamic_cast` should be
    supported in CIRGen after this PR merges.
    Lancern authored and lanza committed Feb 2, 2024
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  9. [CIR][CodeGen][Lowering] Supports arrays with trailing zeros (llvm#393)

    This PR adds support for constant arrays with trailing zeros.
    
    The original `CodeGen` does the following: once a constant array contain
    trailing zeros, a struct with two members is generated: initialized
    elements and `zeroinitializer` for the remaining part. And depending on
    some conditions, `memset` or `memcpy` are emitted. In the latter case a
    global const array is created.
    Well, we may go this way, but it requires us to implement
    [features](https://github.com/llvm/clangir/blob/main/clang/lib/CIR/CodeGen/CIRGenDecl.cpp#L182)
    that are not implemented yet.
    
    Another option is to add one more parameter to the `constArrayAttr` and
    utilize it during the lowering. So far I chose this way, but if you have
    any doubts, we can discuss here. So we just emit constant array as
    usually and once there are trailing zeros, lower this arrray (i.e. an
    attribute) as a value.
    
    I added a couple of tests and will add more, once we agree on the
    approach. So far I marked the PR as a draft one.
    gitoleg authored and lanza committed Feb 2, 2024
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  10. [CIR][LibOpt] Extend std::find optimization to all calls with raw poi…

    …nters (llvm#400)
    
    This also adds a missing check whether the pointer returned from
    `memchr` is null and changes the result to `last` in that case.
    philnik777 authored and lanza committed Feb 2, 2024
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Commits on Feb 3, 2024

  1. [CIR][CIRGen] Implement "if consteval" code generation (llvm#446)

    Emit the false-branch of the consteval if statement, if any.
    keryell authored and lanza committed Feb 3, 2024
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Commits on Feb 4, 2024

  1. [CIR] Allow mlir::UnknownLoc in function op (llvm#448)

    Originally, the location associated with a function is checked to be an
    `mlir::FileLineColLoc` before the function is lowered to an LLVMIR
    FuncOp. However, runtime function declarations do not have such
    locations. This patch further allows `mlir::UnknownLoc` to be associated
    with a function.
    Lancern authored and lanza committed Feb 4, 2024
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Commits on Feb 5, 2024

  1. [CIR][CodeGen] Const structs with bitfields (llvm#412)

    This PR adds a support for const structs with bitfields.
    Now only global structs are supported, the support of the local ones can
    be added more or less easily - there is one ugly thing need to be done
    though)
    
    So .. what is all about.
    First of all - as usually, I'm sorry for the big PR. But it's hard to
    break it down to peaces. The good news is that in the same time it's a
    copy-pasta from the original codegen, no surprises here. Basically, the
    most hard place to read is `ConstantAggregateBuilder::addBits` copied
    with minimum of changes.
    
    The main problem - and frankly speaking I have no idea why it's done
    this way in the original codegen - is that the data layout is different
    for such structures, I mean literally another type is used. For
    instance, the code:
    ```
    struct T {
      int X : 15;
      int Y : 6;
      unsigned Z : 9;
      int W;
    };
    
    struct T GV = { 1, 5, 256, -1};
    ```
    is represented in LLVM IR (with no CIR enabled) as:
    
    ```
    %struct.T = type { i32, i32 }
    %struct.Inner = type { i8, i32 }
    
    @gv = dso_local global { i8, i8, i8, i8, i32 } ...
    ```
    i.e. the global var `GV` is looks like a struct of single bytes (up to
    the last field, which is not a btfield).
    And my guess is that we want to have the same behavior in CIR. So we do.
    
    The main problem is that we have to treat the same data differently -
    and this is why one additional `bitcast` is needed when we create a
    global var. Actually, there was a comment there - and I really wonder
    where it came from. But anyways, I don't really like this and don't see
    any good workaround here. Well, maybe we may add a kind of map in order
    to store the correspondence between types and do a bitcast more wisely.
    The same is true for the const structs with bitfields defined locally.
    gitoleg authored and lanza committed Feb 5, 2024
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  2. [CIR][Lowering][Bugfix] Fix lowering of bool_to_int cast (llvm#450)

    The minimal bug repro:
    ```
    #include <stdbool.h>
    #include <stdint.h>
    void bar() {
      bool x = true;
      uint8_t y = (uint8_t)x;
    }
    ```
    Fails on verification stage:
    ```
    loc("repro.c":5:24): error: integer width of the output type is smaller or equal to the integer width of the input type
    fatal error: error in backend: The pass manager failed to lower CIR to LLVMIR dialect!
    ```
    The problem is that in some cases lowering from CIR emits the invalid
    zext operation. PR fixes this issue by emitting the llvm.bitcast instead
    of llvm.zext in such cases.
    YazZz1k authored and lanza committed Feb 5, 2024
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Commits on Feb 6, 2024

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  3. [CIR][CIRGen] Add suppport for local typedefs (llvm#451)

    The change is taken from original codegen.
    YazZz1k authored and lanza committed Feb 6, 2024
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  4. [CIR][CIRGen][BugFix] Fix building of calls (llvm#452)

    The issue is that the CIR codegen assumes that function pointer is
    always result of cir.load op.
    But it isn't true because the funcion pointer may be result of other
    operations (f.e cir.call).
    YazZz1k authored and lanza committed Feb 6, 2024
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Commits on Feb 7, 2024

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Commits on Feb 8, 2024

  1. [CIR][CIRGen] Add codegen for global compound literals (llvm#454)

    This PR adds support for global compound literals.
    The implementation is almost the same as in original codegen. But the
    original codegen can reuse the value of emitted compound literal global
    variable in case then the init expression of new variable and this
    variable are the same.
    It's easy to implement this feature. But I can't find any test-case then
    this feature will be applied. So I decided to ignore this optimization
    opportunity to avoid mistakes.
    YazZz1k authored and lanza committed Feb 8, 2024
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  2. [CIR][CodeGen] VLA support next step (llvm#453)

    Here is the next step in VLA support.
    Basically, these changes handle different expressions, like `int
    (*a[5])[n]` or `sizeof(a[n])`.
    
    I took tests from the original `codegen` - they don't check anything,
    just verify we don't fail.
    
    There is still an issue with a proper cleanup - there are cases when
    `stack_save` doesn't dominate a corresponded `stack_restore`. For
    example in the next example:
    
    ```
    void test(unsigned x) {
      while (1) {
        char a[x];
        if (x > 5)
          break;
        ++x;
      }
    }
    ```
    Look like `break` here doesn't lead to `stack_restore`. But I would say
    this is less related to VLA, though probably I need to fix this as well.
    gitoleg authored and lanza committed Feb 8, 2024
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  3. [CIR][CIRGen][Bugfix] Emit valid type for evaluated const (llvm#456)

    This PR fixes the issue connected with folding a simple boolean
    expresion pattern (f.e. `0 && RHS = 0`).
    The problem is that the scalar expression emitter always creates a
    `cir.bool` attribute as a result of expression. But in some cases the
    result expression should be a `cir.int` attr.
    YazZz1k authored and lanza committed Feb 8, 2024
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Commits on Feb 9, 2024

  1. [CIR][CIRGen][Exceptions][NFC] Add skeleton for some missing function…

    … start/end functionality
    bcardosolopes authored and lanza committed Feb 9, 2024
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  2. [CIR][CIRGen] Support for local const arrays (llvm#458)

    The change is taken from the original llvm codegen.
    YazZz1k authored and lanza committed Feb 9, 2024
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Commits on Feb 10, 2024

  1. [CIR][CIRGen][NFC] Relax asserts for using decls and namespace alias

    Originally those are only used for debug info generation, so get a bit more
    specific on what's missing here.
    bcardosolopes authored and lanza committed Feb 10, 2024
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Commits on Feb 12, 2024

  1. [CIR][CIRGen] Fix in replacing of no_proto func (llvm#460)

    When replacing the no-proto functions with it's real definition, codegen
    assumes that only `cir.call` operation may use the replaced function.
    Such behaviour leads to compilation error because of the
    `cir.get_global` op can also use the function to get pointer to
    function.
    This PR adds handle the case with `cir.get_global` operation and fixes
    the issue.
    YazZz1k authored and lanza committed Feb 12, 2024
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Commits on Feb 13, 2024

  1. [CIR][Lowering] add lowering of bool attribute (llvm#461)

    This PR adds missing case to lowerCirAttrAsValue.
    YazZz1k authored and lanza committed Feb 13, 2024
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  2. [CIR][CIRGen][Exceptions] Prep work for using cir.try_call outside ci…

    …r.try
    
    The final destination here is to support cir.try_calls that are not within a
    `try {}` statement in C++.  This only affect untested paths that will
    assert a bit later than before, testcase coming soon.
    bcardosolopes authored and lanza committed Feb 13, 2024
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Commits on Feb 14, 2024

  1. [CIR][CodeGen] Locally inited structures with bitfields (llvm#463)

    The second part of the job started in llvm#412 , now about local structures.
    
    As it was mentioned previously, sometimes the layout for structures with
    bit fields inited with constants differ from the originally created in
    `CIRRecordLayoutBuilder` and it cause `storeOp` verification fail due to
    different structure type was used to allocation.
    This PR fix it.
    An example:
    ```
    typedef struct {
      int a : 4;
      int b : 5;
      int c;
    } D;
    
    void bar () {
      D d = {1,2,3};
    }
    ```
    
    Well, I can't say I'm proud of these changes - it seems like a type
    safety violation, but looks like it's the best we can do here.
    
    The original codegen doesn't have this problem at all, there is just a
    `memcpy` there, I provide LLVM IR just for reference:
    
    ```
    %struct.D = type { i16, i32 }
    
    @__const.bar.d = private unnamed_addr constant { i8, i8, i32 } { i8 33, i8 0, i32 3 }, align 4
    
    ; Function Attrs: noinline nounwind optnone uwtable
    define dso_local void @bar() #0 {
    entry:
      %d = alloca %struct.D, align 4
      call void @llvm.memcpy.p0.p0.i64(ptr align 4 %d, ptr align 4 @__const.bar.d, i64 8, i1 false)
      ret void
    }
    ```
    gitoleg authored and lanza committed Feb 14, 2024
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  2. [CIR][CIRGen] Introduce cir.unreachable operation (llvm#447)

    In llvm#426 we confirmed that CIR needs a `cir.unreachable` operation to
    mark unreachable program points
    [(discussion)](llvm#426 (comment)).
    This PR adds it.
    Lancern authored and lanza committed Feb 14, 2024
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  3. [CIR][CIRGen] Add missing case to VisitMemberExpr (llvm#464)

    This PR adds support for evaluating constants in member exprs.
    The change is taken from original codegen.
    YazZz1k authored and lanza committed Feb 14, 2024
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  4. [CIR][CIRGen][Exceptions] Add unwind attribute

    - Add it to functions but not yet on calls.
    - Add more skeleton for tagging function attributes.
    - Testcases
    
    One more incremental step towards cir.try_call outside cir.try scopes.
    bcardosolopes authored and lanza committed Feb 14, 2024
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Commits on Feb 15, 2024

  1. [CIR][CodeGen] Inline assembly: adds operands (llvm#465)

    The next step in inline-assembly support: we add instruction operands!
    Nothing interesting, just some copy-pasta from the `codegen` with some
    sort of simplifications for now.
    
    Well, I'm not sure `functional-type` is the best way to print operands
    though it's used in mlir's `InlineAsmOp`. But anyways, maybe you have a
    better idea.
    
    There are two or three steps ahead, so we are not that far from being
    able to run something!
    gitoleg authored and lanza committed Feb 15, 2024
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Commits on Feb 16, 2024

  1. [CIR][CodeGen] Adds clobbers to inline assembly (llvm#469)

    One more tiny step!
    This a tiny PR that adds clobbers to constraint string.
    Note, that `~{dirflag},~{fpsr},~{flags}` is a
    [X86](https://github.com/llvm/clangir/blob/main/clang/lib/Basic/Targets/X86.h#L281)
    dependent clobbers.
    
    Basically, the next things remain:
    - lowering
    - store the results of the `cir.asm`
    gitoleg authored and lanza committed Feb 16, 2024
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Commits on Feb 17, 2024

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Commits on Feb 20, 2024

  1. [CIR][Lowering] Handle unsupported types for CIR-MLIR type conversion (

    …llvm#471)
    
    * Pointers to CIR types that do not have converters (e.g. cir.struct)
    cause crashes due to passing null types to construct mlir::MemRefType.
    
    * This commit adds checks for pointers and alloca lowering to fail
    gracefully if the underlying type can not be converted.
    mrsoliman authored and lanza committed Feb 20, 2024
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  2. [CIR][CIRGen] Support for zero initialization of arrays (llvm#468)

    As in original codegen this PR uses the do-while loop to initialize the
    array elements with the filler expression.
    But unlike the original codegen we allocates the temporary variable on
    stack. Allocation is necessary to store the pointer to the first
    uniinitialized element.
    YazZz1k authored and lanza committed Feb 20, 2024
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  3. [CIR][CodeGen][Bugfix] Fix storage size for bitfields (llvm#462)

    This PR fixes a bug caused by `IntType` size limitations in CIR (and by
    some magic of numbers as well).
    
    As you know, we need to create a storage for bit fields that usually
    contain several of them. There next code fails with `IntType` size check
    which exceeds 64 bits.
    ```
    typedef struct {
        uint8_t a;
        uint8_t b;
        uint8_t c;
    
        int d: 2;
        int e: 2;
        int f: 4;
        int g: 25;
        int h: 3;
        int i: 4;
        int j: 3;
        int k: 8;
        int l: 14;
    } D;
    
    void foo() {
        D d;
    }
    ```
    Note, if we remove first three fields (or even one) everything will be
    fine even without this fix, because
    [this](https://github.com/llvm/clangir/blob/main/clang/lib/CIR/CodeGen/CIRRecordLayoutBuilder.cpp#L553)
    check won't pass. The bug is kind of hard to reproduce and I would say
    it's a rare case. I mean the problem is not only in the number of bit
    fields that form together something bigger than 64 bits.
    
    ### Several details
    
    Well, while iterating over the bit fields in some struct type, we need
    to stop accumulating bit fields in one storage and start to do the same
    in another one. Basically, we operate with `Tail` and `StartBitOffset`
    where the former is an offset of the next field. And once `Tail -
    StartBitOffset >= 64` we say that it's not possible to create a storage
    of such size due to `IntType` size limitation. Sounds reasonable.
    
    But it can be a case when we can not afford to take the next field
    because its `Tail` in turn leads to a storage of the size bigger then
    64. Thus, we want to check it as well. From the implementation point of
    view I added one more check to the `IsBetterAsSingleFieldRun` in order
    to have all these checks for size in a single place. And the check I
    mentioned before were saving us from hitting this issue.
    gitoleg authored and lanza committed Feb 20, 2024
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Commits on Feb 21, 2024

  1. [CIR] introduce CIR floating-point types (llvm#385)

    This PR adds a dedicated `cir.float` type for representing
    floating-point types. There are several issues linked to this PR: llvm#5,
    llvm#78, and llvm#90.
    Lancern authored and lanza committed Feb 21, 2024
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Commits on Feb 22, 2024

  1. [CIR][Codegen] Fix bitfields unary and binary ops (llvm#477)

    This PR fixes a couple of  NIY features for bit fields.
    
    Basically, such expressions with bit fields `x->a++` and `x->a |= 42`
    are supported now.
    
    The main problem is `UnOp` verification - now it can be defined both by
    `loadOp` and by `GetBitfieldOp` or even by `CastOp`. So shame on me, I
    removed a test from `invalid.cir`
    gitoleg authored and lanza committed Feb 22, 2024
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  2. [CIR][CIRGen] Fix calling a function through a function pointer (llvm…

    …#467)
    
    CIR codegen always casts the no-proto function pointer to `FuncOp`. But
    the function pointer may be result of cir operations (f.e. `cir.load`).
    As a result in such cases the function pointer sets to `nullptr`. That
    leads to compilation error.
    So this PR removes the unecessary cast to 'FuncOp' and resolves the
    issue.
    YazZz1k authored and lanza committed Feb 22, 2024
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  3. [CIR] initial support for pointer-to-data-member type (llvm#401)

    This patch adds initial support for the pointer-to-data-member type.
    Specifically, this commit includes:
    
    - New ops, types, and attributes:
    - CodeGen for pointer-to-data-member types and values
      - Lower C++ pointer-to-member type
      - Lower C++ expression `&C::D`
      - Lower C++ expression `c.*p` and `c->*p`
    
    This patch only includes an initial support. The following stuff related
    to pointer-to-member types are not supported yet:
    
    - Pointer to member function;
    - Conversion from `T Base::*` to `T Derived::*`;
    - LLVMIR lowering.
    Lancern authored and lanza committed Feb 22, 2024
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Commits on Feb 29, 2024

  1. [CIR][NFC] Add unimplemented feature guard for dialect code (llvm#481)

    As discussed in pull llvm#401 , The present `UnimplementedFeature` class is
    made for the CIRGen submodule and we need similar facilities for code
    under `clang/lib/CIR/Dialect/IR`. This NFC patch adds a new
    `CIRDialectUnimplementedFeature` class that provides unimplemented
    feature guards for CIR dialect code.
    Lancern authored and lanza committed Feb 29, 2024
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  2. [CIR][Lowering] More cir.asm lowering (llvm#472)

    This PR adds lowering for `cir.asm`.
    
    Also, two flags were added to the `cir.asm` : `hasSideEffects` and
    `isStackAligned` in order to match with the llvm dialect.
    
    Also, I added several simple tests for lowering.
    
    I'm not sure but most likely the next PR will be the last one in this
    story about assembly support )
    gitoleg authored and lanza committed Feb 29, 2024
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Commits on Mar 5, 2024

  1. [CIR][CIRGen] Emit cir.unreachable on implicit returns (llvm#486)

    This patch changes the emission of implicit returns from functions whose
    return type is not `void`. Instead of emitting `cir.return`, this PR
    aligns to the original clang CodeGen and emits a `cir.unreachable`
    operation.
    
    Related issue: llvm#457 .
    Lancern authored and lanza committed Mar 5, 2024
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  2. [CIR][CIRGen] Add support for builtin bit operations (llvm#474)

    This PR adds CIRGen support for the following built-in bit operations:
    
      - `__builtin_ffs{,l,ll,g}`
      - `__builtin_clz{,l,ll,g}`
      - `__builtin_ctz{,l,ll,g}`
      - `__builtin_clrsb{,l,ll,g}`
      - `__builtin_popcount{,l,ll,g}`
      - `__builtin_parity{,l,ll,g}`
    
    This PR adds a new operation, `cir.bits`, to represent such bit
    operations on the input integers. LLVMIR lowering support is not
    included in this PR.
    
    > [!NOTE]
    > As a side note, C++20 adds the `<bit>` header which includes some bit
    operation functions with similar functionalities to the built-in
    functions mentioned above. However, these standard library functions
    have slightly different semantics than the built-in ones and this PR
    does not include support for these standard library functions. Support
    for these functions may be added later, or amended into this PR if the
    reviewers request so.
    
    Co-authored-by: Bruno Cardoso Lopes <[email protected]>
    2 people authored and lanza committed Mar 5, 2024
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  3. [CIR] Vector types - part 4 (llvm#490)

    This is part 4 of implementing vector types and vector operations in
    ClangIR, issue llvm#284. This change has three small additions.
    
    Implement a "vector splat" conversion, which converts a scalar into
    vector, initializing all the elements of the vector with the scalar.
    
    Implement incomplete initialization of a vector, where the number of
    explicit initializers is less than the number of elements in the vector.
    The rest of the elements are implicitly zero initialized.
    
    Implement conversions between different vector types. The language rules
    require that the two types be the same size (in bytes, not necessarily
    in the number of elements). These conversions are always implemented
    with a bitcast.
    
    The first two changes only required changes to the AST -> ClangIR code
    gen. There are no changes to the ClangIR dialect, so no changes to the
    LLVM lowering were needed.
    
    The third part only required a change to a validation rule. The code to
    implement a vector bitcast was already present. The compiler just needed
    to stop rejecting it as invalid ClangIR.
    dkolsen-pgi authored and lanza committed Mar 5, 2024
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  4. [CIR][CIRGen] Support for __builtin_expect (llvm#478)

    This PR adds the new `cir.expect` opcode which is similar to llvm.expect
    intricnsics.
    Codegen of `__builtin_expect` emits `cir.expect` opcode. Then
    `cir.expect` will be lowered to `llvm.expect` intrinsic.
    
    When implementing __builtin_expect I faced with minor issue.
    CIR lowering of `if` often emits the lllvm IR with redundant cast
    instructions. Like this:
    ```
    %0 = call i64 @llvm.expect.i64(i64 %any, i64 1), !dbg !13
    %1 = icmp ne i64 %0, 0
    %2 = zext i1 %0 to i8   // redundant
    %3 = trunc i8 %1 to i1 // redundant
    br i1 %3, label %l1, label %l2
    ```
    But the llvm pass `LowerExpectIntrinsicPass` (that should replace
    `llvm.expect` with branch metadata) performs only simple
    pattern-matching. And it can't handle this zext/trunc intructions. So
    this pass in such cases just removes the `llvm.expect` without updating
    a branch metadata.
    In this reason this PR also avoid emitting the redundant zext/cast
    instruction sequence.
    YazZz1k authored and lanza committed Mar 5, 2024
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Commits on Mar 6, 2024

  1. [CIR][CIRGen] Partial support for offsetof (llvm#492)

    Support `offset` expression in case when we can evaluate offset
    expression as integer.
    YazZz1k authored and lanza committed Mar 6, 2024
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  2. [CIR][CIRGen] Support for CStyleCastExprClass in buildCastLValue (llv…

    …m#494)
    
    Change is taken from original llvm codegen
    YazZz1k authored and lanza committed Mar 6, 2024
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Commits on Mar 7, 2024

  1. [CIR] Add cir.trap operation (llvm#496)

    This PR adds the `cir.trap` operation, which corresponds to the
    `__builtin_trap` builtin function. When executed, the operation
    terminates the program abnormally in an implementation-defined manner.
    
    This PR also includes CIRGen and LLVM lowering support for the new
    operation.
    Lancern authored and lanza committed Mar 7, 2024
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Commits on Mar 8, 2024

  1. [CIR][FrontendTool] Fix overly conservative compatible flags

    Remove check since paths that aren't related to ClangIR shouldn't be affected
    at all, even if the flag is ON. Also, this conservative error message wasn't
    tested.
    bcardosolopes authored and lanza committed Mar 8, 2024
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Commits on Mar 9, 2024

  1. [CIR] Vector ternary operator (llvm#500)

    Implement the vector version of the ternary (`?:`) operator. This is a
    separate MLIR op than the regular `?:` operator because the vector
    version is not short-circuiting and always evaluates all its arguments.
    dkolsen-pgi authored and lanza committed Mar 9, 2024
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Commits on Mar 11, 2024

  1. [CIR][CIRGen] Emit more delete calls

    bcardosolopes authored and lanza committed Mar 11, 2024
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Commits on Mar 12, 2024

  1. [CIR][Lowering] Add LLVMIR lowering support for CIR bit operations (l…

    …lvm#501)
    
    This PR adds the LLVMIR lowering support for CIR bit operations.
    
    For `cir.bit.clz`, `cir.bit.ctz`, and `cir.bit.popcount`, they can be
    lowered directly to LLVM intrinsic calls to `@llvm.ctlz`, `@llvm.cttz`,
    and `@llvm.ctpop`, respectively.
    
    For the other three bit operations, namely `cir.bit.clrsb`,
    `cir.bit.ffs`, and `cir.bit.parity`, they are lowered to a sequence of
    LLVM IR instructions that implements their functionalities. This
    lowering scheme is also used by the original clang CodeGen.
    Lancern authored and lanza committed Mar 12, 2024
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  2. [CIR][CIRGen] Enable support of bool increment (llvm#493)

    CIRGenFunction::buildFromMemory can handle the `cir.bool` values. So we
    no longer need to emit the `NIY` error here.
    YazZz1k authored and lanza committed Mar 12, 2024
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  3. [CIR][CIRGen] Inline asm: operand attributes (llvm#491)

    This is the next step in inline assembly support and it's more like a
    service PR and mostly dedicated to the in/out argument types.
    
    Also, operand attributes are added and it's the last change in the
    `cir.asm` operation afaik. But I would wait untill the next PR,
    which will contain more examples and maybe will help us to get more
    readable format for the operation.
    Note, that we have to add an attribute for each operand - because the
    lowering of the llvm dialect to LLVM IR iterates over them in the same
    order.
    
    The next PR will be last one (so far) in the series of PRs dedicated to
    the inline assembly support. It will add storing of the results.
    gitoleg authored and lanza committed Mar 12, 2024
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  4. [CIR] Vector type cleanup and refactoring (llvm#503)

    Three small changes, all cleanup or refactoring in nature.
    
    1. Fix the assemblyFormat for all the vector operations in the ClangIR
    dialect so that vector types appear in ClangIR as `!cir.vector<type x
    n>` instead of as just `<type x n>`. When I first created the vector
    ops, I forgot to use `qualified` as necessary when writing out types.
    This change fixes that. There is no change in behavior, but there is a
    change to the text version of ClangIR, which required changing the
    ClangIR expected results and ClangIR inputs in the tests.
    
    2. Create a new `cir.vec.splat` operation and use that for "vector
    splat", i.e. a conversion from a scalar to a vector. A "vector splat"
    conversion had been implemented with `cir.vec.create` before. This
    change results in different ClangIR and different LLVM IR, which again
    required updating the tests, but no noticeable change in compiler
    behavior.
    
    3. Create an `IntegerVector` type constraint, which requires that the
    given type be a vector whose element type is an integer. It can be any
    integral type, and the vector can be of any size. Use the new type
    constraint in the definition of `cir.vec.ternary`, whose condition
    operand must be an `IntegerVector`. Remove the integral type check from
    `VecTernaryOp::verify`, since doing the check there is now redundant.
    The only possibly visible change is to the text of an error message when
    validation of `cir.vec.ternary` fails. The expected output of a
    validation test was updated with the new message.
    dkolsen-pgi authored and lanza committed Mar 12, 2024
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  5. [CIR][Codegen][Lowering] Introduce new bitfield layout (llvm#487)

    This PR intends to fix some problems with packed structures support, so
    the llvm#473 will work.
    
    Basically, the main problem for the packed structures support is an
    absence of arbitrary sized integers in CIR. Well, one workaround is to
    use `mlir::IntegerType` for that, but it's kind of wrong way (please
    correct me if I'm wrong). Another way is to introduce this type in CIR.
    So far I suggest this way: instead of arbitrary sized integers we will
    create an array of bytes for bitfield storages whenever they doesn't fit
    into the CIR `IntType`.
    
    Well, the original codegen creates storages with alignment 8 - so it can
    be `i24` storage type for instance. Previously, we just created storages
    that could be represented as CIR `IntType`: 8, 16, 32, 64. And it was
    working before I came up with a necessity to support packed structures.
    At first glance it's not a problem - just add `determinePacked` method
    from the original codegen and that's it. But it turned out that this
    method _infers_ the fact if a structure is packed or not. It doesn't use
    the AST attribute for that as one could think - it works with offsets
    and alignments of fields. Thus, we either need to invent our own way to
    determine packed structures (which is error prone and maybe not doable
    at all) or try to use the existing one. Also, we go closer to the
    original lllvm's data layout in this case.
    
    1) I had to move the lowering details from the `LoweringPrepare` to the
    `LowerToLLVM`, because it's not possible to do a `load` from the array
    of bytes to the integer type - and it's ok in llvm dialect. Thus, all
    the math operations can be expressed without any problems. Basically the
    most of the diff you see is because of the changes in the lowering. The
    remaining part is more or less easy to read.
    2) There are minor changes in `CIRRecordLayoutBuilder` - as described
    above, we use may generate an array of bytes as a storage.
    3) Some cosmetic changes in `CIRGenExpr` - since we don't want to infer
    the storage type again and just use the one stored in the
    `CIRGenBitFieldInfo`.
    4) Helpers are introduced in the lowering - but nothing hard - just
    shifts and logical ops.
    5) I removed `bitfield-ops` test - because now the test cases covered
    there are all in `bitfields.c` and `bitfields.cpp` .
    
    So ... This is still a suggestion, though I believe it's a good one. So
    you are welcome to discuss, suggest another ways to solve the problem
    and etc.
    gitoleg authored and lanza committed Mar 12, 2024
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  6. [CIR][CIRGen] Add support for ctor/dtor based array init/destroy

    Still missing lowering support, which will come next.
    bcardosolopes authored and lanza committed Mar 12, 2024
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Commits on Mar 14, 2024

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  3. [CIR][CIRGen][NFC] Skeleton for atomics support

    This doesn't change existing functionality, for existing crashes related to
    atomics we just hit asserts a bit further now, but no support added just yet.
    Next set of commits will introduce functionlity with testcases.
    bcardosolopes authored and lanza committed Mar 14, 2024
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  4. [CIR][CIRGen][Atomics][NFC] Skeleton for constant order codegen

    Just like previous commit, add more infra pieces, still NFC since all relevant
    testcases hit asserts, just a bit deeper.
    bcardosolopes authored and lanza committed Mar 14, 2024
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Commits on Mar 15, 2024

  1. [CIR][Codegen] Initial support for packed structures (llvm#473)

    This PR adds a support for packed structures.
    
    Basically, now both `pragma pack(...)` and
    `__attribute__((aligned(...)))` should work.
    The only problem is that `getAlignment` is not a total one - I fix only
    a couple of issues I faced with - for struct types and arrays.
    gitoleg authored and lanza committed Mar 15, 2024
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  2. [CIR][CIRGen] Support for initialization of unions. (llvm#495)

    PR adds support for initialization of unions. The change is copy-pasted
    from the original CodeGen.
    YazZz1k authored and lanza committed Mar 15, 2024
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  3. [CIR][CIRGen] Support for __builtin_prefetch (llvm#504)

    This PR adds support for `__builtin_prefetch`. CIRGen of this builtin
    emits the new 'cir.prefetch' opcode. Then `cir.prefetch` lowers to
    `llvm.prefetch` intrinsic.
    
    Co-authored-by: Bruno Cardoso Lopes <[email protected]>
    2 people authored and lanza committed Mar 15, 2024
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  4. [CIR] Add MemRead/MemWrite markers to bitfield ops (llvm#507)

    This PR adds MemRead/MemWrite markers to the `GetBitfieldOp` and
    `SetBitfieldOp` (as discussed in llvm#487)
    Also, minor renaming in the `SetBitfieldOp`
    
    ---------
    
    Co-authored-by: Bruno Cardoso Lopes <[email protected]>
    2 people authored and lanza committed Mar 15, 2024
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  5. [CIR][CIRGen] Support for __builtin_constant_p (llvm#506)

    This PR adds support for `__builtin_constant_p`.
    Implementation introduces the new `cr.is_constant` opcode to it during
    the codegeneration of builtin.
    Codegeneration is taken from the original llvm codegen.
    YazZz1k authored and lanza committed Mar 15, 2024
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Commits on Mar 19, 2024

  1. [CIR][CIRGen] Support for C++20 three-way comparison (llvm#485)

    This patch adds CIRGen support for the C++20 three-way comparison
    operator `<=>`. The binary operator is directly lowered to existing CIR
    operations.
    
    Most of the changes are tests.
    Lancern authored and lanza committed Mar 19, 2024
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Commits on Mar 21, 2024

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Commits on Mar 22, 2024

  1. [CIR][CIRGen] Support for compound literal lvalue (llvm#515)

    This change is taken from the original codegen.
    YazZz1k authored and lanza committed Mar 22, 2024
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  2. [CIR][CIRGen] Support for __attribute__((fallthrough)) statement (llv…

    …m#517)
    
    This PR adds handling of AttributedStmt to support fallthrough
    attribute.
    YazZz1k authored and lanza committed Mar 22, 2024
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  3. [CIR][CIRGen] Add handling __extension__ keyword for lvalue (llvm#519)

    This change is taken from the original codegen
    YazZz1k authored and lanza committed Mar 22, 2024
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Commits on Apr 2, 2024

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Commits on Apr 3, 2024

  1. [CIR] Introduce a flattening pass (llvm#516)

    We start our journey towards `goto` support and this is a first step on
    this way.
    
    There are some discussion in llvm#508 and according to the plan we do the
    following here:
    - a new pass called `cir-flatten-cfg` that is a stub now but later will
    be responsible for the regions inlining. The pass works only if
    `-emit-flat-cir` is passed in cmd line. Thus, the clang behavior is not
    changed here from the user's point of view.
    - The pass will be accomplished with `goto` solver later, so we talk
    about several passes that are mandatory for the lowering into `llvm`
    dialect. There are at least two clients of this pass that will be
    affected: `clang` itself and `cir-opt`, so we need a common point for
    them: and `populateCIRFlatteningPasses` and `populateCIRToLLVMPasses`
    guarantee that `CIR` will be in the correct state for all the clients,
    whatever new passes we will add later.
    gitoleg authored and lanza committed Apr 3, 2024
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  2. [CIR][CIRGen] Add support for __atomic_add_fetch

    This introduces CIRGen and LLVM lowering for the first of a bunch
    of these atomic operations, incremental work should generelize the
    current constructs.
    bcardosolopes authored and lanza committed Apr 3, 2024
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Commits on Apr 5, 2024

  1. [CIR] shufflevector and convertvector built-ins (llvm#530)

    Implement `__builtin_shufflevector` and `__builtin_convertvector` in
    ClangIR. This change contributes to the implemention of issue llvm#284.
    
    `__builtin_convertvector` is implemented as a cast. LLVM IR uses the
    same instructions for arithmetic conversions of both individual scalars
    and entire vectors. So ClangIR does the same. The code for handling
    conversions, in both CodeGen and Lowering, is cleaned up to correctly
    handle vector types. To simplify the lowering code and avoid `if
    (type.isa<VectorType>())` statements everywhere, the utility function
    `elementTypeIfVector` was added to `LowerToLLVM.cpp`.
    
    `__builtin_shufflevector` has two forms, only one of which appears to be
    documented.
    
    The documented form, which takes a variable-sized list of integer
    constants for the indices, is implemented with the new ClangIR operation
    `cir.vec.shuffle.ints`. This operation is lowered to the
    `llvm.shufflevector` op.
    
    The undocumented form, which gets the indices from a vector operand, is
    implemented with the new ClangIR operation `cir.vec.shuffle.vec`. LLVM
    IR does not have an instruction for this, so it gets lowered to a long
    series of `llvm.extractelement` and `llvm.insertelement` operations.
    dkolsen-pgi authored and lanza committed Apr 5, 2024
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Commits on Apr 6, 2024

  1. [CIR] Add support for byteswap intrinsic (llvm#523)

    This PR adds support for the following intrinsic functions:
    - `__builtin_bswap{16, 32, 64}`
    - `_byteswap_{ushort, ulong, uint64}`
    
    This PR adds a new `cir.bswap` operation to represent such an intrinsic
    call. CIRGen and LLVMIR lowering for the new operation is included in
    this PR.
    Lancern authored and lanza committed Apr 6, 2024
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  2. [CIR] GNU vector type cleanup (llvm#531)

    This is the final commit for issue llvm#284. Vector types other than GNU
    vector types will be covered by other yet-to-be-created issues.
    
    Now that GNU vector types (the ones defined via the vector_size
    attribute) are implemented, do a final cleanup of the assertions and
    other checks related to vector types.
    
    Remove `UnimplementedFeature::cirVectorType()`. Deal with the remaining
    calls to that function. When the that is not yet implemented has to do
    with Arm SVE vectors, the assert was changed to
    `UnimplementedFeature::scalableVectors()` instead. The assertion was
    removed in cases where the code correctly handle GNU vector types.
    
    While cleaning up the assertion checks, I noticed that BinOp handling of
    vector types wasn't quite complete. Any special handling for integer or
    floating-point types wasn't happening when the operands were vector
    types. To fix this, split `BinOpInfo::Ty` into two fields, `FullType`
    and `CompType`. `FullType` is the type of the operands. `CompType` is
    normally the same as `FullType`, but is the element type when `FullType`
    is a vector type.
    dkolsen-pgi authored and lanza committed Apr 6, 2024
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Commits on Apr 8, 2024

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  3. [CIR][CIRGen] Add support for __atomic_fetch_binop

    Note this is different from __atomic_binop_fetch. See added docs.
    bcardosolopes authored and lanza committed Apr 8, 2024
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Commits on Apr 9, 2024

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Commits on Apr 10, 2024

  1. [CIR][CIRGen] Add missing CIRGen for generic bit operation builtins (l…

    …lvm#540)
    
    This patch adds the CIRGen for the following builtin functions:
    
    - `__builtin_clzg`;
    - `__builtin_ctzg`;
    - `__builtin_popcountg`.
    
    CIRGen for these three functions are missing in the original PR which
    introduces CIR bit ops.
    Lancern authored and lanza committed Apr 10, 2024
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  3. [CIR][CIRGen] Add support for __attribute__((constructor))

    Also add skeleton for upcoming dtor support.
    bcardosolopes authored and lanza committed Apr 10, 2024
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Commits on Apr 11, 2024

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Commits on Apr 12, 2024

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Commits on Apr 15, 2024

  1. [CIR][Codegen] IfOp flattening (llvm#537)

    This PR perform flattening for `cir::IfOp`
    Basically, we just move the code from `LowerToLLVM.cpp` to
    `FlattenCFG.cpp`.
    There are several important things though I would like to highlight.
    1) Consider the next code from the tests:
    ```
    cir.func @foo(%arg0: !s32i) -> !s32i {
        %4 = cir.cast(int_to_bool, %arg0 : !s32i), !cir.bool
        cir.if %4 {
          %5 = cir.const(#cir.int<1> : !s32i) : !s32i
          cir.return %5 : !s32i
        } else {
          %5 = cir.const(#cir.int<0> : !s32i) : !s32i
          cir.return %5 : !s32i
        }
        cir.return %arg0 : !s32i
      }
    ```
    The last `cir.return` becomes unreachable after flattening and hence is
    not reachable in the lowering. So we got the next error:
    ```
    error: 'cir.return' op expects parent op to be one of 'cir.func, cir.scope, cir.if, cir.switch, cir.do, cir.while, cir.for'
        cir.return %arg0 : !s32i
    ```
    the parent after lowering is `llvm.func`.
    And this is only the beginning - the more operations will be flatten,
    the more similar fails will happen. Thus, I added lowering for the
    unreachable code as well in `LowerToLLVM.cpp`. But may be you have
    another solution in your mind.
    
    2) Please, pay attention on the flattening pass - I'm not that familiar
    with `mlir` builders as you are, so may be I'm doing something wrong.
    The idea was to start flattening from the most nested operations.
    
    3) As you requested in llvm#516, `cir-to-llvm-internal` is renamed to
    `cir-flat-to-llvm`. The only thing remain undone is related to the
    following:
    
    > Since it would be wrong to run cir-flat-to-llvm without running
    cir-flatten-cfg, we should make cir-flat-to-llvm pass to require
    cir-flatten-cfg pass to be run before.
    
    And I'm not sure I know how to do it exactly - is there something
    similar to pass dependencies from LLVM IR?
    
    4) The part of `IfOp` lowering related to elimination of the vain casts
    for condition branch moved directly to the lowering of `BrCondOp` with
    some refactoring and guarding.
    
    5) Just note, that now `cir-opt` is able to dump the flat cir as well:
    `cir-opt -cir-flat-cfg`
    gitoleg authored and lanza committed Apr 15, 2024
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  2. [CIR] Add initial support for bit-precise integer types (llvm#538)

    This PR adds initial support for the bit-precise integer type
    `_BitInt(N)`. This type goes into the C23 standard, and has already been
    supported by clang since 2020, previously known as `_ExtInt(N)`.
    
    This PR is quite simple and straight-forward. Basically it leverages the
    existing `cir.int` type to represent such types. Previously `cir.int`
    verifies that its width must be a multiple of 8, and this verification
    has been removed in this PR.
    Lancern authored and lanza committed Apr 15, 2024
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Commits on Apr 16, 2024

  1. [CIR][LLVMLowering] Lower cir.objectsize (llvm#545)

    Lowers `cir.objectsize` to `llvm.objectsize`
    ghehg authored and lanza committed Apr 16, 2024
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Commits on Apr 17, 2024

  1. [CIR][LLVMLowering] Fix handling of dense array conversions from cons…

    …t arrays
    
    We were lacking handling of trailing zeros for constant arrays.
    bcardosolopes authored and lanza committed Apr 17, 2024
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  3. [CIR][CodeGen] Inline assembly: store the results (llvm#512)

    This PR adds storing of the results of inline assembly operation.
    
    This is a **final** step (I hope: ) ) from my side to support inline
    assembly.
    
    There are some features that remains unimplemented, but basic things
    should work now, For example, we can do addition and get the results - I
    explicitly added several tests for that, so you can test them in real.
    For instance, the next program being compiled with CIR should give you 7
    as the result:
    ```
    int add(int x, int y) {
      int a;
      __asm__("addl %[y], %[x]"
          : "=r" (a)
          : [x] "r" (x),
            [y] "r" (y)
          );
    
      return a;
    }
    
    int main() {
      printf("run %d\n", add(3, 4));
      return 0;
    }
    ```
    
    So, the main thing remains is pretty printing. As I said I added several
    examples, and may be it will become more clear how to print better.
    
    Also, I added several tests from original codegen in order to check that
    we don't fail. And I can add some checks there as well when we come to
    better solution on printing.
    gitoleg authored and lanza committed Apr 17, 2024
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  4. Revert "[CIR][LLVMLowering] Lower cir.objectsize (llvm#545)"

    This reverts commit 87a61f3.
    
    It's deleting code it isn't supposed to touch.
    bcardosolopes authored and lanza committed Apr 17, 2024
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  6. [CIR][NFC] Fix few compiler warnings

    bcardosolopes authored and lanza committed Apr 17, 2024
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  7. [CIR][CodeGen] Flattening for ScopeOp and LoopOpInterface (llvm#546)

    This PR is the next step towards goto support and adds flattening for
    `ScopeOp` and `LoopOpInterface`.
    
    Looks like I can't separate this operations and create two PRs, since
    some errors occur if I do so, e.g. `reference to block defined in
    another region`. Seems we need to flatten both operations in the same
    time. Given it's a copy-pasta, I think there is no need to try to make
    several PRs.
    
    I added several tests - just copied them from the lowering part just to
    demonstrate how it looks like.
    
    Note, that changes in `dot.cir` caused by `BrCondOp` updates in the
    previous PR, when we removed the following casts:
    ```
        %20 = llvm.zext %19 : i1 to i8
        %21 = llvm.trunc %20 : i8 to i1
        llvm.cond_br %21 ...
    ```
    gitoleg authored and lanza committed Apr 17, 2024
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  8. [CIR][Codegen] Fix union init with constant (llvm#548)

    Minor fix for the case when union fields have different sizes and union
    is inited with a constant.
    Example:
    ```
    typedef union {
      short a;
      int b;
    } A;
    ```
    gitoleg authored and lanza committed Apr 17, 2024
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  9. [CIR][CodeGen][Lowering] Support Integer overflow with fwrap (llvm#539)

    This PR fixes some cases when a program compiled with `-fwrapv` fails
    with `NYI` .
    Basically, the default behavior  is no overlap:
    ```
    void baz(int x, int y) {
      int z = x - y;
    }
    ```
    LLVM IR (no CIR enabled):
    ```
    %sub = sub nsw i32 %0, %1
    ```
    and with `-fwrapv` :
    ```
    %sub = sub i32 %0, %1
    ```
    We need something similar in CIR. The only way I see how to implement it
    is to add a couple of attributes to the `BinOp` to make things even with
    the llvm dialect.
    
    Well, are there any other ideas?
    
    ---------
    
    Co-authored-by: Bruno Cardoso Lopes <[email protected]>
    2 people authored and lanza committed Apr 17, 2024
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Commits on Apr 18, 2024

  1. [CIR][CIRGen] Clean up call arrangement

    Catch up with upstream and also update Address.h with one more
    helper method for `cir::Address`.
    bcardosolopes authored and lanza committed Apr 18, 2024
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Commits on Apr 19, 2024

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  2. [CIR] Add cir.dyn_cast operation (llvm#483)

    This PR adds the `cir.dyn_cast` operation for representing
    `dynamic_cast` in C++. It contains the following contents:
    
    - [x] A new `cir.dyn_cast` operation.
    - [x] ~Two new attributes that will be attached to `cir.dyn_cast`
    operations:~
    - [x] ~`#cir.dyn_cast_info` attributes, which gives general information
    about a dynamic cast (e.g. the source RTTI pointer, the dest RTTI
    pointer, etc.)~
    - [x] ~`#cir.downcast_info` attribute, which gives even more detailed
    information about a dynamic cast that is a down-cast. These information
    will be used when rewriting the `cir.dyn_cast` operation with more
    fundamental CIR operations.~
    - [x] CIRGen support for the new operation and attributes.
    - [x] Rewrite the new operation with more fundamental CIR operations in
    LoweringPrepare.
    
    ~This is a draft PR. Now I only added the new operation / attributes,
    and updated the CIRGen part. The LoweringPrepare for the new operation
    is not implemented. Hopefully the draft can get some initial feedbacks
    from the community and make sure it is on the right direction so we
    don't waste time on wrong things.~
    
    Related issue: llvm#470 .
    Lancern authored and lanza committed Apr 19, 2024
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  3. [CIR][Codegen] TernaryOp flattening (llvm#550)

    This PR adds flattening for the `cir.ternary`. This PR is just a copy
    pasta from the lowering + tests added/fixed.
    Given the complexity of `switch` flattening, I decided to open one more
    PR for flattening.
    gitoleg authored and lanza committed Apr 19, 2024
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  4. [CIR][CIRGen][NFC] Update buildPointerWithAlignment with LLVM upstrea…

    …m codegen approach
    bcardosolopes authored and lanza committed Apr 19, 2024
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  5. [CIR] Add support for long double type (llvm#536)

    This PR adds support for the `long double` type in C/C++. It includes a
    new CIR type `!cir.long_double` to represent the `long double` type.
    CIRGen and LLVMIR lowering support for the new type is also added.
    
    Since the underlying floating point format used by a `long double` value
    is implementation-defined, the `!cir.long_double` type is parameterized
    to include information about the underlying floating point format.
    Specifically, a `long double` value may have one of the following
    formats:
    
      1) IEEE-754 binary64 format (i.e. the same format used by `double`);
      2) x87 80-bit floating point format;
      3) IEEE-754 binary128 format;
      4) PowerPC double double format.
    
    This PR invents 3 more CIR types to represent the above floating-point
    formats, and `!cir.long_double` is parameterized by another CIR
    floating-point type which represents its underlying format:
    
      - `!cir.long_double<!cir.double>` represents the 1st variant above;
      - `!cir.long_double<!cir.f80>` represents the 2nd variant above;
      - `!cir.long_double<!cir.f128>` represents the 3rd variant above;
    - `!cir.long_double<!cir.ppc_doubledouble>` represents the 4th variant
    above.
    
    Co-authored-by: Bruno Cardoso Lopes <[email protected]>
    2 people authored and lanza committed Apr 19, 2024
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  6. [CIR][CIRGen] Introduce initial support for ASTAllocaAddressSpace (ll…

    …vm#551)
    
    ASTAllocaAddressSpace is a target-specific definition specificed by the
    codegen target info.
    In this commit, initial support is introduced which asserts that only
    the default (no qualifier) address space is supported.
    orbiri authored and lanza committed Apr 19, 2024
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Commits on Apr 20, 2024

  1. [CIR] Introduce StructLayoutAttr

    Mostly NFC.
    
    StructType currently holds optional member variables to track layout specific
    information. Those are lazily computed at time of layout queries. Change the
    implementation to use an attribute as the internal implementation - later on we
    should perhaps incorporate parsing/printing.
    
    This is pre req work for computing alignment based on elements offsets,
    very soon we're gonna also store of array of offsets.
    bcardosolopes authored and lanza committed Apr 20, 2024
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  2. [CIR] Extend StructLayoutAttr to support querying offset for members

    Testcase not added because we are not using the printers and parsers,
    but upcoming atomic work will exercise the path and testcases.
    bcardosolopes authored and lanza committed Apr 20, 2024
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Commits on Apr 22, 2024

  1. [CIR][CodeGen] Adds SwitchOp flattening (llvm#549)

    This PR adds flattening for `SwitchOp`. Despite of the previous PRs,
    here we have to introduce an operation for the flattening, since later
    we'll need to create `llvm.switch` in the lowering.
    So `cir.flat.switch` is a new operation, which barely copied from the
    dialect. I added several tests as well.
    gitoleg authored and lanza committed Apr 22, 2024
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  2. [CIR][NFC] Improve verifier related error messages (llvm#553)

    Fix `CastOp::Verify` and invalid.cir error message. Let these error
    messages with consistent format. llvm#318
    gxsoar authored and lanza committed Apr 22, 2024
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Commits on Apr 23, 2024

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  2. [CIR] Lower certain cir.cmp3way operations to LLVM intrinsics (llvm…

    …#556)
    
    LLVM recently added two families of intrinsics named `llvm.scmp.*` and
    `llvm.ucmp.*` that generate potentially better code for three-way
    comparison operations. This PR lowers certain `cir.cmp3way` operations
    to these intrinsics.
    
    Not all `cir.cmp3way` operations can be lowered to these intrinsics. The
    qualifying conditions are: 1) the comparison is between two integers,
    and 2) the comparison produces a strong ordering. `cir.cmp3way`
    operations that are not qualified are not affected by this PR.
    
    Qualifying `cir.cmp3way` operations may still need some canonicalization
    work before lowering. The "canonicalized" form of a qualifying three-way
    comparison operation yields -1 for lt, 0 for eq, and 1 for gt. This PR
    converts those non-canonicalized but qualifying `cir.cmp3way` operations
    to their canonical forms in the LLVM lowering prepare pass.
    
    This PR addresses llvm#514 .
    Lancern authored and lanza committed Apr 23, 2024
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  3. [CIR][CIRGen] Atomics: Add skeleton for compare and exchange

    NFCI. Any input code still hits an assertion, just a bit down the road.
    bcardosolopes authored and lanza committed Apr 23, 2024
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Commits on Apr 24, 2024

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Commits on Apr 25, 2024

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  2. [CIR][CIRGen] Add dynamic builtin alloca intrinsics support (llvm#547)

    This patch adds the CIRGen for the following builtin functions:
    
    - `alloca`;
    - `_alloca`;
    - `__builtin_alloca`;
    - `__builtin_alloca_uninitialized`.
    
    Missing support to add in the future:
    - Non-default auto initialization setting. The default is to not
    initialize the allocated buffer, which is simpler to implement. This
    commit is leaving the skeleton to implement this feature following
    clang's codegen pattern.
    - It may be possible that the frontend has set non-default address space
    for the alloca's return value. This is the case for OpenCL or AMDGPU
    codes for example. This is handled in clang codegen via address space
    cast, and is left for future implementation. This commit introduces a
    guard-rail around this behaviour.
    orbiri authored and lanza committed Apr 25, 2024
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  3. [CIR[CIRGen][NFC] Refactor build switch op (llvm#552)

    Make logic cleaner and more extensible.
    
    Separate collecting `SwitchStmt` information and building op logic into
    different functions.
    Add more UT to cover nested switch, which also worked before this pr.
    
    This pr is split from llvm#528.
    wenpen authored and lanza committed Apr 25, 2024
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  4. [CIR][NFC] Create LLVM intrinsic calls through `createCallLLVMIntrins…

    …icOp` (llvm#564)
    
    This PR does not introduce any functional changes. It cleans up code in
    `LowerToLLVM.cpp` and creates all LLVM intrinsic calls through the
    unified `createCallLLVMIntrinsicOp` function, as suggested by [this
    comment](llvm#556 (comment))
    in llvm#556 .
    
    Some LLVM intrinsics already have specialized LLVMIR operations. CIR
    operations that depend on these intrinsics are lowered to those
    specialized operations rather than `llvm.call_intrinsic` operation.
    Lancern authored and lanza committed Apr 25, 2024
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  5. [CIR][Lowering] Add MLIR lowering support for CIR cos operations (llv…

    …m#565)
    
    llvm#563 This PR add cir.cos lowering to MLIR math dialect, now it only
    surpport single and double float types, I add an assertation for the
    long double and other unimplemented types
    
    ---------
    
    Signed-off-by: zhoujing <[email protected]>
    zhoujingya authored and lanza committed Apr 25, 2024
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  6. [CIR] Remove redundant error from parseConstantValue (llvm#567)

    ASMParser::parseAttribute is responsible for emitting its own errors or
    forwarding errors of the parsers below it. There is no reason to emit a
    subsequent error as it doesn't add extra information to the user.
    
    As a driveby, beutify a bit the tests that "relied" on this error and
    make the expected error easier to read by moving it to the line before.
    orbiri authored and lanza committed Apr 25, 2024
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Commits on Apr 26, 2024

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  3. [CIR][Lowering] Add long double types for cos operation lowering (llv…

    …m#568)
    
    Add left long double types lowering for cos operation llvm#565
    
    ---------
    
    Signed-off-by: zhoujing <[email protected]>
    zhoujingya authored and lanza committed Apr 26, 2024
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Commits on Apr 27, 2024

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Commits on Apr 30, 2024

  1. [CIR] Support lowering GlobalOp and GetGlobalOp to memref (llvm#574)

    This commit introduce CIRGlobalOpLowering and CIRGetGlobalOpLowering for
    lowering to memref.
    ShivaChen authored Apr 30, 2024
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Commits on May 1, 2024

  1. [CIR][NFC] Homogenize printing/parsing of CIR_PointerType (llvm#575)

    This PR relegates the responsibility of printing/parsing CIR_PointerType
    back to the type itself, getting rid of explicit `cir.ptr` tokens in the
    assembly format of CIR operations.
    
    This means that CIR pointers would now always be printed as
    `!cir.ptr<type>`, so update all tests that had a space before the
    bracket (i.e., `!cir.ptr <type>`) or missing the type alias prefix
    (`cir.ptr` instead of `!cir.ptr`).
    definelicht authored May 1, 2024
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  2. [CIR][OpenMP] Taskwait, Taskyield and Barrier implementation (llvm#555)

    This PR is the final fix for issue llvm#499.
    eZWALT authored May 1, 2024
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  3. [CIR][CIRGen][LLVMLowering] Initial support for GNU void* and func pt…

    …r arithmetic extensions
    
    More generalization coming next.
    bcardosolopes committed May 1, 2024
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Commits on May 2, 2024

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Commits on May 3, 2024

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  2. [CIR][ThroughMLIR] Support lowering CastOp to arith (llvm#577)

    This commit introduce CIRCastOpLowering for lowering to arith.
    ShivaChen authored May 3, 2024
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  4. [CIR][Asm] Remove duplicated lambda & coroutine attributes (llvm#580)

    Do not print in cir.func definition the 'attr { ... }' with coroutine or
    lambda attributes since they are already printed before the function
    name. Otherwise redundancy breaks a future parsing. Sort the attributes
    to be skipped so it is more obvious to see the list of attributes.
    Improve the tests to check there are no spurious attributes anymore.
    keryell authored May 3, 2024
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  5. [CIR][CIRGen] Add skeleton for AArch64 and x86/x86_64 builtin/instrin…

    …sics specific emission
    
    Note that this is a bit different than original LLVM codegen because we are
    splitting down target specific intrinsics to different files.
    
    For now only add AArch64 and x86* as examples, more should come when support
    for more targets happen.
    bcardosolopes committed May 3, 2024
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Commits on May 4, 2024

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Commits on May 5, 2024

  1. [CIR][CIRGen][LLVMLowering] Add support for checked arithmetic builti…

    …ns (llvm#560)
    
    This patch adds support for checked arithmetic builtins, including:
    
      - `__builtin_add_overflow` and `__builtin_{s|u}add{|l|ll}_overflow`;
      - `__builtin_sub_overflow` and `__builtin_{s|u}sub{|l|ll}_overflow`;
      - `__builtin_mul_overflow` and `__builtin_{s|u}mul{|l|ll}_overflow`.
    
    This patch adds a new operation `cir.checked_arith` to represent these
    builtins. Unlike other CIR operations, this new operation has two result
    values. One for the possibly truncated result, and the other for a
    boolean flag that indicates whether the operation has overflowed.
    
    CIRGen and LLVMIR lowering support for the new operation is both
    included in this PR.
    Lancern authored May 5, 2024
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  2. [CIR][NFC] remove redundant test in CIR/IR/data-member-ptr.cir (llvm#582

    )
    
    As suggested in llvm#401, this PR removes the `get_global_member` test in
    `CIR/IR/data-member-ptr.cir` as it is redundant.
    
    The original comment:
    llvm#401 (comment)
    Lancern authored May 5, 2024
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Commits on May 6, 2024

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Commits on May 7, 2024

  1. [CIR][ThroughMLIR] Support lowering ptrStrideOp with loadOp or storeO…

    …p to memref (llvm#585)
    
    This commit introduce CIRPtrStrideOpLowering to lower the following
    pattern to memref load or store.
    
    Rewrite
           %0 = cir.cast(array_to_ptrdecay, %base)
           %1 = cir.ptr_stride(%0, %index)
           cir.load %1
    To
           memref.load %base[%index]
    ShivaChen authored May 7, 2024
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  2. [CIR] Generate cir.dyn_cast for dynamic casts to void ptr (llvm#557)

    This patch update the CIRGen of `dynamic_cast` expressions and make it
    start to generate `cir.dyn_cast` operations for `dynamic_cast`
    expressions that cast to a void pointer. This patch also updates the
    lowering prepare pass so that it lowers such `cir.dyn_cast` operations
    to the code emitted before this patch.
    Lancern authored May 7, 2024
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Commits on May 8, 2024

  1. [CIR][CIRGen][NFCI] Atomics: more skeleton and helpers for c11 init

    Testcase introduced in previous commit still commented, with the
    work in this patch we just move the assertion further.
    bcardosolopes committed May 8, 2024
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  2. [CIR][CodeGen] Goto pass (llvm#562)

    - Add new operations: `GotoOp` and `LabelOp` and inserts them in the codegen
    - Adds a pass that replaces `goto` operations with branches to the corresponded blocks (and erases `LabelOp` from CIR)
    - Update verifiers and tests
    gitoleg authored May 8, 2024
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  3. [CIR][Transforms] Simplify redundant bitcasts (llvm#591)

    Fix llvm#479 .
    
    There are three available stages to place the simplification in.
    
    * A straightforward method is to extend `fold` method for CastOp.
    But CIR does not use CanonicalizerPass, so it does not work.
    * As for somehow equivalent to it, append a pattern to
    `MergeCleanupsPass`.
    But now it is mainly for CFG-related simplifications like block merging.
    I don't know if this is the proper way. Shall we rename it to a broader
    definition?
    * Add a new pass for this issue.
    This is definitely not very reasonable XD. We won't consider it unless
    we're really out of options.
    
    This PR includes the second option. What do you think @bcardosolopes ?
    seven-mile authored May 8, 2024
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  4. [CIR][Lowering] Add MLIR lowering support for CIR sin operations (llv…

    …m#586)
    
    This PR add cir.sin lowering to MLIR math dialect. In the future, I will
    submit a PR to lowering cir.floor, cir.fabs and other operations to
    MLIR.
    
    ---------
    
    Co-authored-by: Gao Xiang <gaoxiang@gaoxiang>
    GaoXiangYa and Gao Xiang authored May 8, 2024
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Commits on May 9, 2024

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  2. [CIR][Lowering] Add MLIR lowering support for CIR math operations (ll…

    …vm#592)
    
    This pr adds `cir.ceil` `cir.exp2` `cir.exp` `cir.fabs` `cir.floor`
    `cir.log` `cir.log10` `cir.log2` `cir.round` `cir.sqrt` lowering to MLIR
    passes and test files.
    GaoXiangYa authored May 9, 2024
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  7. [CIR][LowerToLLVM] Support pointer arithmetic for function types (llv…

    …m#594)
    
    Same as void pointers `void *`, we treat function pointer arithmetic as
    `GEP i8`, according to the original behavior of clang
    ([godbolt](https://godbolt.org/z/EMdvfdTe7)).
    PragmaTwice authored May 9, 2024
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Commits on May 14, 2024

  1. [CIR][CIRGen] Add CIRGen support for float16 and bfloat (llvm#571)

    This PR adds two new CIR floating-point types, namely `!cir.f16` and
    `!cir.bf16`, to represent the float16 format and bfloat format,
    respectively.
    
    This PR converts the clang extension type `_Float16` to `!cir.f16`, and
    converts the clang extension type `__bf16` type to `!cir.bf16`. The type
    conversion for clang extension type `__fp16` is not included in this PR
    since it requires additional work during CIRGen.
    
    Only CIRGen is implemented here, LLVMIR lowering / MLIR lowering should
    come next.
    Lancern authored May 14, 2024
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Commits on May 16, 2024

  1. [NFC] Remove empty file clang/asf (llvm#607)

    The empty file `clang/asf` was introduced in
    e7e05a8. It looks like an accident.
    piggynl authored May 16, 2024
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Commits on May 18, 2024

  1. [CIR][CIRGen] Support for dereferencing void pointers (llvm#595)

    In this PR, we support for dereferencing void pointers as a GNU C
    extension. This include two modification:
    - In CIRGen, we support to build ReturnStmt with void return type.
    - In LowerToLLVM, we support to lower CIR load with void result type to
    LLVM.
    
    It's a part of llvm#579, since I would
    like to split it to two tasks:
    - support pointer arithmetic for function types (llvm#594)
    - **support to dereference void pointer (this PR)**
    PragmaTwice authored May 18, 2024
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  2. [CIR][IR] Fix FuncOp duplicate attr printing (llvm#609)

    This patch ensures that only the pretty-print version of function param
    and result attributes is printed. The tailing dictionary attributes are
    no longer printed.
    
    It also ensures some FuncOp tests are properly validating both parsing
    and printing.
    sitio-couto authored May 18, 2024
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  3. [NFC][CIR] Complete CIR check in test case ctor-member-lvalue-to-rval…

    …ue (llvm#608)
    
    Seems the FIXME has been solved since I've confirmed that these CHECK
    can pass now.
    
    Remove the FIXME and recover these CHECK.
    PragmaTwice authored May 18, 2024
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  4. [CIR][CIRGen] Fix compound assignment for vector types (llvm#610)

    There is [a code
    path](https://github.com/llvm/clangir/blob/3da10fafac66ff125fb59c602e41ad4b4f5cb382/clang/lib/CodeGen/CGExpr.cpp#L2190)
    missing the counterpart in CIRGen of vector types. When using compound
    assignments like `a[0] += a[1]`, this code path is activated and end up
    with NYI.
    seven-mile authored May 18, 2024
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  5. [CIR][CIRGen] Support for signed #cir.ptr (llvm#598)

    The constant initialization isn't related to the pointee. We should be
    able to write #cir.ptr<-1 : i64> : !cir.ptr<whatever>
    Laity000 authored May 18, 2024
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Commits on May 20, 2024

  1. [CIR][CIRGen][LowerToLLVM] Add address space attribute for pointer ty…

    …pe (llvm#606)
    
    This is the prelude of address space support. Linked issue: llvm#418 .
    
    - Add the attribute and implement asm format & type conversion.
    - Make ops like `cir.global` and `cir.get_global` aware of address space, and solve the latter flag.
    - Relax the restriction of default alloca address space. Then we can use correct address spaces for languages like OpenCL in future.
    seven-mile authored May 20, 2024
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Commits on May 21, 2024

  1. [CIR][CIRGen][LLVMLowering] Vtable support for simple multiple inhert…

    …ance without thunk (llvm#569)
    
    This PR adds Vtable support for C++ multiple inheritance without thunk.
    This change contains the CIR codegen and lowering work:
    1. `VTableAttr` should allow adding multiple `ArrayAttr` for
    multi-inheritance.
    3. `VTableAddrPointOpLowering` has been fixed for the multi-vtable
    during the MLIR lowering phase.
        
    Example:
    ```c++
        class Mother {
          virtual void MotherFoo() {}
          virtual void MotherFoo2() {}
        }
        
        class Father {
          virtual void FatherFoo() {}
        }
        
        class Child : public Mother, public Father {
          void MotherFoo() override {}
        }
    ```
    ```mlir
        cir.global linkonce_odr @_ZTV5Child = #cir.vtable<
        {#cir.const_array<[
          #cir.ptr<null> :  #!cir.ptr<!u8i>,
          #cir.global_view<@_ZTI5Child> : !cir.ptr<!u8i>,
          #cir.global_view<@_ZN5Child9MotherFooEv> : !cir.ptr<!u8i>,
          #cir.global_view<@_ZN6Mother10MotherFoo2Ev> : !cir.ptr<!u8i>]> : !cir.array<!cir.ptr<!u8i> x 4>,
         #cir.const_array<[
          #cir.ptr<-8> : !cir.ptr<!u8i>,
          #cir.global_view<@_ZTI5Child> : !cir.ptr<!u8i>,
          #cir.global_view<@_ZN6Father9FatherFooEv> : !cir.ptr<!u8i>]
        > : !cir.array<!cir.ptr<!u8i> x 3>}> : !ty_anon_struct3
    ```
    Laity000 authored May 21, 2024
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Commits on May 22, 2024

  1. [CIR] Move CIRDataLayout.h into include/clang/CIR/Dialect/IR (llvm#621)

    Move it up for visibility, just like the other dialect headers.
    ghehg authored May 22, 2024
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  2. [CIR][CIRGen][NFC] More AArch64 builtins skeleton

    Just mimic the table approach from OG codegen, there are thousands of these,
    it's massive! This doesn't add any new feature yet, continues asserting as
    before.
    
    Coming next: the plan is to reuse the tablegen generated LLVM intrinsics, and
    pass that down to LLVM lowering.
    bcardosolopes committed May 22, 2024
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Commits on May 23, 2024

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  2. [CIR][CIRGen] AArch64 builtins: add support for neon vld1/vst1

    The alignment is still super conversative but proper support should
    come next. The added test file also contains a huge pile of builtins
    we need to support and should allow for incremental support here.
    
    Next steps: fix alignement and enable testing for other vld1/vst1 variants.
    bcardosolopes committed May 23, 2024
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  3. [CIR][CIRGen] Support CodeGen for structural bindings (llvm#618)

    In this PR I added the support for structural bindings in CIR codegen,
    to reason `DecompositionDecl` and `BindDecl` properly.
    
    Note that since `ArrayInitLoopExpr` is not implemented so binding to
    arrays is not supported yet.
    PragmaTwice authored May 23, 2024
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Commits on May 24, 2024

  1. [CIR][ThroughMLIR] Support lowering ForOp to scf (llvm#605)

    This commit introduces CIRForOpLowering for lowering to scf.
    
    The initial commit only support increment loop with lt or le comparison.
    ShivaChen authored May 24, 2024
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  2. [CIR][CodeGen][Bugfix] fixes volatile structs copy (llvm#623)

    This PR fixes a fail on `llvm_unreachable`  for the next case:
    ``` 
    volatile A vol_a;
    A foo7() {
      return vol_a;
    }
    ```
    Basically, it's just a copy-pasta from the original `code-gen`. 
    Also, I added the `isVolatile` attribute for the `cit.copy` operation
    gitoleg authored May 24, 2024
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  3. [CIR][CodeGen][Bugfix] store fptr of a function with no args (llvm#622)

    This PR fixes the next bug showed in the example below:
    ```
    typedef int (*fn_t)();
    int get42() { return 42; }
    
    void foo() {
      fn_t f = get42;
    }
    ```
    
    The function type `fn_t` is generated as the variadic one due to no arg
    types listed, this is the `codegen` feature. And once we store the
    function pointer to a real function - a pointer to `get42` here has the
    expected `i32 ()*` type - we get a verification error, so `bitcast` is
    needed. The original `codegen` doesn't have it because of opaque
    pointers used, and had the `bitcast` earlier, long time ago:
    ```
    %f = alloca i32 (...)*
    store i32 (...)* bitcast (i32 ()* @GET42 to i32 (...)*), i32 (...)** %f
    ```
    gitoleg authored May 24, 2024
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  4. [CIR] Add -cir-mlir-scf-prepare to simplify lowering to SCF (llvm#604)

    This commit introduces SCFPreparePass to
    1) Canonicalize IV to LHS of loop comparison
    For example, transfer `cir.cmp(gt, %bound, %IV)` to `cir.cmp(lt, %IV,
    %bound)`. So we could use RHS as boundary and use `lt` to determine it's
    an upper bound.
    2) Hoist loop invariant operations in condition block out of loop.
    The condition block may be generated as following which contains the
    operations produced upper bound.
    SCF for loop required loop boundary as input operands. So we might need
    to hoist the boundary operations out of loop.
    ```
          cir.for : cond {
            %4 = cir.load %2 : !cir.ptr<!s32i>, !s32i
            %5 = cir.const #cir.int<100> : !s32i       <- upper bound
            %6 = cir.cmp(lt, %4, %5) : !s32i, !s32i
            %7 = cir.cast(int_to_bool, %6 : !s32i), !cir.boo
            cir.condition(%7
           } body {
    ```
    ShivaChen authored May 24, 2024
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  5. [CIR][CIRGen][NFC] Add optional alignment to cir.load and cir.store

    Don't hook this up with CIRGen just yet.
    
    While here update parsing tests to include `atomic(seq_cst)`.
    bcardosolopes committed May 24, 2024
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  8. [CIR][CodeGen] Support trailing_zeros for constant string literals (l…

    …lvm#617)
    
    The patch resolves [issue
    llvm#248](llvm#248). It can be considered
    a subsequent patch to [llvm#373](llvm#373),
    where the case of empty strings was processed.
    
    The new patch adds processing for non-empty strings that may contain
    trailing zeros, such as:
    ```
    char big_string[100000] = "123";
    ```
    That is converted to
    ```
    @big_string = #cir.const_array<"123" : !cir.array<!s8i x 3>, trailing_zeros> : !cir.array<!s8i x 100000>
    ```
    ivanmurashko authored May 24, 2024
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Commits on May 28, 2024

  1. [CIR][IR][NFC] Fix CallOp builder with void return (llvm#629)

    One of the builders was adding a retun value to the CallOp when given a
    void return type. The expected behavior is to not add a return value.
    Two other minor fixes were added to the return value: its constraint was
    replaced from variadic to optional and it was assigned a name. This
    prevents function calls with multiple returns and facilitates access to
    the single return value, respectively.
    sitio-couto authored May 28, 2024
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  2. [CIR][LowerToLLVM][CXXABI] Lower cir.va.arg (llvm#573)

    lowering var_arg op for ARM64 architecture. This is CIR lowering.
    
    This PR modified LoweringPrepare CXXABI code to make
    LoweringPrepareArm64CXXABI class inherit more generic
    LoweringPrepareItaniumCXXABI, this way lowering var_arg would be only
    meaningful for arm64 targets and for other arch its no op for now.
    
    The ABI doc and detailed algorithm description can be found in this
    official doc.
    
    [](https://github.com/ARM-software/abi-aa/blob/617079d8a0d45bec83d351974849483cf0cc66d5/aapcs64/aapcs64.rst#appendix-variable-argument-lists)
    ghehg authored May 28, 2024
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Commits on May 29, 2024

  1. [CIR][Lowering] Add MLIR lowering support for CIR shift operations (l…

    …lvm#630)
    
    This pr adds cir.shift lowering to MLIR passes and test files.
    Krito authored May 29, 2024
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  2. [CIR] Add C source code as comments in for.cir unit test (llvm#625)

    With C source code, we would able to update the CIR tests when needed.
    ShivaChen authored May 29, 2024
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  3. [CIR][CIRGen] Honor alignment on createAlignedLoad

    One more step into fixing overall alignment requirements.
    bcardosolopes committed May 29, 2024
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Commits on May 30, 2024

  1. [CIR][Passes] Add CallConvLowering pass skeleton (llvm#642)

    This patch adds a new CallConvLowering pass that aims to lower the
    calling conventions of the functions in the module. It also includes a
    new Clang command line option to enable it. Also, it is considered a
    part of the lowering prepare set of passes, as it is unlikely to be used
    elsewhere in the pipeline.
    
    Since this will be dealing with ABI/Target-specific information, it
    requires AST info. For this reason, it can only be executed through the
    clang driver or cc1 tool for now as CIR does not encode AST info.
    
    This pass is disabled by default and can be enabled by passing the flag
    `-fclangir-call-conv-lowering`. Once this pass is more mature, it should
    be enabled by default as a required step to lower to LLVM Dialect.
    sitio-couto authored May 30, 2024
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  2. [CIR][CIRGen] Add CIRGen for binary fp2fp builtin operations (llvm#616)

    This PR adds the following operations for the builtin binary fp2fp
    functions:
    
      - `cir.copysign` for `__builtin_copysign`;
      - `cir.fmax` for `__builtin_fmax`;
      - `cir.fmin` for `__builtin_fmin`;
      - `cir.fmod` for `__builtin_fmod`;
      - `cir.pow` for `__builtin_pow`.
    
    This PR also includes CIRGen support for these new operations.
    Lancern authored May 30, 2024
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Commits on May 31, 2024

  1. [CIR][Interface] introduce CIRGlobalValueInterface for GlobalOp and F…

    …uncOp (llvm#641)
    
    CIRGlobalValueInterface inherits from mlir::Symbol as it should, and
    GlobalOp and FuncOp now has interface mlir::Symbol through
    CIRGlobalValueInterface
    
    and this PR basically make function isDeclarationForLinker into the
    CIRGlobalValueInterface interface. We also change some call sites of
    isDeclaration to use CIRGlobalValueInterface when its appropriate.
    ghehg authored May 31, 2024
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  2. [CIR][ThroughMLIR] lowering cir.bit.clz and cir.bit.ctz to MLIR (llvm…

    …#645)
    
    This pr adds cir.bit.clz and cir.bit.ctz lowering to MLIR passes and
    test files.
    I will complete the lowering of other `cir.bit` operations in subsequent
    PRs.
    Krito authored May 31, 2024
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  3. [CIR][CIRGen] Aarch64 Builtins: add more load/store variants

    Now that alignment computation is correct for neon, add more neon types
    for load/store.
    bcardosolopes committed May 31, 2024
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Commits on Jun 3, 2024

  1. [CIR][CodeGen] Get rid of ZeroInitConstOp (llvm#646)

    mlir::cir::ZeroInitConstOp was replaced with llvm.mlir.zero
    
    resolves [llvm#627](llvm#627)
    ivanmurashko authored Jun 3, 2024
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  2. [CIR][Pipeline] Support -fclangir-analysis-only (llvm#638)

    Close llvm#633.
    
    This patch introduces `-fclangir-analysis-only` option to allow the
    users to consume the AST to the CIR (and potential analysis passes, this
    can be done by specifying `-Xclang -fclangir-lifetime-check=""` now or
    some default value in following patches) and also generating the LLVM IR
    by the traditional code gen path. This will be helpful to use CIR with
    real world projects without worrying the correctness and completeness of
    CIR CodeGen part.
    ChuanqiXu9 authored Jun 3, 2024
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  3. [CIR][ThroughMLIR] lowering cir.bit.* to MLIR (llvm#654)

    This pr adds cir.bit.ffs cir.bit.parity cir.bit.clrsb cir.bit.popcount
    lowering to MLIR passes and test files.
    Krito authored Jun 3, 2024
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  4. [CIR][CIRGen] Builtins: add __sync_fetch_and_add (llvm#631)

    This PR adds support for  atomic `__sync_fetch_and_add`.
    
    Basically it's a copy-pasta from the original `codegen`.
    The only thing that I doubt about is what exact operation I need to
    create in CIR. The first approach I used was to create `AtomicRMW`
    operation in CIR. But as far as I see I can use the existing
    `AtomicFetch` instead. Is it correct? or it's better to add a new op
    here?
    gitoleg authored Jun 3, 2024
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  5. [CIR] Centralize feature guarding (llvm#649)

    Moves all feature guarding static methods into a to a single header
    file, centralizing the tracking of missing features in a common place
    regardless of where it impacts the compilation pipeline. It also moves
    the feature guarding logic into CIR's root include folder so that any
    CIR library may use it.
    sitio-couto authored Jun 3, 2024
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Commits on Jun 5, 2024

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  2. [CIR] Add Case Op Kind Range (llvm#650)

    Make lowering result of case range smart.
    
    Resolve llvm#632
    wenpen authored Jun 5, 2024
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  3. [CIR][LLVMLowering] Add LLVM lowering for unary fp2fp builtins (llvm#651

    )
    
    This patch adds LLVM lowering support for unary fp2fp builtins.
    
    Those builtins that should be lowered to runtime function calls are
    lowered to such calls during lowering prepare. Other builtins are
    lowered to LLVM intrinsic calls during LLVM lowering.
    Lancern authored Jun 5, 2024
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  4. [CIR][ABI] Create target lowering library skeleton (llvm#643)

    This patch adds a new TargetLowering library that intends to add supoort
    for lowering CIR code to target specific CIR code. It is largely based
    on the original codegen library used to lower AST nodes to ABI/Target
    -specific LLVM IR instructions. Because of this, each file has a comment
    specifying the original codegen file that inspired the new file. The
    idea is that anyone who wishes to expand this library can look at the
    original codegen file to understand how to implement the new feature.
    
    In some cases, CIRGen defers the handling of ABI/target-specific details
    for a later stage in the pipeline. One reason for this is to keep the
    intermediate representation on a higher-level, which makes it easier to
    reason about and to perform optimizations. However, we still need to
    lower such representation to a target-specific format at some point.
    Some examples are ctor/dtors and calling conventions, which are not
    fully handled by CIRGen. The new library will be responsible for these
    lowerings.
    
    Some files are empty but will eventually be used and a few getters and
    methods where added to avoid unused warnings. Missing features in this
    library are tracked in a dedicated MissingFeature.h header.
    sitio-couto authored Jun 5, 2024
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Commits on Jun 6, 2024

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  3. [CIR][CIRGen] Support OpenCL Vector Types (llvm#613)

    Resolve llvm#532 .
    
    Support CIRGen of `ExtVectorElementExpr` that includes swizzle `v.xyx`
    and subscription `v.s0`.
    seven-mile authored Jun 6, 2024
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  4. Revert "[CIR][Pipeline] Support -fclangir-analysis-only (llvm#638)"

    This reverts commit f4d538f.
    
    It's causing a circular dependency in shared lib builds. See llvm#655
    bcardosolopes committed Jun 6, 2024
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  5. [CIR][CIRGen] Create a new block after break and continue (llvm#611)

    Without this patch, CIR CodeGen continue to generate in the same block
    after `cir.break` and `cir.continue`, which would cause verification
    error because `cir.break` and `cir.continue` should appear at the end of
    blocks.
    
    This patch creates a new dangling block after generating `cir.break` and
    `cir.continue` to fix the issue.
    
    This will fix llvm#323.
    piggynl authored Jun 6, 2024
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  6. [CIR][CIRGen][LowerToLLVM] Support address space casting (llvm#652)

    * New `CastKind::addrspace_cast` for `cir.cast`
    * `TargetCIRGenInfo::performAddrSpaceCast` helper for non-constant
    values only
    * CIRGen for address space casting of pointers and references
    * Lowering to LLVM
    seven-mile authored Jun 6, 2024
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Commits on Jun 7, 2024

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  2. [CIR][CodeGen] builtins: adds __sync_bool/val_compare_and_swap (llvm#656

    )
    
    This PR adds support for ` __sync_bool_compare_and_swap` and `
    __sync_val_compare_and_swap`.
    gitoleg authored Jun 7, 2024
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  3. [CIR][ThroughMLIR] Support lowering cir.condition and cir.while to sc…

    …f.condition, scf.while (llvm#636)
    
    This pr intruduces CIRConditionLowering and CIRWhileLowering for
    lowering to scf.
    GaoXiangYa authored Jun 7, 2024
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  4. [CIR][ThroughMLIR] Support lowering cir.if to scf.if (llvm#640)

    This pr introduces CIRIfOpLowering for lowering cir.if to scf.if
    GaoXiangYa authored Jun 7, 2024
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Commits on Jun 8, 2024

  1. [CIR][LowerToLLVM] Fix crash in PtrStrideOp lowering

    Assumptions about values having a defining op can be misleading when block
    arguments are involved.
    bcardosolopes committed Jun 8, 2024
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Commits on Jun 10, 2024

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