Release build (v.2.0.0)

Ripes version 2.0.0

The latest major release of Ripes represents a major overhaul of most parts of the codebase; mainly the simulator/visualization infrastructure as well as most of the MVC models used throughout.
As of version 2.0.0, Ripes is now based on simulators implemented in VSRTL, a C++ framework for describing and visualizing digital circuits.
For an introduction to many of the new features, please refer to the introduction wiki page.

What's new

Multiple Processor Models

The set of processor models shipping in version 2.0.0 (described below) aims to address each level of added complexity when going from a single cycle processor to a fully functioning, in-order pipelined processor. Version 2.0.0 introduces the following processor models:

• Single cycle
• 5 Stage without hazard detection/resolution and fowarding
• 5 Stage without hazard detection/resolution
• 5-stage Pipeline

Each processor is provided with two layouts:

• Standard: A simplified view of the processor. Control components and signals are omitted.
• Extended: An extended view of the processor. Control components and signals are visible as well as wire bit-widths.

Reversible Circuits

Utilizing VSRTLs reversible circuit simulation, it is now possible to "undo" clocking the circuit (denoted as reversing). This may come in handy for investigating specific pipeline situations and how they were set up.
All UI parts, such as the instruction view and execution statistics are modified accordingly, when reversing the circuit.

Interactable Processor View

• Clicking a port of a component will highlight the wire connected to the given port. This is especially helpful when trying to get an overview of some of the more complex circuit layouts.
• If a different arrangement of the components is desired, the view may be unlocked (right click outside the processor model). Then, components may be moved and wires may be modified.

ELF support

Ripes may now load and execute ELF files compiled for the RV32IM instruction set. For a guide on how to compile and execute an example C program, refer to the following wiki page:
Building and Executing C Programs with Ripes

UI/Usage Changes

• The ecall function code is now required to be in register a7, compatible with the linux ABI as well as other popular educational simulators.
• (Almost) all parts of the UI have been rewritten, removing a bunch of ugly code, hacks and bugs.

Continuous build (master)

Travis CI build log: https://travis-ci.com/mortbopet/Ripes/builds/215804468

Release build (v.1.0.4)

Travis CI build log: https://travis-ci.org/mortbopet/Ripes/builds/631827672

Release build (v.1.0.3)

Travis CI build log: https://travis-ci.org/mortbopet/Ripes/builds/477467426/

Ripes 1.0

Initial Ripes release.

Includes prebuilt binaries for Windows and Ubuntu