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Err(Timeout) #3

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pdgilbert opened this issue Jun 20, 2020 · 2 comments
Open

Err(Timeout) #3

pdgilbert opened this issue Jun 20, 2020 · 2 comments

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@pdgilbert
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I've been playing with your example, and have gotten to compiling and running on both a blue pill using stm32f1xx-hal and on a nucleo-64 (stm32f411) using stm32f4xx-hal, but I only get Err(Timeout) and not any readings. Possibly I have the wait time too short? With stm32f3xx-hal I get the error you mention in issue #1 . My code is below. (I'm using git versions of the hals.)

I've changed several things relative to your example: pin to pa8, source of core peripherals to the hal rather than cortex_m, and the clock. The last may be most important(?) but I did not know how to do this correctly with stm32f1xx-hal and I hit a panic with stm32f4xx-hal, possibly due to the attempted setting exceeding my hardware capabilities.

Regarding the pull-up resister, I was not sure if the internal resister gets used with just pa8.into_open_drain_output() but I get the same result both with and without an external resistor (33K ohm, which also may not be correct).

I am a newbie and I've probably messed with something I should not have touched. I'm not even sure how to determine if this is a hardware or software problem. Any suggestions would be appreciated.

#![deny(unsafe_code)]
#![no_main]
#![no_std]

#[cfg(debug_assertions)]
extern crate panic_semihosting;

#[cfg(not(debug_assertions))]
extern crate panic_halt;

use cortex_m_rt::entry;
use cortex_m_semihosting::hprintln;

use dht11::Dht11;

#[cfg(feature = "stm32f1xx")]
use stm32f1xx_hal::{prelude::*, pac::{Peripherals, CorePeripherals}, delay::Delay };

#[cfg(feature = "stm32f3xx")]
use stm32f3xx_hal::{prelude::*, stm32::{Peripherals, CorePeripherals}, delay::Delay };

#[cfg(feature = "stm32f4xx")]
use stm32f4xx_hal::{prelude::*, pac::{Peripherals, CorePeripherals}, delay::Delay };

#[entry]
fn main() -> ! {
    let cp = CorePeripherals::take().unwrap();
    let  p = Peripherals::take().unwrap();

    #[cfg(feature = "stm32f1xx")]
    let mut rcc = p.RCC.constrain();
    #[cfg(feature = "stm32f1xx")]
    let clocks = rcc.cfgr.freeze(&mut p.FLASH.constrain().acr);
    #[cfg(feature = "stm32f1xx")]
    let mut gpioa  = p.GPIOA.split(&mut rcc.apb2);
    #[cfg(feature = "stm32f1xx")]
    let pin_a8 = gpioa.pa8.into_open_drain_output(&mut gpioa.crh);  // DHT11 data on pin  A8.


    #[cfg(feature = "stm32f3xx")]
    let mut rcc   = p.RCC.constrain();
    #[cfg(feature = "stm32f3xx")]
    let clocks    = rcc.cfgr.freeze(&mut p.FLASH.constrain().acr);
    #[cfg(feature = "stm32f3xx")]
    let mut gpioa  = p.GPIOA.split(&mut rcc.ahb);
    #[cfg(feature = "stm32f3xx")]
    let pin_a8 = gpioa.pa8.into_open_drain_output(&mut gpioa.moder, &mut gpioa.otyper);  


    #[cfg(feature = "stm32f4xx")]    // Use HSE oscillator
    let clocks =  p.RCC.constrain().cfgr.freeze();
    // next gives panicked at 'assertion failed: !sysclk_on_pll || 
    //                  sysclk <= sysclk_max && sysclk >= sysclk_min'
    //let clocks = p.RCC.constrain().cfgr.use_hse(8.mhz()).sysclk(168.mhz()).freeze();
    #[cfg(feature = "stm32f4xx")]
    let pin_a8 = p.GPIOA.split().pa8.into_open_drain_output();  // DHT11 data on pin A8.


    hprintln!("dht11 ...").unwrap();
    let mut dht11 = Dht11::new(pin_a8);

    hprintln!("delay ...").unwrap();
    let mut delay = Delay::new(cp.SYST, clocks);

    hprintln!("entering sensor reading loop...").unwrap();

    loop {
        hprintln!("{:?}", dht11.perform_measurement(&mut delay)).unwrap();
        delay.delay_ms(1000_u16);
    }
}


@Rokasbarasa1
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The timing error should be solved by compiling in release mode. I tested on stm32f303xc. For more info look into pdgilbert's fork of this repository.
Thank you @pdgilbert

@pdgilbert
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Just to be clear for anyone reading this issue, I have not been using or testing this crate (dht11-rs) for some time now. I use crate dht-sensor from https://github.com/michaelbeaumont/dht-sensor which supports devices DHT11 and DHT22. (My fork is of that crate, but my fork is not active.) I have done some hardware testing with that crate and CI build testing along with several other examples for device hal crates stm32f0xx-hal, stm32f1xx-hal, stm32f3xx-hal, stm32f4xx-halstm32f7xx-hal, stm32h7xx-hal, stm32l0xx-hal, stm32l1xx-hal, and stm32l4xx-hal at https://github.com/pdgilbert/rust-integration-testing/actions. Example code using dht-sensor is at https://github.com/pdgilbert/rust-integration-testing/blob/main/examples/misc/dht.rs. Compiling in release mode does seem to be important.

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