.gitlab-ci.yml

# Copyright 2022 ETH Zurich and University of Bologna.
# Solderpad Hardware License, Version 0.51, see LICENSE for details.
# SPDX-License-Identifier: SHL-0.51

# Author: Michael Rogenmoser <michaero@iis.ee.ethz.ch>

variables:
  VSIM: questa-2023.4 vsim
  BENDER: bender
  PYTHON: /usr/local/anaconda3/bin/python

stages:
  - init
  - build
  - run

collect-bender-sources:
  stage: init
  script:
    - $BENDER checkout
  artifacts:
    paths:
      - .bender/
      - Bender.lock

compile-vsim:
  stage: build
  needs:
    - collect-bender-sources
  script:
    - make compile-sim | tee compile.log 2>&1
    - '! grep "\*\* Error" compile.log'
  artifacts:
    paths:
      - scripts/
      - work/
      - modelsim.ini

compile-vcs:
  stage: build
  needs:
    - collect-bender-sources
  parallel:
    matrix:
      - TB_DUT:
        - tb_floo_router
        - tb_floo_vc_router
        - tb_floo_axi_chimney
        - tb_floo_nw_chimney
        - tb_floo_rob
  script:
    - make bin/${TB_DUT}.vcs | tee compile.log 2>&1
  artifacts:
    paths:
      - bin/

compile-meshes:
  stage: build
  needs:
    - collect-bender-sources
  parallel:
    matrix:
      - DUT: [axi_mesh, nw_mesh]
        ROUTE_ALGO: [xy, src, id]
  script:
    # Install `floogen`
    - $PYTHON -m venv .venv
    - source .venv/bin/activate
    - pip install .
    # Generate sources
    - floogen -c floogen/examples/${DUT}_${ROUTE_ALGO}.yml -o generated --no-format
    # Compile the network
    - make compile-sim EXTRA_BENDER_FLAGS="-t ${DUT}" WORK="work_${DUT}_${ROUTE_ALGO}" | tee compile.log 2>&1
    - '! grep "\*\* Error" compile.log'
  artifacts:
    paths:
      - work_*/

run-sim:
  stage: run
  needs:
    - collect-bender-sources
    - compile-vsim
    - compile-vcs
  parallel:
    matrix:
      - SIMULATOR: [vsim, vcs]
        TB_DUT:
        - tb_floo_router
        - tb_floo_vc_router
        - tb_floo_axi_chimney
        - tb_floo_nw_chimney
        - tb_floo_rob
  script:
    - |
      if [ "${SIMULATOR}" = "vsim" ]; then
        make run-${SIMULATOR}-batch | tee ${SIMULATOR}.log 2>&1
        grep "Errors: 0," ${SIMULATOR}.log
      else
        make run-${SIMULATOR}-batch
      fi

run-traffic:
  stage: run
  needs:
    - collect-bender-sources
    - compile-meshes
  variables:
    JOB_NAME: mesh
  parallel:
    matrix:
      - DUT: [axi_mesh, nw_mesh]
        ROUTE_ALGO: [xy, src, id]
        TRAFFIC_TYPE: [random, hbm, shuffle, single_dest_center]
        TRAFFIC_RW: [read, write]
  script:
    - make jobs
    - make run-sim-batch TB_DUT=tb_floo_${DUT} WORK=work_${DUT}_${ROUTE_ALGO} | tee vsim.log 2>&1
    - 'grep "Errors: 0," vsim.log'

morty:
  stage: build
  needs:
    - collect-bender-sources
  script:
    - $BENDER sources -f > source_list.txt
    - morty -f source_list.txt