You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
torchvision.ops.boxes.batched_nms on CUDA GPU slows down considerably when then number of bounding boxes involved increases.
The slow down is associated with Device -> Host transfer, and is linked to the iterative part of the Non Maximum Suppression (NMS) algorithm. In a nutshell the IoU map is computed on the device, then the mask is copied to the CPU to perform the iterative unwrap, which result is copied back to the device (from here and below).
The mask size grows quadratically with the number of input bounding boxes and we see a large TX rate when running on 30_000+ boxes.
In comparison the OpenLabs mmcv solution does the same thing for the IoU map but runs a custom kernel to do the unwrap directly on the device. The implemented kernel is not very efficient compute wise but save the data transfer cost, which is the main bottleneck.
I benchmarked torchvision batched_nms against mmcv's on V100 and A100 GPUs.
Both figures show the speed factor when comparing a solution to torchvision.ops.boxes._batched_nms_vanilla (there is 2 nms in torchvision, selected based on the number of elements. Here , torchvision.ops.boxes._batched_nms_vanilla is used a base comparison and we compare torchvision.ops.boxes._batched_nms_coordinate_trick and mmcv batched_nms). From 30k boxes and above mmcv NMS is x20+ faster.
Is there a reason why we keep this GPU -> CPU transfer ?
Could we improve the scalability by having a similar on-device additional kernel ?
Additional informations
All boxes are from the same class
Benchmark has been done using torch.utils.benchmark.Timer on 100 examples for each NMS.
I did not know if this should be put as Bug report or Feature request.
Versions
PyTorch version: 2.5.0+cu124
Is debug build: False
CUDA used to build PyTorch: 12.4
ROCM used to build PyTorch: N/A
OS: Ubuntu 22.04.5 LTS (x86_64)
GCC version: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0
Clang version: 14.0.0-1ubuntu1.1
CMake version: version 3.24.1
Libc version: glibc-2.35
Python version: 3.10.14 (main, May 14 2024, 06:11:20) [GCC 11.4.0] (64-bit runtime)
Python platform: Linux-5.10.219-208.866.amzn2.x86_64-x86_64-with-glibc2.35
Is CUDA available: True
CUDA runtime version: 12.1.105
CUDA_MODULE_LOADING set to: LAZY
GPU models and configuration: GPU 0: NVIDIA A100-SXM4-40GB
Nvidia driver version: 535.183.01
cuDNN version: Probably one of the following:
/usr/lib/x86_64-linux-gnu/libcudnn.so.8.9.2
/usr/lib/x86_64-linux-gnu/libcudnn_adv_infer.so.8.9.2
/usr/lib/x86_64-linux-gnu/libcudnn_adv_train.so.8.9.2
/usr/lib/x86_64-linux-gnu/libcudnn_cnn_infer.so.8.9.2
/usr/lib/x86_64-linux-gnu/libcudnn_cnn_train.so.8.9.2
/usr/lib/x86_64-linux-gnu/libcudnn_ops_infer.so.8.9.2
/usr/lib/x86_64-linux-gnu/libcudnn_ops_train.so.8.9.2
HIP runtime version: N/A
MIOpen runtime version: N/A
Is XNNPACK available: True
CPU:
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Address sizes: 46 bits physical, 48 bits virtual
Byte Order: Little Endian
CPU(s): 96
On-line CPU(s) list: 0-95
Vendor ID: GenuineIntel
Model name: Intel(R) Xeon(R) Platinum 8275CL CPU @ 3.00GHz
CPU family: 6
Model: 85
Thread(s) per core: 2
Core(s) per socket: 24
Socket(s): 2
Stepping: 7
BogoMIPS: 5999.99
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq monitor ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm 3dnowprefetch invpcid_single pti fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves ida arat pku ospke
Hypervisor vendor: KVM
Virtualization type: full
L1d cache: 1.5 MiB (48 instances)
L1i cache: 1.5 MiB (48 instances)
L2 cache: 48 MiB (48 instances)
L3 cache: 71.5 MiB (2 instances)
NUMA node(s): 2
NUMA node0 CPU(s): 0-23,48-71
NUMA node1 CPU(s): 24-47,72-95
Vulnerability Gather data sampling: Unknown: Dependent on hypervisor status
Vulnerability Itlb multihit: KVM: Mitigation: VMX unsupported
Vulnerability L1tf: Mitigation; PTE Inversion
Vulnerability Mds: Vulnerable: Clear CPU buffers attempted, no microcode; SMT Host state unknown
Vulnerability Meltdown: Mitigation; PTI
Vulnerability Mmio stale data: Vulnerable: Clear CPU buffers attempted, no microcode; SMT Host state unknown
Vulnerability Reg file data sampling: Not affected
Vulnerability Retbleed: Vulnerable
Vulnerability Spec rstack overflow: Not affected
Vulnerability Spec store bypass: Vulnerable
Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2: Mitigation; Retpolines, STIBP disabled, RSB filling, PBRSB-eIBRS Not affected
Vulnerability Srbds: Not affected
Vulnerability Tsx async abort: Not affected
Versions of relevant libraries:
[pip3] numpy==2.1.2
[pip3] nvidia-cublas-cu12==12.4.5.8
[pip3] nvidia-cuda-cupti-cu12==12.4.127
[pip3] nvidia-cuda-nvrtc-cu12==12.4.127
[pip3] nvidia-cuda-runtime-cu12==12.4.127
[pip3] nvidia-cudnn-cu12==9.1.0.70
[pip3] nvidia-cufft-cu12==11.2.1.3
[pip3] nvidia-curand-cu12==10.3.5.147
[pip3] nvidia-cusolver-cu12==11.6.1.9
[pip3] nvidia-cusparse-cu12==12.3.1.170
[pip3] nvidia-nccl-cu12==2.21.5
[pip3] nvidia-nvjitlink-cu12==12.4.127
[pip3] nvidia-nvtx-cu12==12.4.127
[pip3] onnx==1.17.0
[pip3] onnxruntime==1.20.0
[pip3] pytorch-ranger==0.1.1
[pip3] torch==2.5.0
[pip3] torch-optimizer==0.3.0
[pip3] torchaudio==2.5.0
[pip3] torchmetrics==1.4.0.post0
[pip3] torchvision==0.20.0
[pip3] triton==3.1.0
[conda] No relevant packages
The text was updated successfully, but these errors were encountered:
🐛 Describe the bug
Description
torchvision.ops.boxes.batched_nms
on CUDA GPU slows down considerably when then number of bounding boxes involved increases.The slow down is associated with Device -> Host transfer, and is linked to the iterative part of the Non Maximum Suppression (NMS) algorithm. In a nutshell the IoU map is computed on the device, then the mask is copied to the CPU to perform the iterative unwrap, which result is copied back to the device (from here and below).
The mask size grows quadratically with the number of input bounding boxes and we see a large TX rate when running on 30_000+ boxes.
In comparison the OpenLabs mmcv solution does the same thing for the IoU map but runs a custom kernel to do the unwrap directly on the device. The implemented kernel is not very efficient compute wise but save the data transfer cost, which is the main bottleneck.
I benchmarked
torchvision
batched_nms againstmmcv
's onV100
andA100
GPUs.Both figures show the speed factor when comparing a solution to
torchvision.ops.boxes._batched_nms_vanilla
(there is 2 nms in torchvision, selected based on the number of elements. Here ,torchvision.ops.boxes._batched_nms_vanilla
is used a base comparison and we comparetorchvision.ops.boxes._batched_nms_coordinate_trick
andmmcv
batched_nms). From 30k boxes and abovemmcv
NMS is x20+ faster.Is there a reason why we keep this GPU -> CPU transfer ?
Could we improve the scalability by having a similar on-device additional kernel ?
Additional informations
torch.utils.benchmark.Timer
on 100 examples for each NMS.Versions
The text was updated successfully, but these errors were encountered: