diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml new file mode 100644 index 000000000000..e468431ee627 --- /dev/null +++ b/.github/workflows/ci.yml @@ -0,0 +1,150 @@ +name: CI + +on: [push, pull_request] + +jobs: + + pre_build: + + runs-on: ubuntu-22.04 + + outputs: + should_skip: ${{ steps.skip_check.outputs.should_skip }} + + steps: + - name: Skip Duplicate Actions + id: skip_check + uses: fkirc/skip-duplicate-actions@v5 + with: + concurrent_skipping: 'same_content_newer' + + build_debug_kernel: + + needs: pre_build + if: ${{ needs.pre_build.outputs.should_skip != 'true' }} + + runs-on: ubuntu-22.04 + + steps: + + - name: Check out repository code + uses: actions/checkout@v4 + + - name: Install dependencies + run: | + sudo apt update + sudo apt install -y build-essential gawk flex bison openssl dkms \ + libelf-dev libudev-dev libpci-dev libiberty-dev autoconf dwarves \ + libncurses-dev libssl-dev devscripts debhelper-compat + + - name: Generate .config + run: | + rm -rf .git .gitattributes .gitignore + export EXTRAVERSION="-debug" + make ARCH=x86_64 defconfig + ./scripts/kconfig/merge_config.sh .config ./scripts/package/truenas/debian_amd64.config + ./scripts/kconfig/merge_config.sh .config ./scripts/package/truenas/truenas.config + ./scripts/kconfig/merge_config.sh .config ./scripts/package/truenas/tn-debug.config + make syncconfig + make archprepare + ./scripts/package/mkdebian + # Workaround to provide additional free space for kernel build + # https://github.com/actions/virtual-environments/issues/2840 + sudo rm -rf /usr/share/dotnet + sudo rm -rf /opt/ghc + sudo rm -rf "/usr/local/share/boost" + sudo rm -rf "$AGENT_TOOLSDIRECTORY" + + - name: Build Kernel + run: | + export EXTRAVERSION="-debug" + cp .config /tmp/ + make distclean + mv /tmp/.config .config + make -j$(nproc) bindeb-pkg + + - name: Prepare artifacts + run: | + mkdir -p debug-kernel + mv ../*.deb ./debug-kernel/ + mv ../*.changes ./debug-kernel/ + mv ../*.buildinfo ./debug-kernel/ + cp .config ./debug-config + + - name: Export artifacts + uses: actions/upload-artifact@v4 + with: + name: ${{github.sha}}-debug + path: ./debug-kernel + + - name: Status + run: | + echo "Status: ${{job.status}}" + + build_production_kernel: + + needs: pre_build + if: ${{ needs.pre_build.outputs.should_skip != 'true' }} + + runs-on: ubuntu-22.04 + + steps: + + - name: Check out repository code + uses: actions/checkout@v4 + + - name: Install dependencies + run: | + sudo apt update + sudo apt install -y build-essential gawk flex bison openssl dkms \ + libelf-dev libudev-dev libpci-dev libiberty-dev autoconf dwarves \ + libncurses-dev libssl-dev libelf-dev libdw-dev systemtap-sdt-dev \ + libunwind-dev libslang2-dev libperl-dev binutils-dev libiberty-dev \ + python3-dev liblzma-dev libzstd-dev libcap-dev libnuma-dev \ + libbabeltrace-dev openjdk-11-jdk devscripts libncurses-dev \ + libssl-dev debhelper-compat libpfm4-dev libtraceevent-dev \ + libcapstone-dev llvm-dev + + - name: Generate .config + run: | + rm -rf .git .gitattributes .gitignore + export EXTRAVERSION="-production" + make ARCH=x86_64 defconfig + ./scripts/kconfig/merge_config.sh .config ./scripts/package/truenas/debian_amd64.config + ./scripts/kconfig/merge_config.sh .config ./scripts/package/truenas/truenas.config + ./scripts/kconfig/merge_config.sh .config ./scripts/package/truenas/tn-production.config + make syncconfig + make archprepare + ./scripts/package/mkdebian + # Workaround to provide additional free space for kernel build + # https://github.com/actions/virtual-environments/issues/2840 + sudo rm -rf /usr/share/dotnet + sudo rm -rf /opt/ghc + sudo rm -rf "/usr/local/share/boost" + sudo rm -rf "$AGENT_TOOLSDIRECTORY" + + - name: Build Kernel + run: | + export EXTRAVERSION="-production" + cp .config /tmp/ + make distclean + mv /tmp/.config .config + make -j$(nproc) bindeb-pkg + + - name: Prepare artifacts + run: | + mkdir -p production-kernel + mv ../*.deb ./production-kernel/ + mv ../*.changes ./production-kernel/ + mv ../*.buildinfo ./production-kernel/ + cp .config ./production-config + + - name: Export artifacts + uses: actions/upload-artifact@v4 + with: + name: ${{github.sha}}-production + path: ./production-kernel + + - name: Status + run: | + echo "Status: ${{job.status}}" diff --git a/.gitignore b/.gitignore index 56972adb5031..b4d5e4873557 100644 --- a/.gitignore +++ b/.gitignore @@ -108,6 +108,7 @@ modules.order !.get_maintainer.ignore !.gitattributes !.gitignore +!.github !.kunitconfig !.mailmap !.rustfmt.toml diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index d401577b5a6a..f966332cb969 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -4473,6 +4473,14 @@ nomsi [MSI] If the PCI_MSI kernel config parameter is enabled, this kernel boot option can be used to disable the use of MSI interrupts system-wide. + pci_acs_override [PCIE] Override missing PCIe ACS support for: + downstream + All downstream ports - full ACS capabilities + multifunction + Add multifunction devices - multifunction ACS subset + id:nnnn:nnnn + Specific device - full ACS capabilities + Specified as vid:did (vendor/device ID) in hex noioapicquirk [APIC] Disable all boot interrupt quirks. Safety option to keep boot IRQs enabled. This should never be necessary. diff --git a/Makefile b/Makefile index 68a8faff2543..f4c862f57985 100644 --- a/Makefile +++ b/Makefile @@ -2,9 +2,12 @@ VERSION = 6 PATCHLEVEL = 12 SUBLEVEL = 0 -EXTRAVERSION = NAME = Baby Opossum Posse +ifndef EXTRAVERSION +EXTRAVERSION = -production +endif + # *DOCUMENTATION* # To see a list of typical targets execute "make help" # More info can be located in ./README diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 7b9a7e8f39ac..af7177d99c12 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1666,6 +1666,20 @@ config X86_PMEM_LEGACY Say Y if unsure. +config ARCH_FORCE_MAX_ORDER + int "Maximum zone order" + default "11" + help + The kernel memory allocator divides physically contiguous memory + blocks into "zones", where each zone is a power of two number of + pages. This option selects the largest power of two that the kernel + keeps in the memory allocator. If you need to allocate very large + blocks of physically contiguous memory, then you may need to + increase this value. + + This config option is actually maximum order plus one. For example, + a value of 11 means that the largest free memory block is 2^10 pages. + config HIGHPTE bool "Allocate 3rd-level pagetables from highmem" depends on HIGHMEM diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c index 5429ec9ef06f..37c5b44ee8a8 100644 --- a/drivers/acpi/nfit/core.c +++ b/drivers/acpi/nfit/core.c @@ -1839,7 +1839,7 @@ static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, */ clear_bit(NVDIMM_FAMILY_INTEL, &nd_desc->dimm_family_mask); for (i = 0; i <= NVDIMM_FAMILY_MAX; i++) - if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) { + if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 0xfffffffe)) { set_bit(i, &nd_desc->dimm_family_mask); if (family < 0 || i == default_dsm_family) family = i; @@ -1896,8 +1896,17 @@ static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, else { if (acpi_nvdimm_has_method(adev_dimm, "_LSI") && acpi_nvdimm_has_method(adev_dimm, "_LSR")) { - dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev)); - set_bit(NFIT_MEM_LSR, &nfit_mem->flags); + union acpi_object *obj = acpi_label_info(adev_dimm->handle); + if (!obj || obj->type != ACPI_TYPE_BUFFER || + obj->buffer.length < 12 || + ((u32 *)obj->buffer.pointer)[0] != 0) { + dev_err(dev, "%s: has broken _LSI\n", + dev_name(&adev_dimm->dev)); + } else { + ACPI_FREE(obj); + dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev)); + set_bit(NFIT_MEM_LSR, &nfit_mem->flags); + } } if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags) diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index 20e6645ab737..dd11d05fab23 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -3,7 +3,7 @@ obj-$(CONFIG_ATA) += libata.o # non-SFF interface -obj-$(CONFIG_SATA_AHCI) += ahci.o libahci.o +obj-$(CONFIG_SATA_AHCI) += ahci.o ahciem.o libahci.o obj-$(CONFIG_SATA_ACARD_AHCI) += acard-ahci.o libahci.o obj-$(CONFIG_SATA_AHCI_SEATTLE) += ahci_seattle.o libahci.o libahci_platform.o obj-$(CONFIG_SATA_AHCI_PLATFORM) += ahci_platform.o libahci.o libahci_platform.o diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 45f63b09828a..243bcad069e2 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -653,6 +653,10 @@ static struct pci_driver ahci_pci_driver = { }, }; +static int ahciem_enable = -1; +module_param(ahciem_enable, int, 0644); +MODULE_PARM_DESC(ahciem_enable, "Emulate SES enclosure (-1 = detected, 0 = disabled, 1 = forced)"); + #if IS_ENABLED(CONFIG_PATA_MARVELL) static int marvell_enable; #else @@ -2050,6 +2054,13 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if (rc) goto err_rm_sysfs_file; + if (ahciem_enable == 1 || + (ahciem_enable == -1 && (pi.flags & ATA_FLAG_EM))) { + rc = ahciem_host_activate(host); + if (rc) + goto err_rm_sysfs_file; + } + pm_runtime_put_noidle(&pdev->dev); return 0; diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index 8f40f75ba08c..2a42481d3a24 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -342,6 +342,7 @@ struct ahci_host_priv { u32 em_loc; /* enclosure management location */ u32 em_buf_sz; /* EM buffer size in byte */ u32 em_msg_type; /* EM message type */ + struct Scsi_Host *em_shost; /* EM SCSI host */ u32 remapped_nvme; /* NVMe remapped device count */ bool got_runtime_pm; /* Did we do pm_runtime_get? */ unsigned int n_clks; @@ -453,4 +454,8 @@ static inline int ahci_nr_ports(u32 cap) return (cap & 0x1f) + 1; } +bool scsi_is_ahci(struct scsi_device *sdev); +bool scsi_is_ahciem(struct scsi_device *sdev); +int ahciem_host_activate(struct ata_host *host); + #endif /* _AHCI_H */ diff --git a/drivers/ata/ahciem.c b/drivers/ata/ahciem.c new file mode 100644 index 000000000000..8b3ca774e1e7 --- /dev/null +++ b/drivers/ata/ahciem.c @@ -0,0 +1,565 @@ +/*- + * SPDX-License-Indentifier: (GPL-2.0-only OR BSD-2-Clause-FreeBSD) + * + * Emulated SCSI Enclosure Services for AHCI Enclosure Management + * + * Copyright 2022 iXsystems, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer, + * without modification, immediately at the beginning of the file. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "ahci.h" + +#define DRV_NAME "ahciem" +#define DRV_VERSION "0.1" + +#define AHCIEM_RBUF_SIZE 576 /* size from libata-scsi.c */ + +static DEFINE_SPINLOCK(ahciem_rbuf_lock); +static u8 ahciem_rbuf[AHCIEM_RBUF_SIZE]; + +struct ahciem_enclosure { + struct ata_host *host; + u8 status[AHCI_MAX_PORTS][4]; +}; + +struct ahciem_args { + struct scsi_cmnd *cmd; + struct ahciem_enclosure *enc; +}; + +/* + * Utility functions + */ + +static void ahciem_rbuf_fill(struct ahciem_args *args, + unsigned int (*actor)(struct ahciem_args *args, u8 *rbuf)) +{ + unsigned int rc; + struct scsi_cmnd *cmd = args->cmd; + unsigned long flags; + + spin_lock_irqsave(&ahciem_rbuf_lock, flags); + + memset(ahciem_rbuf, 0, AHCIEM_RBUF_SIZE); + rc = actor(args, ahciem_rbuf); + if (rc == 0) + sg_copy_from_buffer(scsi_sglist(cmd), scsi_sg_count(cmd), + ahciem_rbuf, AHCIEM_RBUF_SIZE); + + spin_unlock_irqrestore(&ahciem_rbuf_lock, flags); + + if (rc == 0) + cmd->result = SAM_STAT_GOOD; +} + +static void ahciem_scsi_set_sense(struct scsi_cmnd *cmd, + u8 sk, u8 asc, u8 ascq) +{ + scsi_build_sense(cmd, false, sk, asc, ascq); +} + +static void ahciem_scsi_set_invalid_field(struct scsi_cmnd *cmd, + u16 field, u8 bit, bool cd) +{ + ahciem_scsi_set_sense(cmd, ILLEGAL_REQUEST, 0x24, 0x0); + scsi_set_sense_field_pointer(cmd->sense_buffer, SCSI_SENSE_BUFFERSIZE, + field, bit, cd); +} + +/* + * Generic SCSI operations + */ + +static unsigned int ahciem_scsiop_inq_std(struct ahciem_args *args, u8 *rbuf) +{ + static const u8 hdr[] = { + TYPE_ENCLOSURE, + 0, + 0x7, /* claim SPC-5 version compatibility */ + 0x2, /* response data format compatible with SPC-5 */ + 95 - 4, /* additional length */ + 0, + 0x40, /* enclosure services provided */ + 0x2, /* claim SAM-5 command management compatibility */ + }; + static const u8 versions[] = { + 0x00, 0xA0, /* SAM-5 (no version claimed) */ + 0x06, 0x80, /* SES-4 (no version claimed) */ + 0x05, 0xC0, /* SPC-5 (no version claimed) */ + }; + + memcpy(rbuf, hdr, sizeof(hdr)); + memcpy(rbuf + 8, "AHCI ", INQUIRY_VENDOR_LEN); + memcpy(rbuf + 16, "SGPIO Enclosure ", INQUIRY_MODEL_LEN); + memcpy(rbuf + 32, "2.00", INQUIRY_REVISION_LEN); + memcpy(rbuf + 58, versions, sizeof(versions)); + return 0; +} + +static unsigned int ahciem_scsiop_inq_00(struct ahciem_args *args, u8 *rbuf) +{ + static const u8 pages[] = { + 0x00, /* this page */ + 0x83, /* device ident page */ + }; + + rbuf[0] = TYPE_ENCLOSURE; /* peripheral device type */ + rbuf[1] = 0x00; /* this page */ + put_unaligned_be16(sizeof(pages), rbuf + 2); + + memcpy(rbuf + 4, pages, sizeof(pages)); + + return 0; +} + +static unsigned int ahciem_scsiop_inq_83(struct ahciem_args *args, u8 *rbuf) +{ + u8 *p = rbuf; + + p[0] = TYPE_ENCLOSURE; /* peripheral device type */ + p[1] = 0x83; /* this page */ + /* length calculated at the end */ + p += 4; + + p[0] = 1; /* code_set=binary */ + p[1] = 3; /* piv=0, assoc=lu, designator=NAA */ + p[3] = 8; /* NAA Locally Assigned designator length */ + p += 4; + p[0] = 0x30; /* NAA Locally Assigned */ + put_unaligned_be32(args->cmd->device->host->unique_id, p + 4); + p += 8; + + put_unaligned_be16(p - rbuf - 4, rbuf + 2); /* page length - 4 */ + + return 0; +} + +static unsigned int ahciem_scsiop_report_luns(struct ahciem_args *args, u8 *rbuf) +{ + put_unaligned_be32(8, rbuf); /* one lun, 8 bytes */ + memset(rbuf + 8, 0, 8); + return 0; +} + +/* + * SES operations + */ + +static unsigned int ahciem_sesop_rxdx_0(struct ahciem_args *args, u8 *rbuf) +{ + static const u8 pages[] = { + 0x0, /* this page */ + 0x1, + 0x2, + 0x7, + 0xa, + }; + + rbuf[0] = 0x0; /* this page */ + put_unaligned_be16(sizeof(pages), rbuf + 2); + memcpy(rbuf + 4, pages, sizeof(pages)); + return 0; +} + +static unsigned int ahciem_sesop_rxdx_1(struct ahciem_args *args, u8 *rbuf) +{ + static const u8 enc_desc[] = { + 0x11, /* pid=1, #pid=1 */ + 0, /* subenclosure id */ + 1, /* # of type descriptor headers */ + 36, /* descriptor length - 4 */ + }; + static const char *desc_txt = "Drive Slots"; + static const int desc_txt_len = sizeof("Drive Slots") - 1; + const u8 type_desc[] = { + ENCLOSURE_COMPONENT_ARRAY_DEVICE, /* element type */ + args->enc->host->n_ports, /* max number of elements */ + 0, /* subenclosure id */ + desc_txt_len, /* type descriptor text length */ + }; + u8 *p = rbuf; + + p[0] = 0x1; /* this page */ + p[1] = 0; /* number of secondary subenclosures */ + /* length calculated at the end */ + /* generation code fixed zeros */ + p += 8; + + /* enclosure logical identifier */ + memcpy(p, enc_desc, sizeof(enc_desc)); + p += sizeof(enc_desc); + p[0] = 0x30; /* NAA Locally Assigned */ + put_unaligned_be32(args->cmd->device->host->unique_id, p + 4); + p += 8; + + /* enclosure vendor identification */ + memcpy(p, "AHCI ", INQUIRY_VENDOR_LEN); + p += INQUIRY_VENDOR_LEN; + + /* product identification */ + memcpy(p, "SGPIO Enclosure ", INQUIRY_MODEL_LEN); + p += INQUIRY_MODEL_LEN; + + /* product revision level */ + memcpy(p, "2.00", INQUIRY_REVISION_LEN); + p += INQUIRY_REVISION_LEN; + + /* type descriptor header list */ + memcpy(p, type_desc, sizeof(type_desc)); + p += sizeof(type_desc); + + /* type descriptor text list */ + memcpy(p, desc_txt, desc_txt_len); + p += desc_txt_len; + + /* page length - 4 */ + put_unaligned_be16(p - rbuf - 4, rbuf + 2); + + return 0; +} + +static unsigned int ahciem_sesop_rxdx_2(struct ahciem_args *args, u8 *rbuf) +{ + struct ata_host *host = args->enc->host; + int n_ports = host->n_ports; + int i; + + rbuf[0] = 0x2; /* this page */ + rbuf[1] = 0; /* invop=0, info=0, non-crit=0, crit=0, unrecov=0 */ + put_unaligned_be16(4 + 4 * (1 + n_ports), rbuf + 2); /* gencode + elems */ + /* generation code fixed zeros */ + + for (i = 0; i < n_ports; i++) { + struct ata_port *ap; + struct ata_link *link; + int offset = 4 + 4 + 4 * (1 + i); /* pghdr + gencode + elems */ + u8 status; + + /* XXX: potentially out of sync with emp->led_state */ + memcpy(rbuf + offset, args->enc->status[i], 4); + + ap = host->ports[i]; + link = &ap->link; + if (sata_pmp_attached(ap)) + status = ENCLOSURE_STATUS_UNKNOWN; + else if (ata_link_online(link)) + status = ENCLOSURE_STATUS_OK; + else if (ata_link_offline(link)) + status = ENCLOSURE_STATUS_NOT_INSTALLED; + else + status = ENCLOSURE_STATUS_UNKNOWN; + rbuf[offset] |= status; + + if (ata_dev_disabled(link->device)) + rbuf[offset + 3] |= 0x10; /* DEVICE OFF */ + } + + return 0; +} + +static unsigned int ahciem_sesop_rxdx_7(struct ahciem_args *args, u8 *rbuf) +{ + int n_ports = args->enc->host->n_ports; + int i; + + rbuf[0] = 0x7; /* this page */ + put_unaligned_be16(4 + 15 + 11 * n_ports, rbuf + 2); /* gencode + "Drive Slots" + slots */ + /* generation code fixed zeros */ + + /* overall descriptor */ + put_unaligned_be16(11, rbuf + 10); + memcpy(rbuf + 12, "Drive Slots", 11); + + for (i = 0; i < n_ports; i++) { + int offset = 4 + 4 + 15 + 11 * i; /* pghdr + gencode + "Drive Slots" + slots */ + + /* element descriptor */ + put_unaligned_be16(7, rbuf + offset + 2); + snprintf(rbuf + offset + 4, 8, "Slot %02d", i); + } + + return 0; +} + +static unsigned int ahciem_sesop_rxdx_a(struct ahciem_args *args, u8 *rbuf) +{ + struct ata_host *host = args->enc->host; + int n_ports = host->n_ports; + int i; + + rbuf[0] = 0xa; /* this page */ + put_unaligned_be16(4 + (4 + 8) * n_ports, rbuf + 2); /* gencode + elements */ + /* generation code fixed zeros */ + + for (i = 0; i < n_ports; i++) { + struct ata_port *ap; + int offset = 4 + 4 + (4 + 8) * i; /* pghdr + gencode + slots */ + + /* Additional Element Status Descriptor */ + rbuf[offset] = 0x10 | SCSI_PROTOCOL_ATA; /* eip=1, proto=ATA */ + rbuf[offset + 1] = 2 + 8; /* length: index + ata elm */ + rbuf[offset + 2] = 0x01; /* eiioe */ + rbuf[offset + 3] = 1 + i; /* index */ + + ap = host->ports[i]; + if (sata_pmp_attached(ap)) + rbuf[offset] |= 0x80; /* invalid */ + + /* ATA Element Status (NB: non-standard) */ + put_unaligned_be32(i, rbuf + offset + 4); + put_unaligned_be32(ap->scsi_host->host_no, rbuf + offset + 8); + } + + return 0; +} + +static void ahciem_setleds(struct ahciem_enclosure *enc, int slot) +{ + struct ata_port *ap = enc->host->ports[slot]; + u32 port_led_state, val; + + if (!ap->ops->transmit_led_message) + return; + + val = 0; + if (enc->status[slot][2] & 0x80) /* Activity */ + val |= (1 << 0); + if (enc->status[slot][1] & 0x02) /* Rebuild */ + val |= (1 << 6) | (1 << 3); + else if (enc->status[slot][2] & 0x02) /* Identification */ + val |= (1 << 3); + else if (enc->status[slot][3] & 0x20) /* Fault */ + val |= (1 << 6); + + port_led_state = (val << 16) | (slot & EM_MSG_LED_HBA_PORT); + + ap->ops->transmit_led_message(ap, port_led_state, 4); +} + +static void ahciem_sesop_txdx(struct ahciem_enclosure *enc, struct scsi_cmnd *cmd) +{ + const u8 *ads0; + u8 *page; + u16 page_len = get_unaligned_be16(cmd->cmnd + 3); + int n_ports = enc->host->n_ports; + int i; + + page = kzalloc(page_len, GFP_KERNEL); + if (!page) { + ahciem_scsi_set_sense(cmd, ABORTED_COMMAND, 0x34, 0x0); + return; + } + + if (scsi_sg_copy_to_buffer(cmd, page, page_len) != page_len) { + kfree(page); + ahciem_scsi_set_sense(cmd, ABORTED_COMMAND, 0x34, 0x0); + return; + } + + if (page[0] != 0x02) { /* Enclosure Control page */ + kfree(page); + ahciem_scsi_set_invalid_field(cmd, 0, 0, false); + return; + } + + ads0 = page + 8; + + for (i = 0; i < n_ports; i++) { + const u8 *ads = ads0 + 4 + 4 * i; /* start + overall elem + elems */ + + if (ads[0] & 0x80) { + enc->status[i][0] = 0; + enc->status[i][1] = ads[1] & 0x02; /* rebuild/remap */ + enc->status[i][2] = ads[2] & (0x80 | 0x02); /* rqst active + rqst ident */ + enc->status[i][3] = ads[3] & 0x20; /* rqst fault */ + ahciem_setleds(enc, i); + } else if (ads0[0] & 0x80) { + enc->status[i][0] = 0; + enc->status[i][1] = ads0[1] & 0x02; /* rebuild/remap */ + enc->status[i][2] = ads0[2] & (0x80 | 0x02); /* rqst active + rqst ident */ + enc->status[i][3] = ads0[3] & 0x20; /* rqst fault */ + ahciem_setleds(enc, i); + } + } + + kfree(page); +} + +static int ahciem_queuecommand(struct Scsi_Host *shost, struct scsi_cmnd *cmd) +{ + struct ahciem_enclosure *enc = (struct ahciem_enclosure *)&shost->hostdata[0]; + struct ahciem_args args = { .cmd = cmd, .enc = enc }; + const u8 *cdb = cmd->cmnd; + + if (unlikely(!cmd->cmd_len)) { + cmd->result = DID_ERROR << 16; + scsi_done(cmd); + return 0; + } + + /* + * Commands required for SES devices by SPC: + * - INQUIRY + * - REPORT LUNS + * - REQUEST SENSE + * - TEST UNIT READY + * - SEND DIAGNOSTIC + * - RECEIVE DIAGNOSTIC RESULTS + */ + switch (cdb[0]) { + case INQUIRY: + if (cdb[1] & 2) /* obsolete CMDDT set? */ + ahciem_scsi_set_invalid_field(cmd, 1, 1, true); + else if ((cdb[1] & 1) == 0) { /* standard INQUIRY */ + if (cdb[2] != 0) + ahciem_scsi_set_invalid_field(cmd, 2, 0xff, true); + else + ahciem_rbuf_fill(&args, ahciem_scsiop_inq_std); + } else switch (cdb[2]) { /* VPD INQUIRY */ + case 0x00: /* Supported VPD Pages */ + ahciem_rbuf_fill(&args, ahciem_scsiop_inq_00); + break; + case 0x83: /* Device Identification */ + ahciem_rbuf_fill(&args, ahciem_scsiop_inq_83); + break; + default: + ahciem_scsi_set_invalid_field(cmd, 2, 0xff, true); + break; + } + break; + + case REPORT_LUNS: + ahciem_rbuf_fill(&args, ahciem_scsiop_report_luns); + break; + + case REQUEST_SENSE: + ahciem_scsi_set_sense(cmd, 0, 0, 0); + break; + + case TEST_UNIT_READY: + /* born ready */ + break; + + case SEND_DIAGNOSTIC: + if (cdb[1] & 0x10) /* PF (page format) */ + ahciem_sesop_txdx(enc, cmd); + else + ahciem_scsi_set_invalid_field(cmd, 1, 4, true); + break; + + case RECEIVE_DIAGNOSTIC: + switch (cdb[2]) { + case 0x0: /* Supported Diagnostic Pages */ + ahciem_rbuf_fill(&args, ahciem_sesop_rxdx_0); + break; + case 0x1: /* Configuration */ + ahciem_rbuf_fill(&args, ahciem_sesop_rxdx_1); + break; + case 0x2: /* Enclosure Status */ + ahciem_rbuf_fill(&args, ahciem_sesop_rxdx_2); + break; + case 0x7: /* Element Descriptor */ + ahciem_rbuf_fill(&args, ahciem_sesop_rxdx_7); + break; + case 0xa: /* Additional Element Status */ + ahciem_rbuf_fill(&args, ahciem_sesop_rxdx_a); + break; + default: + ahciem_scsi_set_invalid_field(cmd, 2, 0, true); + break; + } + break; + + default: + ahciem_scsi_set_sense(cmd, ILLEGAL_REQUEST, 0x20, 0x0); + break; + } + + scsi_done(cmd); + + return 0; +} + +static struct scsi_host_template ahciem_sht = { + .name = DRV_NAME, + .proc_name = DRV_NAME, + .queuecommand = ahciem_queuecommand, + .sg_tablesize = SG_ALL, +}; + +bool scsi_is_ahciem(struct scsi_device *sdev) +{ + return sdev->host->hostt == &ahciem_sht; +} +EXPORT_SYMBOL(scsi_is_ahciem); + +static atomic_t ahciem_unique_id = ATOMIC_INIT(0); + +int ahciem_host_activate(struct ata_host *host) +{ + struct ahci_host_priv *hpriv = host->private_data; + struct Scsi_Host *shost; + struct ahciem_enclosure *enc; + int rc; + + shost = scsi_host_alloc(&ahciem_sht, sizeof(struct ahciem_enclosure)); + if (!shost) + return -ENOMEM; + + enc = (struct ahciem_enclosure *)&shost->hostdata[0]; + enc->host = host; + hpriv->em_shost = shost; + shost->can_queue = 1; + shost->eh_noresume = 1; + shost->max_channel = 1; + shost->max_cmd_len = MAX_COMMAND_SIZE; + shost->max_host_blocked = 1; + shost->max_id = 1; + shost->max_lun = 1; + shost->unique_id = atomic_inc_return(&ahciem_unique_id); + rc = scsi_add_host(shost, host->dev); + if (rc) + return rc; + + return scsi_add_device(shost, 0, 0, 0); +} +EXPORT_SYMBOL(ahciem_host_activate); + +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c index fdfa7b266218..05d02b2b4b1e 100644 --- a/drivers/ata/libahci.c +++ b/drivers/ata/libahci.c @@ -2766,6 +2766,19 @@ int ahci_host_activate(struct ata_host *host, const struct scsi_host_template *s } EXPORT_SYMBOL_GPL(ahci_host_activate); +bool scsi_is_ahci(struct scsi_device *sdev) +{ + struct ata_port *ap; + + if (!scsi_is_ata(sdev)) + return false; + + ap = ata_shost_to_port(sdev->host); + + return ap->ops->dev_config == ahci_dev_config; +} +EXPORT_SYMBOL_GPL(scsi_is_ahci); + MODULE_AUTHOR("Jeff Garzik"); MODULE_DESCRIPTION("Common AHCI SATA low-level routines"); MODULE_LICENSE("GPL"); diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index 7a8064520a35..dd20f30d5de7 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -25,6 +25,10 @@ #include #include "ahci.h" +static int ahciem_enable = -1; +module_param(ahciem_enable, int, 0644); +MODULE_PARM_DESC(ahciem_enable, "Emulate SES enclosure (-1 = detected, 0 = disabled, 1 = forced)"); + static void ahci_host_stop(struct ata_host *host); struct ata_port_operations ahci_platform_ops = { @@ -753,7 +757,18 @@ int ahci_platform_init_host(struct platform_device *pdev, ahci_init_controller(host); ahci_print_info(host, "platform"); - return ahci_host_activate(host, sht); + rc = ahci_host_activate(host, sht); + if (rc) + return rc; + + if (ahciem_enable == 1 || + (ahciem_enable == -1 && (pi.flags & ATA_FLAG_EM))) { + rc = ahciem_host_activate(host); + if (rc) + return rc; + } + + return 0; } EXPORT_SYMBOL_GPL(ahci_platform_init_host); diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index c085dd81ebe7..cdafc6ff541c 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -3796,6 +3796,7 @@ int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class, { u64 n_sectors = dev->n_sectors; u64 n_native_sectors = dev->n_native_sectors; + struct ata_eh_context *ehc = &dev->link->eh_context; int rc; if (!ata_dev_enabled(dev)) @@ -3819,6 +3820,14 @@ int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class, if (rc) goto fail; + /* + * Just need to update the sector count + */ + if (ehc->i.flags & ATA_EHI_UPDATE_SECTORS) { + dev->n_sectors = ata_id_n_sectors(dev->id); + return 0; + } + /* verify n_sectors hasn't changed */ if (dev->class != ATA_DEV_ATA || !n_sectors || dev->n_sectors == n_sectors) diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c index f915e3df57a9..82fc92af0708 100644 --- a/drivers/ata/libata-scsi.c +++ b/drivers/ata/libata-scsi.c @@ -1660,6 +1660,17 @@ static void ata_qc_done(struct ata_queued_cmd *qc) { struct scsi_cmnd *cmd = qc->scsicmd; void (*done)(struct scsi_cmnd *) = qc->scsidone; + struct ata_taskfile *tf = &(qc->tf); + struct ata_eh_info *ehi = &qc->ap->link.eh_info; + + if (tf->command == ATA_CMD_SET_MAX || tf->command == ATA_CMD_SET_MAX_EXT + || (tf->command == ATA_CMD_MAX_ADDR_EXT && + tf->feature == ATA_SUBCMD_MAX_ADDR_SET_EXT)) { + ehi->probe_mask |= 1 << qc->dev->devno; + ehi->action |= ATA_EH_REVALIDATE; + ehi->flags |= ATA_EHI_UPDATE_SECTORS; + ata_port_schedule_eh(qc->ap); + } ata_qc_free(qc); done(cmd); diff --git a/drivers/ata/libata-transport.c b/drivers/ata/libata-transport.c index e898be49df6b..276a99a02d9b 100644 --- a/drivers/ata/libata-transport.c +++ b/drivers/ata/libata-transport.c @@ -855,3 +855,9 @@ void __exit libata_transport_exit(void) transport_class_unregister(&ata_port_class); transport_class_unregister(&ata_dev_class); } + +bool scsi_is_ata(struct scsi_device *sdev) +{ + return sdev->host->transportt == ata_scsi_transport_template; +} +EXPORT_SYMBOL(scsi_is_ata); diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h index 559b443c409f..c788f4c2407b 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h @@ -737,6 +737,7 @@ struct ixgbe_adapter { bool link_up; unsigned long sfp_poll_time; unsigned long link_check_timeout; + bool fw_error_msg; struct timer_list service_timer; struct work_struct service_task; diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index 8b8404d8c946..b3a780b4b727 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c @@ -8014,10 +8014,12 @@ static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter) /* read fwsm.ext_err_ind register and log errors */ fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw)); - if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK || - !(fwsm & IXGBE_FWSM_FW_VAL_BIT)) + if (!adapter->fw_error_msg && (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK || + !(fwsm & IXGBE_FWSM_FW_VAL_BIT))) { + adapter->fw_error_msg = true; e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n", fwsm); + } if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) { e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n"); diff --git a/drivers/net/ntb_netdev.c b/drivers/net/ntb_netdev.c index ef6df0e37bea..3aaba44cdfb8 100644 --- a/drivers/net/ntb_netdev.c +++ b/drivers/net/ntb_netdev.c @@ -100,7 +100,7 @@ static void ntb_netdev_rx_handler(struct ntb_transport_qp *qp, void *qp_data, void *data, int len) { struct net_device *ndev = qp_data; - struct sk_buff *skb; + struct sk_buff *skb, *nskb; int rc; skb = data; @@ -112,6 +112,15 @@ static void ntb_netdev_rx_handler(struct ntb_transport_qp *qp, void *qp_data, if (len < 0) { ndev->stats.rx_errors++; ndev->stats.rx_length_errors++; + nskb = skb; + goto enqueue_again; + } + + nskb = netdev_alloc_skb(ndev, ndev->mtu + ETH_HLEN); + if (!nskb) { + ndev->stats.rx_errors++; + ndev->stats.rx_frame_errors++; + nskb = skb; goto enqueue_again; } @@ -127,17 +136,11 @@ static void ntb_netdev_rx_handler(struct ntb_transport_qp *qp, void *qp_data, ndev->stats.rx_bytes += len; } - skb = netdev_alloc_skb(ndev, ndev->mtu + ETH_HLEN); - if (!skb) { - ndev->stats.rx_errors++; - ndev->stats.rx_frame_errors++; - return; - } - enqueue_again: - rc = ntb_transport_rx_enqueue(qp, skb, skb->data, ndev->mtu + ETH_HLEN); + rc = ntb_transport_rx_enqueue(qp, nskb, nskb->data, + ndev->mtu + ETH_HLEN); if (rc) { - dev_kfree_skb_any(skb); + dev_kfree_skb_any(nskb); ndev->stats.rx_errors++; ndev->stats.rx_fifo_errors++; } diff --git a/drivers/ntb/Kconfig b/drivers/ntb/Kconfig index df16c755b4da..5f3930d8b80f 100644 --- a/drivers/ntb/Kconfig +++ b/drivers/ntb/Kconfig @@ -28,6 +28,13 @@ source "drivers/ntb/hw/Kconfig" source "drivers/ntb/test/Kconfig" +config NTB_SPLIT + tristate "NTB Resource Split" + help + This driver allows NTB resources split between several client drivers. + + If unsure, say N. + config NTB_TRANSPORT tristate "NTB Transport Client" help diff --git a/drivers/ntb/Makefile b/drivers/ntb/Makefile index 3a6fa181ff99..e93b4d25a24c 100644 --- a/drivers/ntb/Makefile +++ b/drivers/ntb/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_NTB) += ntb.o hw/ test/ +obj-$(CONFIG_NTB_SPLIT) += ntb_split.o obj-$(CONFIG_NTB_TRANSPORT) += ntb_transport.o ntb-y := core.o diff --git a/drivers/ntb/core.c b/drivers/ntb/core.c index ed6f4adc6130..0bc5d8551a0b 100644 --- a/drivers/ntb/core.c +++ b/drivers/ntb/core.c @@ -72,6 +72,10 @@ MODULE_VERSION(DRIVER_VERSION); MODULE_AUTHOR(DRIVER_AUTHOR); MODULE_DESCRIPTION(DRIVER_DESCRIPTION); +static char *driver_override; +module_param(driver_override, charp, 0); +MODULE_PARM_DESC(driver_override, "Driver name to force a match"); + static const struct bus_type ntb_bus; static void ntb_dev_release(struct device *dev); @@ -98,6 +102,68 @@ void ntb_unregister_client(struct ntb_client *client) } EXPORT_SYMBOL(ntb_unregister_client); + +static ssize_t driver_override_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct ntb_dev *ntb = dev_ntb(dev); + char *dro, *old, *cp; + + /* We need to keep extra room for a newline */ + if (count >= (PAGE_SIZE - 1)) + return -EINVAL; + + dro = kstrndup(buf, count, GFP_KERNEL); + if (!dro) + return -ENOMEM; + + cp = strchr(dro, '\n'); + if (cp) + *cp = '\0'; + + device_lock(dev); + old = ntb->driver_override; + if (strlen(dro)) { + ntb->driver_override = dro; + } else { + kfree(dro); + ntb->driver_override = NULL; + } + device_unlock(dev); + + kfree(old); + + return count; +} + +static ssize_t driver_override_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct ntb_dev *ntb = dev_ntb(dev); + ssize_t len; + + device_lock(dev); + len = scnprintf(buf, PAGE_SIZE, "%s\n", ntb->driver_override); + device_unlock(dev); + return len; +} +static DEVICE_ATTR_RW(driver_override); + +static struct attribute *ntb_dev_attrs[] = { + &dev_attr_driver_override.attr, + NULL, +}; + +static const struct attribute_group ntb_dev_group = { + .attrs = ntb_dev_attrs, +}; + +const struct attribute_group *ntb_dev_groups[] = { + &ntb_dev_group, + NULL, +}; + int ntb_register_device(struct ntb_dev *ntb) { int ret; @@ -114,9 +180,13 @@ int ntb_register_device(struct ntb_dev *ntb) init_completion(&ntb->released); ntb->dev.bus = &ntb_bus; - ntb->dev.parent = &ntb->pdev->dev; + if (!ntb->dev.parent) + ntb->dev.parent = &ntb->pdev->dev; ntb->dev.release = ntb_dev_release; - dev_set_name(&ntb->dev, "%s", pci_name(ntb->pdev)); + if (driver_override && driver_override[0] && !ntb->driver_override) + ntb->driver_override = kstrdup(driver_override, GFP_KERNEL); + if (!dev_name(&ntb->dev)) + dev_set_name(&ntb->dev, "%s", pci_name(ntb->pdev)); ntb->ctx = NULL; ntb->ctx_ops = NULL; @@ -134,6 +204,10 @@ void ntb_unregister_device(struct ntb_dev *ntb) { device_unregister(&ntb->dev); wait_for_completion(&ntb->released); + if (ntb->driver_override) { + kfree(ntb->driver_override); + ntb->driver_override = NULL; + } } EXPORT_SYMBOL(ntb_unregister_device); @@ -260,6 +334,18 @@ int ntb_default_peer_port_idx(struct ntb_dev *ntb, int port) } EXPORT_SYMBOL(ntb_default_peer_port_idx); +static int ntb_match(struct device *dev, const struct device_driver *drv) +{ + struct ntb_dev *ntb = dev_ntb(dev); + + /* When driver_override is set, only bind to the matching driver */ + if (!ntb->driver_override || + strcmp(ntb->driver_override, drv->name) == 0) + return 1; + + return 0; +} + static int ntb_probe(struct device *dev) { struct ntb_dev *ntb; @@ -300,8 +386,10 @@ static void ntb_dev_release(struct device *dev) static const struct bus_type ntb_bus = { .name = "ntb", + .match = ntb_match, .probe = ntb_probe, .remove = ntb_remove, + .dev_groups = ntb_dev_groups, }; static int __init ntb_driver_init(void) diff --git a/drivers/ntb/hw/Kconfig b/drivers/ntb/hw/Kconfig index c325be526b80..337db0dd0140 100644 --- a/drivers/ntb/hw/Kconfig +++ b/drivers/ntb/hw/Kconfig @@ -4,3 +4,4 @@ source "drivers/ntb/hw/idt/Kconfig" source "drivers/ntb/hw/intel/Kconfig" source "drivers/ntb/hw/epf/Kconfig" source "drivers/ntb/hw/mscc/Kconfig" +source "drivers/ntb/hw/plx/Kconfig" diff --git a/drivers/ntb/hw/Makefile b/drivers/ntb/hw/Makefile index 223ca592b5f9..b6422bcce255 100644 --- a/drivers/ntb/hw/Makefile +++ b/drivers/ntb/hw/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_NTB_IDT) += idt/ obj-$(CONFIG_NTB_INTEL) += intel/ obj-$(CONFIG_NTB_EPF) += epf/ obj-$(CONFIG_NTB_SWITCHTEC) += mscc/ +obj-$(CONFIG_NTB_PLX) += plx/ diff --git a/drivers/ntb/hw/amd/ntb_hw_amd.c b/drivers/ntb/hw/amd/ntb_hw_amd.c index d687e8c2cc78..065b82bacc85 100644 --- a/drivers/ntb/hw/amd/ntb_hw_amd.c +++ b/drivers/ntb/hw/amd/ntb_hw_amd.c @@ -749,7 +749,7 @@ static int ndev_init_isr(struct amd_ntb_dev *ndev, ndev->vec[i].ndev = ndev; ndev->vec[i].num = i; rc = request_irq(ndev->msix[i].vector, ndev_vec_isr, 0, - "ndev_vec_isr", &ndev->vec[i]); + NTB_NAME, &ndev->vec[i]); if (rc) goto err_msix_request; } @@ -776,8 +776,7 @@ static int ndev_init_isr(struct amd_ntb_dev *ndev, if (rc) goto err_msi_enable; - rc = request_irq(pdev->irq, ndev_irq_isr, 0, - "ndev_irq_isr", ndev); + rc = request_irq(pdev->irq, ndev_irq_isr, 0, NTB_NAME, ndev); if (rc) goto err_msi_request; @@ -793,8 +792,7 @@ static int ndev_init_isr(struct amd_ntb_dev *ndev, /* Try to set up intx irq */ pci_intx(pdev, 1); - rc = request_irq(pdev->irq, ndev_irq_isr, IRQF_SHARED, - "ndev_irq_isr", ndev); + rc = request_irq(pdev->irq, ndev_irq_isr, IRQF_SHARED, NTB_NAME, ndev); if (rc) goto err_intx_request; @@ -1013,7 +1011,7 @@ static void amd_set_side_info_reg(struct amd_ntb_dev *ndev, bool peer) } } -static void amd_clear_side_info_reg(struct amd_ntb_dev *ndev, bool peer) +static bool amd_clear_side_info_reg(struct amd_ntb_dev *ndev, bool peer) { void __iomem *mmio = NULL; unsigned int reg; @@ -1028,7 +1026,9 @@ static void amd_clear_side_info_reg(struct amd_ntb_dev *ndev, bool peer) reg &= ~AMD_SIDE_READY; writel(reg, mmio + AMD_SIDEINFO_OFFSET); readl(mmio + AMD_SIDEINFO_OFFSET); + return true; } + return false; } static void amd_init_side_info(struct amd_ntb_dev *ndev) @@ -1043,16 +1043,19 @@ static void amd_init_side_info(struct amd_ntb_dev *ndev) writel(ntb_ctl, mmio + AMD_CNTL_OFFSET); } -static void amd_deinit_side_info(struct amd_ntb_dev *ndev) +static bool amd_deinit_side_info(struct amd_ntb_dev *ndev) { void __iomem *mmio = ndev->self_mmio; u32 ntb_ctl; + bool res; - amd_clear_side_info_reg(ndev, false); + res = amd_clear_side_info_reg(ndev, false); ntb_ctl = readl(mmio + AMD_CNTL_OFFSET); ntb_ctl &= ~(PMM_REG_CTL | SMM_REG_CTL); writel(ntb_ctl, mmio + AMD_CNTL_OFFSET); + + return res; } static int amd_init_ntb(struct amd_ntb_dev *ndev) @@ -1236,6 +1239,17 @@ static int amd_ntb_pci_probe(struct pci_dev *pdev, if (rc) goto err_init_dev; + /* + * If our READY bit in SIDEINFO register is already set, it likely + * means we have crashed and the other controller could miss it. + * In such case clear the bit, interrupt the other side, and give + * it some time to see zero before we set the READY again below. + */ + if (amd_deinit_side_info(ndev)) { + ntb_peer_db_set(&ndev->ntb, BIT_ULL(ndev->db_last_bit)); + msleep(1000); + } + /* write side info */ amd_init_side_info(ndev); @@ -1271,8 +1285,8 @@ static void amd_ntb_pci_remove(struct pci_dev *pdev) * to the peer. This will make sure that when the peer handles the * DB event, it correctly reads this bit as being 0. */ - amd_deinit_side_info(ndev); - ntb_peer_db_set(&ndev->ntb, BIT_ULL(ndev->db_last_bit)); + if (amd_deinit_side_info(ndev)) + ntb_peer_db_set(&ndev->ntb, BIT_ULL(ndev->db_last_bit)); ntb_unregister_device(&ndev->ntb); ndev_deinit_debugfs(ndev); amd_deinit_dev(ndev); @@ -1287,8 +1301,8 @@ static void amd_ntb_pci_shutdown(struct pci_dev *pdev) /* Send link down notification */ ntb_link_event(&ndev->ntb); - amd_deinit_side_info(ndev); - ntb_peer_db_set(&ndev->ntb, BIT_ULL(ndev->db_last_bit)); + if (amd_deinit_side_info(ndev)) + ntb_peer_db_set(&ndev->ntb, BIT_ULL(ndev->db_last_bit)); ntb_unregister_device(&ndev->ntb); ndev_deinit_debugfs(ndev); amd_deinit_dev(ndev); diff --git a/drivers/ntb/hw/amd/ntb_hw_amd.h b/drivers/ntb/hw/amd/ntb_hw_amd.h index 5f337b1572a0..9a627e6cf50b 100644 --- a/drivers/ntb/hw/amd/ntb_hw_amd.h +++ b/drivers/ntb/hw/amd/ntb_hw_amd.h @@ -217,7 +217,7 @@ struct amd_ntb_dev { #define hb_ndev(__work) container_of(__work, struct amd_ntb_dev, hb_timer.work) static void amd_set_side_info_reg(struct amd_ntb_dev *ndev, bool peer); -static void amd_clear_side_info_reg(struct amd_ntb_dev *ndev, bool peer); +static bool amd_clear_side_info_reg(struct amd_ntb_dev *ndev, bool peer); static int amd_poll_link(struct amd_ntb_dev *ndev); #endif diff --git a/drivers/ntb/hw/intel/ntb_hw_gen1.c b/drivers/ntb/hw/intel/ntb_hw_gen1.c index 079b8cd79785..c11b20e40f30 100644 --- a/drivers/ntb/hw/intel/ntb_hw_gen1.c +++ b/drivers/ntb/hw/intel/ntb_hw_gen1.c @@ -401,7 +401,7 @@ int ndev_init_isr(struct intel_ntb_dev *ndev, ndev->vec[i].ndev = ndev; ndev->vec[i].num = i; rc = request_irq(ndev->msix[i].vector, ndev_vec_isr, 0, - "ndev_vec_isr", &ndev->vec[i]); + NTB_NAME, &ndev->vec[i]); if (rc) goto err_msix_request; } @@ -429,8 +429,7 @@ int ndev_init_isr(struct intel_ntb_dev *ndev, if (rc) goto err_msi_enable; - rc = request_irq(pdev->irq, ndev_irq_isr, 0, - "ndev_irq_isr", ndev); + rc = request_irq(pdev->irq, ndev_irq_isr, 0, NTB_NAME, ndev); if (rc) goto err_msi_request; @@ -447,8 +446,7 @@ int ndev_init_isr(struct intel_ntb_dev *ndev, pci_intx(pdev, 1); - rc = request_irq(pdev->irq, ndev_irq_isr, IRQF_SHARED, - "ndev_irq_isr", ndev); + rc = request_irq(pdev->irq, ndev_irq_isr, IRQF_SHARED, NTB_NAME, ndev); if (rc) goto err_intx_request; @@ -1769,16 +1767,6 @@ static int intel_ntb_init_pci(struct intel_ntb_dev *ndev, struct pci_dev *pdev) if (rc) goto err_pci_regions; - pci_set_master(pdev); - - rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); - if (rc) { - rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); - if (rc) - goto err_dma_mask; - dev_warn(&pdev->dev, "Cannot DMA highmem\n"); - } - ndev->self_mmio = pci_iomap(pdev, 0, 0); if (!ndev->self_mmio) { rc = -EIO; @@ -1790,7 +1778,6 @@ static int intel_ntb_init_pci(struct intel_ntb_dev *ndev, struct pci_dev *pdev) return 0; err_mmio: -err_dma_mask: pci_release_regions(pdev); err_pci_regions: pci_disable_device(pdev); @@ -1799,6 +1786,33 @@ static int intel_ntb_init_pci(struct intel_ntb_dev *ndev, struct pci_dev *pdev) return rc; } +static int intel_ntb_init_dma(struct intel_ntb_dev *ndev, struct pci_dev *pdev) +{ + int rc; + + pci_set_master(pdev); + + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); + if (rc) + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc) + goto err_dma_mask; + + rc = -EIO; + if (!ndev->bar4_split) + rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); + if (rc) + rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc) + goto err_dma_mask; + + return 0; + +err_dma_mask: + pci_clear_master(pdev); + return rc; +} + static void intel_ntb_deinit_pci(struct intel_ntb_dev *ndev) { struct pci_dev *pdev = ndev->ntb.pdev; @@ -1888,6 +1902,10 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev, ndev_reset_unsafe_flags(ndev); + rc = intel_ntb_init_dma(ndev, pdev); + if (rc) + goto err_init_dma; + ndev->reg->poll_link(ndev); ndev_init_debugfs(ndev); @@ -1902,6 +1920,7 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev, err_register: ndev_deinit_debugfs(ndev); +err_init_dma: if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev) || pdev_is_gen4(pdev) || pdev_is_gen5(pdev)) xeon_deinit_dev(ndev); diff --git a/drivers/ntb/hw/plx/Kconfig b/drivers/ntb/hw/plx/Kconfig new file mode 100644 index 000000000000..7a2c694c60b8 --- /dev/null +++ b/drivers/ntb/hw/plx/Kconfig @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only +config NTB_PLX + tristate "PLX Non-Transparent Bridge support" + depends on X86_64 + help + This driver supports PLX NTB on capable hardware. + + If unsure, say N. diff --git a/drivers/ntb/hw/plx/Makefile b/drivers/ntb/hw/plx/Makefile new file mode 100644 index 000000000000..206a0202b7c4 --- /dev/null +++ b/drivers/ntb/hw/plx/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_NTB_PLX) += ntb_hw_plx.o diff --git a/drivers/ntb/hw/plx/ntb_hw_plx.c b/drivers/ntb/hw/plx/ntb_hw_plx.c new file mode 100644 index 000000000000..3a901f46dcc7 --- /dev/null +++ b/drivers/ntb/hw/plx/ntb_hw_plx.c @@ -0,0 +1,1224 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) + +/* + * The Non-Transparent Bridge (NTB) is a device that allows you to connect + * two or more systems using a PCI-e links, providing remote memory access. + * + * This module contains a driver for NTBs in PLX/Avago/Broadcom PCIe bridges. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define NTB_NAME "ntb_hw_plx" +#define NTB_DESC "PLX PCI-E Non-Transparent Bridge Driver" +#define NTB_VER "1.0" + +MODULE_DESCRIPTION(NTB_DESC); +MODULE_VERSION(NTB_VER); +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_AUTHOR("Jeff Kirsher , Alexander Motin "); + +/* PCI device IDs */ +#define PCI_DEVICE_ID_PLX_NT0_LINK 0x87A0 +#define PCI_DEVICE_ID_PLX_NT1_LINK 0x87A1 +#define PCI_DEVICE_ID_PLX_NT0_VIRT 0x87B0 +#define PCI_DEVICE_ID_PLX_NT1_VIRT 0x87B1 + +#define PLX_MAX_BARS 4 /* There are at most 4 data BARs. */ +#define PLX_NUM_SPAD 8 /* There are 8 scratchpads. */ +#define PLX_NUM_SPAD_PATT 4 /* Use test pattern as 4 more. */ +#define PLX_NUM_DB 16 /* There are 16 doorbells. */ +#define PLX_MAX_SPLIT 128 /* Allow at most 128 splits. */ + +static struct dentry *debugfs_dir; + +struct plx_ntb_mw_info { + int mw_bar; + int mw_64bit; + dma_addr_t mw_pbase; + resource_size_t mw_size; + struct { + dma_addr_t mw_xlat_addr; + resource_size_t mw_xlat_size; + } splits[PLX_MAX_SPLIT]; +}; + +struct plx_ntb_dev { + struct ntb_dev ntb; + + unsigned int ntx; + unsigned int link; + u32 port; + u32 alut; + u32 split; /* split BAR2 into 2^x parts */ + + struct plx_ntb_mw_info mw_info[PLX_MAX_BARS]; + unsigned char mw_count; + unsigned char spad_cnt1; /* Number of standard spads */ + unsigned char spad_cnt2; /* Number of extra spads */ + u32 sspad_off1; /* Offset of our spads */ + u32 sspad_off2; /* Offset of our extra spads */ + u32 pspad_off1; /* Offset of peer spads */ + u32 pspad_off2; /* Offset of peer extra spads */ + + struct msix_entry *msix; + + void __iomem *self_mmio; + + struct dentry *debugfs_dir; + struct dentry *debugfs_info; + + /* Parameters of window shared with peer config access in B2B mode. */ + unsigned int b2b_mw; /* Shared window number. */ + u64 b2b_off; /* Offset in shared window. */ + void __iomem *b2b_mmio; +}; + +#define NTB_LNK_STA_SPEED_MASK 0x000F +#define NTB_LNK_STA_WIDTH_MASK 0x03F0 +#define NTB_LNK_STA_SPEED(x) ((x) & NTB_LNK_STA_SPEED_MASK) +#define NTB_LNK_STA_WIDTH(x) (((x) & NTB_LNK_STA_WIDTH_MASK) >> 4) + +#define PLX_NT0_BASE 0x3E000 +#define PLX_NT1_BASE 0x3C000 +#define PLX_NTX_BASE(sc) ((sc)->ntx ? PLX_NT1_BASE : PLX_NT0_BASE) +#define PLX_NTX_LNK_OFFSET 0x01000 + +#define PLX_PHY_USR_TST_PATRN 0x20C + +#define PLX_VS0_OFFSET 0x360 +#define PLX_VS1_OFFSET 0x364 + +/* Interrupt Registers */ +#define PLX_VIRT_INT_IRQ_SET 0xC4C +#define PLX_VIRT_INT_IRQ_CLEAR 0xC50 +#define PLX_VIRT_INT_IRQ_MASK_SET 0xC54 +#define PLX_VIRT_INT_IRQ_MASK_CLEAR 0xC58 +#define PLX_LNK_INT_IRQ_SET 0xC5C +#define PLX_LNK_INT_IRQ_CLEAR 0xC60 +#define PLX_LNK_INT_IRQ_MASK_SET 0xC64 +#define PLX_LNK_INT_IRQ_MASK_CLEAR 0xC68 + +#define PLX_NTX_PORT_SCRATCH0 0xC6C +#define PLX_NTX_PORT_ID 0xC8C +#define PLX_NTX_REQ_ID_RD_BK 0xC90 +#define PLX_NTX_LNK_ALUT_CNTRL 0xC94 +#define PLX_NTX_REQ_ID_LUT00 0xD94 +#define PLX_NTX_REQ_ID_LUT02 0xD98 +#define PLX_NTX_REQ_ID_LUT04 0xD9C +#define PLX_NTX_REQ_ID_LUT16 0xDB4 +#define PLX_NTX_REQ_ID_LUT18 0xDB8 +#define PLX_NTX_REQ_ID_LUT20 0xDBC +#define PLX_VIRT_LNK_ERR_STATUS 0xFE0 +#define PLX_VIRT_LNK_ERR_MASK 0xFE4 + +#define PLX_MEM_BAR2_ADDR 0xC3C +#define PLX_MEM_BAR0_SETUP 0xE4 +#define PLX_MEM_BAR2_SETUP 0xE8 + +#define ntb_ndev(__ntb) container_of(__ntb, struct plx_ntb_dev, ntb) + +/* Bases of NTx our/peer interface registers */ +#define PLX_NTX_OUR_BASE(sc) \ + (PLX_NTX_BASE(sc) + ((sc)->link ? PLX_NTX_LNK_OFFSET : 0)) +#define PLX_NTX_PEER_BASE(sc) \ + (PLX_NTX_BASE(sc) + ((sc)->link ? 0 : PLX_NTX_LNK_OFFSET)) + +/* NTx our interface registers */ +#define SELF_BASE(n) ((n)->self_mmio + PLX_NTX_OUR_BASE(n)) + +/* NTx peer interface registers */ +#define PEER_BASE(n) ((n)->self_mmio + PLX_NTX_PEER_BASE(n)) + +/* B2B NTx registers */ +#define B2B_BASE(n) ((n)->b2b_mmio) +#define B2B_REG(n, reg) (PLX_NTX_BASE(n) + (reg)) + +#define PLX_PORT_BASE(p) ((p) << 12) +#define PLX_STATION_PORT_BASE(sc) PLX_PORT_BASE((sc)->port & ~7) + +#define PLX_PORT_CONTROL(sc) (PLX_STATION_PORT_BASE(sc) + 0x208) + +/* PCI defines and macros */ +#define powerof2(x) ((((x) - 1) & (x)) == 0) +#define PCIR_BAR(x) (PCI_BASE_ADDRESS_0 + (x) * 4) + +#define UINT32_MAX 0xFFFFFFFF +#define UINT64_MAX 0xFFFFFFFFFFFFFFFF + + +static uint b2b_mode = 1; +module_param(b2b_mode, uint, 0644); +MODULE_PARM_DESC(b2b_mode, + "NTB-to-NTB (back-to-back) mode, default is 1: 1 = Enabled, 0 = Disabled"); + +static uint usplit; +module_param(usplit, uint, 0644); +MODULE_PARM_DESC(usplit, + "Split BAR2 into 2^x parts, default is 0: valid entries (0..7)"); + +static void ndev_deinit_isr(struct plx_ntb_dev *ndev) +{ + struct pci_dev *pdev; + + pdev = ndev->ntb.pdev; + + /* Link Interface has no Link Error registers. */ + if (!ndev->link) + writel(0xf, SELF_BASE(ndev) + PLX_VIRT_LNK_ERR_MASK); /* Mask link interrupts */ + + pci_intx(pdev, 0); +} + +static int plx_ntb_init_pci(struct plx_ntb_dev *ndev, struct pci_dev *pdev) +{ + int rc; + + pci_set_drvdata(pdev, ndev); + + rc = pcim_enable_device(pdev); + if (rc) + goto err_pci_enable; + + rc = pci_request_regions(pdev, NTB_NAME); + if (rc) + goto err_pci_enable; + + ndev->self_mmio = pcim_iomap(pdev, 0, 0); + if (!ndev->self_mmio) { + rc = -EIO; + goto err_dma_mask; + } + + return 0; + +err_dma_mask: + pci_clear_master(pdev); + pci_release_regions(pdev); +err_pci_enable: + pci_set_drvdata(pdev, NULL); + return rc; +} + +static void plx_ntb_deinit_pci(struct plx_ntb_dev *ndev) +{ + struct pci_dev *pdev = ndev->ntb.pdev; + + pci_clear_master(pdev); + pci_release_regions(pdev); + pci_set_drvdata(pdev, NULL); +} + +static void plx_deinit_dev(struct plx_ntb_dev *ndev) +{ + ndev_deinit_isr(ndev); +} + +static u64 plx_ntb_link_is_up(struct ntb_dev *ntb, enum ntb_speed *speed, enum ntb_width *width) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + u16 link; + + if (pcie_capability_read_word(ndev->ntb.pdev, PCI_EXP_LNKSTA, &link)) + return 0; + if (speed) + *speed = NTB_LNK_STA_SPEED(link); + if (width) + *width = NTB_LNK_STA_WIDTH(link); + return NTB_LNK_STA_WIDTH(link) != 0; +} + +static int plx_ntb_link_enable(struct ntb_dev *ntb, enum ntb_speed max_speed, + enum ntb_width max_width) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + u32 val, reg; + + /* if we see the link interface, then the link is enabled */ + if (ndev->link) { + ntb_link_event(&ndev->ntb); + return 0; + } + + reg = PLX_PORT_CONTROL(ndev); + val = ioread32(ndev->self_mmio + reg); + if ((val & (1 << (ndev->port & 7))) == 0) { + /* If already enabled, generate a link event and exit */ + ntb_link_event(&ndev->ntb); + return 0; + } + val &= ~(1 << (ndev->port & 7)); + iowrite32(val, ndev->self_mmio + reg); + + return 0; +} + +static int plx_ntb_link_disable(struct ntb_dev *ntb) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + u32 val, reg; + + /* If there is no link interface, no need to disable link */ + if (ndev->link) + return 0; + + dev_dbg(&ntb->pdev->dev, "Disabling link\n"); + + reg = PLX_PORT_CONTROL(ndev); + val = ioread32(ndev->self_mmio + reg); + val |= (1 << (ndev->port & 7)); + iowrite32(val, ndev->self_mmio + reg); + + return 0; +} + +static int plx_ntb_mw_count(struct ntb_dev *ntb, int pidx) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + int res; + + res = ndev->mw_count; + res += (1 << ndev->split) - 1; + if (ndev->b2b_mw >= 0 && ndev->b2b_off == 0) + res--; /* B2B consumed the whole window */ + + return res; +} + +static int plx_ntb_peer_mw_count(struct ntb_dev *ntb) +{ + return plx_ntb_mw_count(ntb, 0); +} + +static unsigned int plx_ntb_user_mw_to_idx(struct plx_ntb_dev *ndev, int idx, unsigned int *sp) +{ + unsigned int t; + + t = 1 << ndev->split; + if (idx < t) { + *sp = idx; + return 0; + } + *sp = 0; + + return (idx - (t - 1)); +} + +static int plx_ntb_peer_mw_get_addr(struct ntb_dev *ntb, int idx, phys_addr_t *base, + resource_size_t *size) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + struct plx_ntb_mw_info *mw; + resource_size_t offset, ss; + unsigned int sp, split; + + idx = plx_ntb_user_mw_to_idx(ndev, idx, &sp); + if (idx >= ndev->mw_count) + return -EINVAL; + offset = 0; + if (idx == ndev->b2b_mw) { + /* User should not get non-shared B2B MW */ + BUG_ON(ndev->b2b_off == 0); + offset = ndev->b2b_off; + } + mw = &ndev->mw_info[idx]; + split = (mw->mw_bar == 2) ? ndev->split : 0; + ss = (mw->mw_size - offset) >> split; + + if (base) + *base = mw->mw_pbase + offset + ss * sp; + if (size) + *size = ss; + + return 0; +} + +static int plx_ntb_mw_get_align(struct ntb_dev *ntb, int pidx, int idx, + resource_size_t *addr_align, + resource_size_t *size_align, + resource_size_t *size_max) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + struct plx_ntb_mw_info *mw; + resource_size_t offset; + unsigned int sp; + + idx = plx_ntb_user_mw_to_idx(ndev, idx, &sp); + if (idx >= ndev->mw_count) + return -EINVAL; + offset = 0; + if (idx == ndev->b2b_mw) { + WARN(ndev->b2b_off != 0, "User should not get non-shared B2B MW\n"); + offset = ndev->b2b_off; + } + mw = &ndev->mw_info[idx]; + + /* Remote to local memory window translation address alignment + * Translation address has to be aligned to the BAR size, but A-LUT + * entries re-map addresses can be aligned to 1/128 or 1/256 of it. + * XXX: In B2B mode we can change BAR size (and so alignment) live, + * but there is no way to report it here, so report safe value. + */ + if (addr_align) { + if (ndev->alut && mw->mw_bar == 2) + *addr_align = (mw->mw_size - offset) / 128 / ndev->alut; + else + *addr_align = mw->mw_size - offset; + } + + /* Remote to local memory window size alignment + * The chip has no limit registers, but A-LUT (when available), allows + * access control with granularity of 1/128 or 1/256 of the BAR size. + * XXX: In B2B case we can change BAR size live, but there is no way to + * report it, so report half of the BAR size, that should be safe. In + * non-B2B case there is no control at all, so report the BAR size. + */ + if (size_align) { + if (ndev->alut && mw->mw_bar == 2) + *size_align = (mw->mw_size - offset) / 128 / ndev->alut; + else if (ndev->b2b_mw >= 0) + *size_align = (mw->mw_size - offset) / 2; + else + *size_align = mw->mw_size - offset; + } + + if (size_max) { + *size_max = (mw->mw_size - offset) >> ndev->split; + } + + return 0; +} + +static int plx_ntb_mw_set_trans_internal(struct ntb_dev *ntb, int idx) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + struct plx_ntb_mw_info *mw; + u64 addr, eaddr, off, size, bsize, esize, val64; + u32 val; + unsigned int i, sp, split; + + mw = &ndev->mw_info[idx]; + off = (idx == ndev->b2b_mw) ? ndev->b2b_off : 0; + split = (mw->mw_bar == 2) ? ndev->split : 0; + + /* Get BAR size and in the case of split or B2RP we cannot change it */ + if (split || ndev->b2b_mw < 0) { + bsize = mw->mw_size - off; + } else { + bsize = mw->splits[0].mw_xlat_size; + if (!powerof2(bsize)) + bsize = 1LL << fls64(bsize); + if (bsize > 0 && bsize < 1024 * 1024) + bsize = 1024 * 1024; + } + + /* While for B2B we can set any BAR size on a link side, for a shared window, + * we cannot go above a pre-configured size due to BAR address alignment + * requirements + */ + if ((off & (bsize - 1)) != 0) + return -EINVAL; + + /* In B2B mode, set the Link Interface BAR size/address */ + if (ndev->b2b_mw >= 0 && mw->mw_64bit) { + val64 = 0; + if (bsize > 0) + val64 = (~(bsize - 1) & ~0xfffff); + val64 |= 0xc; + writel(val64, PEER_BASE(ndev) + PLX_MEM_BAR2_SETUP + (mw->mw_bar - 2) * 4); + writel(val64 >> 32, PEER_BASE(ndev) + PLX_MEM_BAR2_SETUP + (mw->mw_bar - 2) * 4 + 4); + + val64 = 0x2000000000000000 * mw->mw_bar + off; + writel(val64, PEER_BASE(ndev) + PCIR_BAR(mw->mw_bar)); + writel(val64 >> 32, PEER_BASE(ndev) + PCIR_BAR(mw->mw_bar) + 4); + } else if (ndev->b2b_mw >= 0) { + val = 0; + if (bsize > 0) + val = (~(bsize - 1) & ~0xfffff); + writel(val, PEER_BASE(ndev) + PLX_MEM_BAR2_SETUP + (mw->mw_bar - 2) * 4); + + val64 = 0x20000000 * mw->mw_bar + off; + writel(val64, PEER_BASE(ndev) + PCIR_BAR(mw->mw_bar)); + } + + /* Set BARs address translation */ + addr = split ? UINT64_MAX : mw->splits[0].mw_xlat_addr; + if (mw->mw_64bit) { + writel(addr, PEER_BASE(ndev) + PLX_MEM_BAR2_ADDR + (mw->mw_bar - 2) * 4); + writel(addr >> 32, PEER_BASE(ndev) + PLX_MEM_BAR2_ADDR + (mw->mw_bar - 2) * 4 + 4); + } else { + writel(addr, PEER_BASE(ndev) + PLX_MEM_BAR2_ADDR + (mw->mw_bar - 2) * 4); + } + + /* Configure and enable A-LUT if we need it */ + size = split ? 0 : mw->splits[0].mw_xlat_size; + if (ndev->alut && mw->mw_bar == 2 && (ndev->split > 0 || + ((addr & (bsize - 1)) != 0 || size != bsize))) { + esize = bsize / (128 * ndev->alut); + for (i = sp = 0; i < 128 * ndev->alut; i++) { + if (i % (128 * ndev->alut >> ndev->split) == 0) { + eaddr = addr = mw->splits[sp].mw_xlat_addr; + size = mw->splits[sp++].mw_xlat_size; + } + val = ndev->link ? 0 : 1; + if (ndev->alut == 1) + val += 2 * ndev->ntx; + val *= 0x1000 * ndev->alut; + val += 0x38000 + i * 4 + (i >= 128 ? 0x0e00 : 0); + writel(eaddr, ndev->self_mmio + val); + writel(eaddr >> 32, ndev->self_mmio + val + 0x400); + writel((eaddr < addr + size) ? 0x3 : 0, ndev->self_mmio + val + 0x800); + eaddr += esize; + } + writel(0x10000000, SELF_BASE(ndev) + PLX_NTX_LNK_ALUT_CNTRL); + } else if (ndev->alut && mw->mw_bar == 2) + writel(0, SELF_BASE(ndev) + PLX_NTX_LNK_ALUT_CNTRL); + + return 0; +} + +static int plx_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx, + dma_addr_t addr, resource_size_t size) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + struct plx_ntb_mw_info *mw; + unsigned int sp; + + idx = plx_ntb_user_mw_to_idx(ndev, idx, &sp); + if (idx >= ndev->mw_count) + return -EINVAL; + + mw = &ndev->mw_info[idx]; + if (!mw->mw_64bit && ((addr & UINT32_MAX) != addr || + ((addr + size) & UINT32_MAX) != (addr + size))) + return -ERANGE; + + mw->splits[sp].mw_xlat_addr = addr; + mw->splits[sp].mw_xlat_size = size; + + return plx_ntb_mw_set_trans_internal(ntb, idx); +} + +static int plx_init_ntb(struct ntb_dev *ntb) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + struct plx_ntb_mw_info *mw; + u64 val64; + u32 val; + int i; + + if (ndev->b2b_mw >= 0) { + /* Set peer BAR0/1 size and address for B2B NTx access */ + mw = &ndev->mw_info[ndev->b2b_mw]; + if (mw->mw_64bit) { + writel(0x3, PEER_BASE(ndev) + PLX_MEM_BAR0_SETUP); /* 64-bit */ + val64 = 0x2000000000000000 * mw->mw_bar | 0x4; + writel(val64, PEER_BASE(ndev) + PCIR_BAR(0)); + writel(val64 >> 32, PEER_BASE(ndev) + PCIR_BAR(0) + 4); + } else { + writel(0x2, PEER_BASE(ndev) + PLX_MEM_BAR0_SETUP); /* 32-bit */ + val = 0x20000000 * mw->mw_bar; + writel(val, PEER_BASE(ndev) + PCIR_BAR(0)); + } + + /* Set Virtual to Link address translation for B2B */ + for (i = 0; i < ndev->mw_count; i++) { + mw = &ndev->mw_info[i]; + if (mw->mw_64bit) { + val64 = 0x2000000000000000 * mw->mw_bar; + writel(val64, SELF_BASE(ndev) + PLX_MEM_BAR2_ADDR + + (mw->mw_bar - 2) * 4); + writel(val64 >> 32, SELF_BASE(ndev) + PLX_MEM_BAR2_ADDR + + (mw->mw_bar - 2) * 4 + 4); + } else { + val = 0x20000000 * mw->mw_bar; + writel(val, SELF_BASE(ndev) + PLX_MEM_BAR2_ADDR + + (mw->mw_bar - 2) * 4); + } + } + + /* Make sure Virtual to Link A-LUT is disabled */ + if (ndev->alut) + writel(0, PEER_BASE(ndev) + PLX_NTX_LNK_ALUT_CNTRL); + + /* Enable all Link Interface LUT entries for peer */ + for (i = 0; i < 32; i += 2) + writel(0x00010001 | ((i + 1) << 19) | (i << 3), + PEER_BASE(ndev) + PLX_NTX_REQ_ID_LUT16 + i * 2); + } + + /* Enable Virtual Interface LUT entry 0 for 0:0.* + * Entry 1 is for our Requester ID reported by the chip and entries 2-5 are for + * 0/64/128/192:4.* of I/OAT DMA engines. + */ + val = (readl(SELF_BASE(ndev) + PLX_NTX_REQ_ID_RD_BK) << 16) | 0x00010001; + writel(val, SELF_BASE(ndev) + (ndev->link ? PLX_NTX_REQ_ID_LUT16 : PLX_NTX_REQ_ID_LUT00)); + writel(0x40210021, SELF_BASE(ndev) + (ndev->link ? PLX_NTX_REQ_ID_LUT18 : + PLX_NTX_REQ_ID_LUT02)); + writel(0xc0218021, SELF_BASE(ndev) + (ndev->link ? PLX_NTX_REQ_ID_LUT20 : + PLX_NTX_REQ_ID_LUT04)); + + /* Set Link to Virtual address translation */ + for (i = 0; i < ndev->mw_count; i++) + plx_ntb_mw_set_trans_internal(ntb, i); + + if (ndev->b2b_mw >= 0) + writel(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PEER_BASE(ndev) + PCI_COMMAND); + + return 0; +} + +static irqreturn_t ndev_irq_isr(int irq, void *dev) +{ + struct plx_ntb_dev *ndev = dev; + u32 val; + + ntb_db_event(&ndev->ntb, 0); + + /* Link Interface has no Link Error registers. */ + if (ndev->link) + goto out; + + val = readl(SELF_BASE(ndev) + PLX_VIRT_LNK_ERR_STATUS); + if (val == 0) + goto out; + writel(val, SELF_BASE(ndev) + PLX_VIRT_LNK_ERR_STATUS); + if (val & 1) + dev_info(&ndev->ntb.pdev->dev, "Correctable Error\n"); + if (val & 2) + dev_info(&ndev->ntb.pdev->dev, "Uncorrectable Error\n"); + if (val & 4) { + /* DL_Down resets link side registers, have to reinit */ + plx_init_ntb(&ndev->ntb); + ntb_link_event(&ndev->ntb); + } + if (val & 8) + dev_info(&ndev->ntb.pdev->dev, "Uncorrectable Error Message Drop\n"); + +out: + return IRQ_HANDLED; +} + +static int plx_init_isr(struct plx_ntb_dev *ndev) +{ + struct pci_dev *pdev; + int rc; + + pdev = ndev->ntb.pdev; + + /* XXX: This hardware supports MSI, but it was found unusable. + * It generates new MSI only when doorbell register goes from zero, + * but does not generate it when another bit is set or on partial + * clear. It makes operation very racy and unreliable. The data book + * mentions some mask juggling magic to workaround that, but we failed + * to make it work. + */ + pci_intx(pdev, 1); + rc = devm_request_irq(&pdev->dev, pdev->irq, ndev_irq_isr, IRQF_SHARED, + NTB_NAME, ndev); + if (rc) + return rc; + + /* Link Interface has no Link Error registers. */ + if (!ndev->link) { + writel(0xf, SELF_BASE(ndev) + PLX_VIRT_LNK_ERR_STATUS); /* Clear link interrupts */ + writel(0x0, SELF_BASE(ndev) + PLX_VIRT_LNK_ERR_MASK); /* Unmask link interrupts */ + } + + return 0; +} + +static int plx_init_dev(struct ntb_dev *ntb) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + struct plx_ntb_mw_info *mw; + struct pci_dev *pdev; + int i, rc = 0, b32 = 0, b64 = 0; + u32 val; + + pdev = ndev->ntb.pdev; + + /* Identify what we are (what side of what NTx) */ + rc = pci_read_config_dword(pdev, PLX_NTX_PORT_ID, &val); + if (rc) + return -EIO; + + ndev->ntx = (val & 1) != 0; + ndev->link = (val & 0x80000000) != 0; + + /* Identify chip port we are connected to */ + val = readl(ndev->self_mmio + PLX_VS0_OFFSET); + ndev->port = (val >> ((ndev->ntx == 0) ? 8 : 16)) & 0x1f; + + /* Detect A-LUT enable and size */ + val >>= 30; + ndev->alut = (val == 0x3) ? 1 : ((val & (1 << ndev->ntx)) ? 2 : 0); + if (ndev->alut) + dev_info(&pdev->dev, "%u A-LUT entries\n", 128 * ndev->alut); + + /* Find configured memory windows at BAR2-5 */ + ndev->mw_count = 0; + for (i = 2; i <= 5; i++) { + mw = &ndev->mw_info[ndev->mw_count]; + mw->mw_bar = i; + mw->mw_pbase = pci_resource_start(pdev, mw->mw_bar); + mw->mw_size = pci_resource_len(pdev, mw->mw_bar); + ndev->mw_count++; + + /* Skip over adjacent BAR for 64-bit BARs */ + rc = pci_read_config_dword(pdev, PCIR_BAR(mw->mw_bar), &val); + if ((val & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) { + mw->mw_64bit = 1; + i++; + b64++; + } else { + b32++; + } + } + + /* Try to identify B2B mode, and check if B2B was disabled via module parameter */ + if (ndev->link) { + dev_info(&pdev->dev, "NTB-to-Root Port mode (Link Interface)\n"); + ndev->ntb.topo = NTB_TOPO_SEC; + ndev->b2b_mw = -1; + } else if (b2b_mode == 0) { + dev_info(&pdev->dev, "NTB-to-Root Port mode (Virtual Interface)\n"); + ndev->ntb.topo = NTB_TOPO_PRI; + ndev->b2b_mw = -1; + } else { + dev_info(&pdev->dev, "NTB-to-NTB (back-to-back) mode\n"); + ndev->ntb.topo = NTB_TOPO_CROSSLINK; + + /* We need at least one memory window for B2B peer access */ + if (ndev->mw_count == 0) { + dev_info(&pdev->dev, "No memory window BARs enabled.\n"); + rc = -ENXIO; + goto out; + } + ndev->b2b_mw = ndev->mw_count - 1; + + /* Use half of the window for B2B, but no less than 1MB */ + mw = &ndev->mw_info[ndev->b2b_mw]; + if (mw->mw_size >= 2 * 1024 * 1024) + ndev->b2b_off = mw->mw_size / 2; + else + ndev->b2b_off = 0; + + ndev->b2b_mmio = pcim_iomap(pdev, mw->mw_bar, + mw->mw_size - ndev->b2b_off); + if (!ndev->b2b_mmio) { + dev_info(&pdev->dev, "Can't map B2B BAR.\n"); + rc = -ENOMEM; + goto out; + } + } + + /* Check the module parameter for user defined split value, default is 0 if + * no value was provided. + */ + if (usplit > 7) { + dev_info(&pdev->dev, "Split value is too high (%u)\n", ndev->split); + ndev->split = 0; + } else if (usplit > 0 && ndev->alut == 0) { + dev_info(&pdev->dev, "Cannot split with disabled A-LUT\n"); + ndev->split = 0; + } else if (usplit > 0 && (ndev->mw_count == 0 || ndev->mw_info[0].mw_bar != 2)) { + dev_info(&pdev->dev, "Can't split disabled BAR2\n"); + ndev->split = 0; + } else if (usplit > 0 && (ndev->b2b_mw == 0 && ndev->b2b_off == 0)) { + dev_info(&pdev->dev, "Can't split BAR2 consumed by B2B\n"); + ndev->split = 0; + } else if (usplit > 0) { + ndev->split = usplit; + dev_info(&pdev->dev, "Splitting BAR2 into %d memory windows\n", 1 << ndev->split); + } + + /* Use Physical Layer User Test Pattern as additional scratchpad and + * make sure they are preset and enabled by writing to them. + * XXX: Its a hack, but standard 8 registers are not enough + */ + ndev->pspad_off1 = ndev->sspad_off1 = PLX_NTX_OUR_BASE(ndev) + PLX_NTX_PORT_SCRATCH0; + ndev->pspad_off2 = ndev->sspad_off2 = PLX_PORT_BASE(ndev->ntx * 8) + PLX_PHY_USR_TST_PATRN; + if (ndev->b2b_mw >= 0) { + /* In NTB-to-NTB mode each side has own scratchpads. */ + ndev->spad_cnt1 = PLX_NUM_SPAD; + writel(0x12345678, ndev->self_mmio + ndev->sspad_off2); + if (readl(ndev->self_mmio + ndev->sspad_off2) == 0x12345678) + ndev->spad_cnt2 = PLX_NUM_SPAD_PATT; + } else { + /* Otherwise we have share scratchpads with the peer. */ + if (ndev->link) { + ndev->sspad_off1 += PLX_NUM_SPAD / 2 * 4; + ndev->sspad_off2 += PLX_NUM_SPAD_PATT / 2 * 4; + } else { + ndev->pspad_off1 += PLX_NUM_SPAD / 2 * 4; + ndev->pspad_off2 += PLX_NUM_SPAD_PATT / 2 * 4; + } + ndev->spad_cnt1 = PLX_NUM_SPAD / 2; + writel(0x12345678, ndev->self_mmio + ndev->sspad_off2); + if (readl(ndev->self_mmio + ndev->sspad_off2) == 0x12345678) + ndev->spad_cnt2 = PLX_NUM_SPAD_PATT / 2; + } + + /* Apply static part of NTB configuration */ + rc = plx_init_ntb(ntb); + if (rc) + return rc; + + pci_set_master(pdev); + + /* Request 64-bit DMA if we have at least one 64-bit BAR. */ + rc = -EIO; + if (b64) + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); + if (rc) + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc) + return rc; + + /* Request 64-bit coherent DMA if we have 64-bit BAR(s), but not 32. */ + rc = -EIO; + if (b64 && !b32) + rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); + if (rc) + rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc) + return rc; + + /* Allocate and setup interrupts */ + rc = plx_init_isr(ndev); + +out: + return rc; +} + +static int plx_ntb_mw_clear_trans(struct ntb_dev *ntb, int pidx, int widx) +{ + return plx_ntb_mw_set_trans(ntb, pidx, widx, 0, 0); +} + +static int plx_ntb_spad_count(struct ntb_dev *ntb) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + + return (ndev->spad_cnt1 + ndev->spad_cnt2); +} + +static int plx_ntb_spad_write(struct ntb_dev *ntb, int idx, u32 val) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + u32 offset, t; + + if (idx < 0 || idx >= ndev->spad_cnt1 + ndev->spad_cnt2) + return -EINVAL; + + if (idx < ndev->spad_cnt1) { + offset = ndev->sspad_off1 + idx * 4; + writel(val, ndev->self_mmio + offset); + return 0; + } else { + offset = ndev->sspad_off2 + (idx - ndev->spad_cnt1) * 4; + /* + * For some reason when link goes down Test Pattern registers + * we use as additional scratchpad become read-only for about + * 100us. I see no explanation in specs, so just wait a bit. + */ + for (t = 0; t <= 1000; t++) { + writel(val, ndev->self_mmio + offset); + if (readl(ndev->self_mmio + offset) == val) + return (0); + udelay(1); + } + dev_err(&ntb->dev, + "Can't write Physical Layer User Test Pattern (0x%x)\n", + offset); + return (-EIO); + } +} + +static u32 plx_ntb_spad_read(struct ntb_dev *ntb, int idx) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + u32 offset; + + if (idx < 0 || (idx >= ndev->spad_cnt1 + ndev->spad_cnt2)) + return 0; + + if (idx < ndev->spad_cnt1) + offset = ndev->sspad_off1 + idx * 4; + else + offset = ndev->sspad_off2 + (idx - ndev->spad_cnt1) * 4; + + return readl(ndev->self_mmio + offset); +} + +static int plx_ntb_peer_spad_write(struct ntb_dev *ntb, int pidx, int sidx, u32 val) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + u32 offset; + + if (sidx < 0 || sidx >= ndev->spad_cnt1 + ndev->spad_cnt2) + return -EINVAL; + + if (sidx < ndev->spad_cnt1) + offset = ndev->pspad_off1 + sidx * 4; + else + offset = ndev->pspad_off2 + (sidx - ndev->spad_cnt1) * 4; + if (ndev->b2b_mw >= 0) + writel(val, ndev->b2b_mmio + offset); + else + writel(val, ndev->self_mmio + offset); + + return 0; +} + +static u32 plx_ntb_peer_spad_read(struct ntb_dev *ntb, int pidx, int sidx) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + u32 offset; + + if (sidx < 0 || sidx >= ndev->spad_cnt1 + ndev->spad_cnt2) + return -EINVAL; + + if (sidx < ndev->spad_cnt1) + offset = ndev->pspad_off1 + sidx * 4; + else + offset = ndev->pspad_off2 + (sidx - ndev->spad_cnt1) * 4; + if (ndev->b2b_mw >= 0) + return readl(ndev->b2b_mmio + offset); + else + return readl(ndev->self_mmio + offset); +} + +static u64 plx_ntb_db_valid_mask(struct ntb_dev *ntb) +{ + return ((1LL << PLX_NUM_DB) - 1); +} + +static int plx_ntb_db_vector_count(struct ntb_dev *ntb) +{ + return 1; +} + +static u64 plx_ntb_db_vector_mask(struct ntb_dev *ntb, int db_vector) +{ + if (db_vector > 0) + return 0; + + return ((1LL << PLX_NUM_DB) - 1); +} + +static int plx_ntb_db_clear(struct ntb_dev *ntb, u64 db_bits) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + + writel(db_bits, SELF_BASE(ndev) + (ndev->link ? PLX_LNK_INT_IRQ_CLEAR : + PLX_VIRT_INT_IRQ_CLEAR)); + + return 0; +} + +static int plx_ntb_db_clear_mask(struct ntb_dev *ntb, u64 db_bits) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + + writel(db_bits, SELF_BASE(ndev) + (ndev->link ? PLX_LNK_INT_IRQ_MASK_CLEAR : + PLX_VIRT_INT_IRQ_MASK_CLEAR)); + + return 0; +} + +static u64 plx_ntb_db_read(struct ntb_dev *ntb) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + + return (u64)readl(SELF_BASE(ndev) + (ndev->link ? PLX_LNK_INT_IRQ_SET : + PLX_VIRT_INT_IRQ_SET)); +} + +static int plx_ntb_db_set_mask(struct ntb_dev *ntb, u64 db_bits) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + + writel(db_bits, SELF_BASE(ndev) + (ndev->link ? PLX_LNK_INT_IRQ_MASK_SET : + PLX_VIRT_INT_IRQ_MASK_SET)); + + return 0; +} + +static int plx_ntb_peer_db_addr(struct ntb_dev *ntb, phys_addr_t *db_addr, resource_size_t *db_size, + u64 *db_data, int db_bit) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + struct plx_ntb_mw_info *mw; + + WARN((db_addr != NULL && db_size != NULL), "db_addr and db_size must be non-NULL\n"); + + if (ndev->b2b_mw >= 0) { + mw = &ndev->mw_info[ndev->b2b_mw]; + *db_addr = (u64)mw->mw_pbase + PLX_NTX_BASE(ndev) + PLX_VIRT_INT_IRQ_SET; + } else { + *db_addr = pci_resource_start(ntb->pdev, 0) + PLX_NTX_BASE(ndev); + *db_addr += ndev->link ? PLX_VIRT_INT_IRQ_SET : PLX_LNK_INT_IRQ_SET; + } + *db_size = 4; + + if (db_data) + *db_data = db_bit; + + return 0; +} + +static int plx_ntb_peer_db_set(struct ntb_dev *ntb, u64 db_bits) +{ + struct plx_ntb_dev *ndev = ntb_ndev(ntb); + + if (ndev->b2b_mw >= 0) + writel(db_bits, B2B_BASE(ndev) + B2B_REG(ndev, PLX_VIRT_INT_IRQ_SET)); + else + writel(db_bits, SELF_BASE(ndev) + (ndev->link ? PLX_VIRT_INT_IRQ_SET : + PLX_LNK_INT_IRQ_SET)); + + return 0; +} + +static ssize_t ndev_debugfs_read(struct file *filp, char __user *ubuf, size_t count, + loff_t *offp) +{ + struct plx_ntb_dev *ndev; + struct pci_dev *pdev; + void __iomem *mmio; + ssize_t ret, off; + size_t buf_size; + char *buf; + + ndev = filp->private_data; + pdev = ndev->ntb.pdev; + mmio = ndev->self_mmio; + + buf_size = min(count, 0x800ul); + + buf = kmalloc(buf_size, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + off = 0; + + off += scnprintf(buf + off, buf_size - off, + "NTB Device Information:\n"); + + off += scnprintf(buf + off, buf_size - off, + "Connection Topology -\t%s\n", + ntb_topo_string(ndev->ntb.topo)); + + if (ndev->b2b_mw != UINT32_MAX) { + off += scnprintf(buf + off, buf_size - off, "B2B MW Idx -\t\t%u\n", + ndev->b2b_mw); + off += scnprintf(buf + off, buf_size - off, "B2B Offset -\t\t%#llx\n", + ndev->b2b_off); + } + + off += scnprintf(buf + off, buf_size - off, "BAR Split -\t\t%s\n", + ndev->split ? "yes" : "no"); + + off += scnprintf(buf + off, buf_size - off, "NTX Value -\t\t%u\n", ndev->ntx); + + off += scnprintf(buf + off, buf_size - off, "Link Status -\t\t%u\n", ndev->link); + + off += scnprintf(buf + off, buf_size - off, "Port Num - \t\t%u\n", ndev->port); + + off += scnprintf(buf + off, buf_size - off, "A-LUT Value - \t\t%u\n", ndev->alut); + + off += scnprintf(buf + off, buf_size - off, "MW Count - \t\t%u\n", ndev->mw_count); + + off += scnprintf(buf + off, buf_size - off, "SPAD Count - \t\t%u\n", ndev->spad_cnt1); + + off += scnprintf(buf + off, buf_size - off, "Extra SPAD - \t\t%u\n", ndev->spad_cnt2); + + off += scnprintf(buf + off, buf_size - off, "SPAD Offset - \t\t%u\n", ndev->sspad_off1); + + off += scnprintf(buf + off, buf_size - off, "Xtra SPAD Offset - \t%u\n", ndev->sspad_off2); + + off += scnprintf(buf + off, buf_size - off, "Peer SPAD Offset - \t%u\n", ndev->pspad_off1); + + off += scnprintf(buf + off, buf_size - off, "Peer Xtra SPAD - \t%u\n", ndev->pspad_off2); + + ret = simple_read_from_buffer(ubuf, count, offp, buf, off); + kfree(buf); + return ret; +} + +static void ndev_deinit_debugfs(struct plx_ntb_dev *ndev) +{ + debugfs_remove_recursive(ndev->debugfs_dir); +} + +static const struct ntb_dev_ops plx_ntb_ops = { + .mw_count = plx_ntb_mw_count, + .mw_get_align = plx_ntb_mw_get_align, + .mw_set_trans = plx_ntb_mw_set_trans, + .mw_clear_trans = plx_ntb_mw_clear_trans, + .peer_mw_count = plx_ntb_peer_mw_count, + .peer_mw_get_addr = plx_ntb_peer_mw_get_addr, + .link_is_up = plx_ntb_link_is_up, + .link_enable = plx_ntb_link_enable, + .link_disable = plx_ntb_link_disable, + .db_valid_mask = plx_ntb_db_valid_mask, + .db_vector_count = plx_ntb_db_vector_count, + .db_vector_mask = plx_ntb_db_vector_mask, + .db_read = plx_ntb_db_read, + .db_clear = plx_ntb_db_clear, + .db_set_mask = plx_ntb_db_set_mask, + .db_clear_mask = plx_ntb_db_clear_mask, + .peer_db_addr = plx_ntb_peer_db_addr, + .peer_db_set = plx_ntb_peer_db_set, + .spad_count = plx_ntb_spad_count, + .spad_read = plx_ntb_spad_read, + .spad_write = plx_ntb_spad_write, + .peer_spad_read = plx_ntb_peer_spad_read, + .peer_spad_write = plx_ntb_peer_spad_write, +}; + +static const struct file_operations plx_ntb_debugfs_info = { + .owner = THIS_MODULE, + .open = simple_open, + .read = ndev_debugfs_read, +}; + +static inline void ndev_init_struct(struct plx_ntb_dev *ndev, struct pci_dev *pdev) +{ + ndev->ntb.pdev = pdev; + ndev->ntb.topo = NTB_TOPO_NONE; + ndev->ntb.ops = &plx_ntb_ops; + + ndev->ntx = 0; + ndev->link = 0; + ndev->port = 0; + ndev->alut = 0; + ndev->split = 0; + + ndev->mw_count = 0; + ndev->spad_cnt1 = 0; + ndev->spad_cnt2 = 0; + ndev->sspad_off1 = 0; + ndev->sspad_off2 = 0; + ndev->pspad_off1 = 0; + ndev->pspad_off2 = 0; + + ndev->b2b_off = 0; + ndev->b2b_mw = UINT32_MAX; +} + +static void ndev_init_debugfs(struct plx_ntb_dev *ndev) +{ + if (!debugfs_dir) { + ndev->debugfs_dir = NULL; + ndev->debugfs_info = NULL; + } else { + ndev->debugfs_dir = debugfs_create_dir(pci_name(ndev->ntb.pdev), + debugfs_dir); + if (!ndev->debugfs_dir) + ndev->debugfs_info = NULL; + else + ndev->debugfs_info = debugfs_create_file("info", 0400, + ndev->debugfs_dir, ndev, + &plx_ntb_debugfs_info); + } +} + +static int plx_ntb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + struct plx_ntb_dev *ndev; + int rc, node; + + node = dev_to_node(&pdev->dev); + ndev = kzalloc_node(sizeof(*ndev), GFP_KERNEL, node); + if (!ndev) { + rc = -ENOMEM; + goto err_ndev; + } + + ndev_init_struct(ndev, pdev); + + rc = plx_ntb_init_pci(ndev, pdev); + if (rc) + goto err_init_pci; + + rc = plx_init_dev(&ndev->ntb); + if (rc) + goto err_init_dev; + + ndev_init_debugfs(ndev); + + rc = ntb_register_device(&ndev->ntb); + if (rc) + goto err_register; + + dev_info(&pdev->dev, "NTB device registered.\n"); + + return 0; + +err_register: + ndev_deinit_debugfs(ndev); + plx_deinit_dev(ndev); +err_init_dev: + plx_ntb_deinit_pci(ndev); +err_init_pci: + kfree(ndev); +err_ndev: + return rc; +} + +static void plx_ntb_pci_remove(struct pci_dev *pdev) +{ + struct plx_ntb_dev *ndev = pci_get_drvdata(pdev); + + ntb_unregister_device(&ndev->ntb); + ndev_deinit_debugfs(ndev); + plx_deinit_dev(ndev); + plx_ntb_deinit_pci(ndev); + kfree(ndev); +} + +static const struct pci_device_id plx_ntb_pci_tbl[] = { + {PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_NT0_LINK)}, + {PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_NT1_LINK)}, + {PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_NT0_VIRT)}, + {PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_NT1_VIRT)}, + {0} +}; +MODULE_DEVICE_TABLE(pci, plx_ntb_pci_tbl); + +static struct pci_driver plx_ntb_pci_driver = { + .name = KBUILD_MODNAME, + .id_table = plx_ntb_pci_tbl, + .probe = plx_ntb_pci_probe, + .remove = plx_ntb_pci_remove, +}; + +static int __init plx_ntb_pci_driver_init(void) +{ + pr_info("%s %s\n", NTB_DESC, NTB_VER); + + if (debugfs_initialized()) + debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL); + + return pci_register_driver(&plx_ntb_pci_driver); +} +module_init(plx_ntb_pci_driver_init); + +static void __exit plx_ntb_pci_driver_exit(void) +{ + pci_unregister_driver(&plx_ntb_pci_driver); + debugfs_remove_recursive(debugfs_dir); +} +module_exit(plx_ntb_pci_driver_exit); diff --git a/drivers/ntb/ntb_split.c b/drivers/ntb/ntb_split.c new file mode 100644 index 000000000000..0871470387aa --- /dev/null +++ b/drivers/ntb/ntb_split.c @@ -0,0 +1,578 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) + +/* + * PCIe NTB Resource Split driver. + */ + +#include +#include +#include +#include +#include +#include "linux/ntb.h" + +#define NTB_SPLIT_VER "1" +#define NTB_SPLIT_NAME "ntb_split" +#define NTB_SPLIT_DESC "NTB Resource Split driver" + +MODULE_DESCRIPTION(NTB_SPLIT_DESC); +MODULE_VERSION(NTB_SPLIT_VER); +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_AUTHOR("Alexander Motin "); + +static char *config; +module_param(config, charp, 0); +MODULE_PARM_DESC(config, "Configuration of child devices"); + +struct ntb_child { + struct ntb_dev dev; + int function; + int enabled; + int mwoff; + int mwcnt; + int spadoff; + int spadcnt; + int dboff; + int dbcnt; + uint64_t dbmask; + struct ntb_child *first; + struct ntb_child *next; +}; + +#define ntb_child(__ntb) \ + container_of(__ntb, struct ntb_child, dev) + +#define ntb_parent(__ntb) \ + dev_ntb((__ntb)->dev.parent) + +static void ntb_split_link_event(void *ctx) +{ + struct ntb_dev *ntb = ctx; + struct ntb_child *nc; + enum ntb_speed speed; + enum ntb_width width; + + if (ntb_link_is_up(ntb, &speed, &width)) { + dev_info(&ntb->dev, "Link is up (PCIe %d.x / x%d)\n", + (int)speed, (int)width); + } else { + dev_info(&ntb->dev, "Link is down\n"); + } + for (nc = dev_get_drvdata(&ntb->dev); nc != NULL; nc = nc->next) + ntb_link_event(&nc->dev); +} + +static void ntb_split_db_event(void *ctx, int vec) +{ + struct ntb_dev *ntb = ctx; + struct ntb_child *nc; + + for (nc = dev_get_drvdata(&ntb->dev); nc != NULL; nc = nc->next) + ntb_db_event(&nc->dev, vec); +} + +static const struct ntb_ctx_ops ntb_split_ops = { + .link_event = ntb_split_link_event, + .db_event = ntb_split_db_event, +}; + +static int ntb_split_port_number(struct ntb_dev *ntb) +{ + return ntb_port_number(ntb_parent(ntb)); +} + +static int ntb_split_peer_port_count(struct ntb_dev *ntb) +{ + return ntb_peer_port_count(ntb_parent(ntb)); +} + +static int ntb_split_peer_port_number(struct ntb_dev *ntb, int pidx) +{ + return ntb_peer_port_number(ntb_parent(ntb), pidx); +} + +static int ntb_split_peer_port_idx(struct ntb_dev *ntb, int port) +{ + return ntb_peer_port_idx(ntb_parent(ntb), port); +} + +static u64 ntb_split_link_is_up(struct ntb_dev *ntb, enum ntb_speed *speed, + enum ntb_width *width) +{ + return ntb_link_is_up(ntb_parent(ntb), speed, width); +} + +static int ntb_split_link_enable(struct ntb_dev *ntb, enum ntb_speed max_speed, + enum ntb_width max_width) +{ + struct ntb_child *nc = ntb_child(ntb), *nc1; + + for (nc1 = nc->first; nc1 != NULL; nc1 = nc1->next) { + if (nc1->enabled) { + nc->enabled = 1; + return (0); + } + } + nc->enabled = 1; + return ntb_link_enable(ntb_parent(ntb), max_speed, max_width); +} + +static int ntb_split_link_disable(struct ntb_dev *ntb) +{ + struct ntb_child *nc = ntb_child(ntb), *nc1; + + if (!nc->enabled) + return (0); + nc->enabled = 0; + for (nc1 = nc->first; nc1 != NULL; nc1 = nc1->next) { + if (nc1->enabled) + return (0); + } + return ntb_link_disable(ntb_parent(ntb)); +} + +static int ntb_split_mw_count(struct ntb_dev *ntb, int pidx) +{ + struct ntb_child *nc = ntb_child(ntb); + + return min(nc->mwcnt, + max(0, ntb_mw_count(ntb_parent(ntb), pidx) - nc->mwoff)); +} + +static int ntb_split_mw_get_align(struct ntb_dev *ntb, int pidx, int widx, + resource_size_t *addr_align, resource_size_t *size_align, + resource_size_t *size_max) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_mw_get_align(ntb_parent(ntb), pidx, widx + nc->mwoff, + addr_align, size_align, size_max); +} + +static int ntb_split_mw_set_trans(struct ntb_dev *ntb, int pidx, int widx, + dma_addr_t addr, resource_size_t size) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_mw_set_trans(ntb_parent(ntb), pidx, widx + nc->mwoff, + addr, size); +} + +static int ntb_split_mw_clear_trans(struct ntb_dev *ntb, int pidx, int widx) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_mw_clear_trans(ntb_parent(ntb), pidx, widx + nc->mwoff); +} + +static int ntb_split_peer_mw_count(struct ntb_dev *ntb) +{ + struct ntb_child *nc = ntb_child(ntb); + + return min(nc->mwcnt, + max(0, ntb_peer_mw_count(ntb_parent(ntb)) - nc->mwoff)); +} + +static int ntb_split_peer_mw_get_addr(struct ntb_dev *ntb, int widx, + phys_addr_t *base, resource_size_t *size) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_mw_get_addr(ntb_parent(ntb), widx + nc->mwoff, + base, size); +} + +static int ntb_split_peer_mw_set_trans(struct ntb_dev *ntb, int pidx, int widx, + u64 addr, resource_size_t size) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_mw_set_trans(ntb_parent(ntb), pidx, widx + nc->mwoff, + addr, size); +} + +static int ntb_split_peer_mw_clear_trans(struct ntb_dev *ntb, int pidx, int widx) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_mw_clear_trans(ntb_parent(ntb), pidx, widx + nc->mwoff); +} + +static int ntb_split_db_is_unsafe(struct ntb_dev *ntb) +{ + return ntb_db_is_unsafe(ntb_parent(ntb)); +} + +static u64 ntb_split_db_valid_mask(struct ntb_dev *ntb) +{ + struct ntb_child *nc = ntb_child(ntb); + + return (ntb_db_valid_mask(ntb_parent(ntb)) >> nc->dboff) & nc->dbmask; +} + +static int ntb_split_db_vector_count(struct ntb_dev *ntb) +{ + return ntb_db_vector_count(ntb_parent(ntb)); +} + +static u64 ntb_split_db_vector_mask(struct ntb_dev *ntb, int db_vector) +{ + struct ntb_child *nc = ntb_child(ntb); + + return (ntb_db_vector_mask(ntb_parent(ntb), db_vector) >> nc->dboff) & + nc->dbmask; +} + +static u64 ntb_split_db_read(struct ntb_dev *ntb) +{ + struct ntb_child *nc = ntb_child(ntb); + + return (ntb_db_read(ntb_parent(ntb)) >> nc->dboff) & nc->dbmask; +} + +static int ntb_split_db_set(struct ntb_dev *ntb, u64 db_bits) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_db_set(ntb_parent(ntb), db_bits << nc->dboff); +} + +static int ntb_split_db_clear(struct ntb_dev *ntb, u64 db_bits) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_db_clear(ntb_parent(ntb), db_bits << nc->dboff); +} + +static u64 ntb_split_db_read_mask(struct ntb_dev *ntb) +{ + struct ntb_child *nc = ntb_child(ntb); + + return (ntb_db_read_mask(ntb_parent(ntb)) >> nc->dboff) & nc->dbmask; +} + +static int ntb_split_db_set_mask(struct ntb_dev *ntb, u64 db_bits) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_db_set_mask(ntb_parent(ntb), db_bits << nc->dboff); +} + +static int ntb_split_db_clear_mask(struct ntb_dev *ntb, u64 db_bits) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_db_clear_mask(ntb_parent(ntb), db_bits << nc->dboff); +} + +static int ntb_split_peer_db_addr(struct ntb_dev *ntb, phys_addr_t *db_addr, + resource_size_t *db_size, u64 *db_data, int db_bit) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_db_addr(ntb_parent(ntb), db_addr, db_size, db_data, + db_bit + nc->dboff); +} + +static u64 ntb_split_peer_db_read(struct ntb_dev *ntb) +{ + struct ntb_child *nc = ntb_child(ntb); + + return (ntb_peer_db_read(ntb_parent(ntb)) >> nc->dboff) & nc->dbmask; +} + +static int ntb_split_peer_db_set(struct ntb_dev *ntb, u64 db_bits) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_db_set(ntb_parent(ntb), db_bits << nc->dboff); +} + +static int ntb_split_peer_db_clear(struct ntb_dev *ntb, u64 db_bits) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_db_clear(ntb_parent(ntb), db_bits << nc->dboff); +} + +static u64 ntb_split_peer_db_read_mask(struct ntb_dev *ntb) +{ + struct ntb_child *nc = ntb_child(ntb); + + return (ntb_peer_db_read_mask(ntb_parent(ntb)) >> nc->dboff) & nc->dbmask; +} + +static int ntb_split_peer_db_set_mask(struct ntb_dev *ntb, u64 db_bits) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_db_set_mask(ntb_parent(ntb), db_bits << nc->dboff); +} + +static int ntb_split_peer_db_clear_mask(struct ntb_dev *ntb, u64 db_bits) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_db_clear_mask(ntb_parent(ntb), db_bits << nc->dboff); +} + +static int ntb_split_spad_is_unsafe(struct ntb_dev *ntb) +{ + return ntb_spad_is_unsafe(ntb_parent(ntb)); +} + +static int ntb_split_spad_count(struct ntb_dev *ntb) +{ + struct ntb_child *nc = ntb_child(ntb); + + return min(nc->spadcnt, + max(0, ntb_spad_count(ntb_parent(ntb)) - nc->spadoff)); +} + +static u32 ntb_split_spad_read(struct ntb_dev *ntb, int sidx) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_spad_read(ntb_parent(ntb), sidx + nc->spadoff); +} + +static int ntb_split_spad_write(struct ntb_dev *ntb, int sidx, u32 val) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_spad_write(ntb_parent(ntb), sidx + nc->spadoff, val); +} + +static int ntb_split_peer_spad_addr(struct ntb_dev *ntb, int pidx, int sidx, + phys_addr_t *spad_addr) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_spad_addr(ntb_parent(ntb), pidx, sidx + nc->spadoff, + spad_addr); +} + +static u32 ntb_split_peer_spad_read(struct ntb_dev *ntb, int pidx, int sidx) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_spad_read(ntb_parent(ntb), pidx, sidx + nc->spadoff); +} + +static int ntb_split_peer_spad_write(struct ntb_dev *ntb, int pidx, int sidx, + u32 val) +{ + struct ntb_child *nc = ntb_child(ntb); + + return ntb_peer_spad_write(ntb_parent(ntb), pidx, sidx + nc->spadoff, + val); +} + +static const struct ntb_dev_ops ntb_split_dev_ops = { + .port_number = ntb_split_port_number, + .peer_port_count = ntb_split_peer_port_count, + .peer_port_number = ntb_split_peer_port_number, + .peer_port_idx = ntb_split_peer_port_idx, + .link_is_up = ntb_split_link_is_up, + .link_enable = ntb_split_link_enable, + .link_disable = ntb_split_link_disable, + .mw_count = ntb_split_mw_count, + .mw_get_align = ntb_split_mw_get_align, + .mw_set_trans = ntb_split_mw_set_trans, + .mw_clear_trans = ntb_split_mw_clear_trans, + .peer_mw_count = ntb_split_peer_mw_count, + .peer_mw_get_addr = ntb_split_peer_mw_get_addr, + .peer_mw_set_trans = ntb_split_peer_mw_set_trans, + .peer_mw_clear_trans = ntb_split_peer_mw_clear_trans, + .db_is_unsafe = ntb_split_db_is_unsafe, + .db_valid_mask = ntb_split_db_valid_mask, + .db_vector_count = ntb_split_db_vector_count, + .db_vector_mask = ntb_split_db_vector_mask, + .db_read = ntb_split_db_read, + .db_set = ntb_split_db_set, + .db_clear = ntb_split_db_clear, + .db_read_mask = ntb_split_db_read_mask, + .db_set_mask = ntb_split_db_set_mask, + .db_clear_mask = ntb_split_db_clear_mask, + .peer_db_addr = ntb_split_peer_db_addr, + .peer_db_read = ntb_split_peer_db_read, + .peer_db_set = ntb_split_peer_db_set, + .peer_db_clear = ntb_split_peer_db_clear, + .peer_db_read_mask = ntb_split_peer_db_read_mask, + .peer_db_set_mask = ntb_split_peer_db_set_mask, + .peer_db_clear_mask = ntb_split_peer_db_clear_mask, + .spad_is_unsafe = ntb_split_spad_is_unsafe, + .spad_count = ntb_split_spad_count, + .spad_read = ntb_split_spad_read, + .spad_write = ntb_split_spad_write, + .peer_spad_addr = ntb_split_peer_spad_addr, + .peer_spad_read = ntb_split_peer_spad_read, + .peer_spad_write = ntb_split_peer_spad_write, +}; + +static int ntb_split_probe(struct ntb_client *client, struct ntb_dev *ntb) +{ + struct ntb_child *cp = NULL, *fcp = NULL, **cpp = &cp, *nc; + int ret, i, l, mw, mwu, mwt, spad, spadu, spadt, db, dbu, dbt; + char *cfg, *n, *np, *p, *name; + char buf[128]; + + if (!config) + return -EINVAL; + cfg = kstrdup(config, GFP_KERNEL); + if (!cfg) + return -ENOMEM; + + mwu = 0; + mwt = ntb_mw_count(ntb, 0); + spadu = 0; + spadt = ntb_spad_count(ntb); + dbu = 0; + dbt = fls64(ntb_db_valid_mask(ntb)); + dev_info(&ntb->dev, "%d memory windows, %d scratchpads, " + "%d doorbells\n", mwt, spadt, dbt); + + ret = ntb_set_ctx(ntb, ntb, &ntb_split_ops); + if (ret) { + kfree(cfg); + return ret; + } + + n = cfg; + i = 0; + while ((np = strsep(&n, ",")) != NULL) { + name = strsep(&np, ":"); + if (name && name[0] == 0) + name = NULL; + p = strsep(&np, ":"); + if (p && p[0] != 0) { + if (kstrtoint(p, 10, &mw)) { + dev_warn(&ntb->dev, "Can't parse mw '%s'\n", p); + mw = 0; + } + } else { + mw = mwt - mwu; + } + p = strsep(&np, ":"); + if (p && p[0] != 0) { + if (kstrtoint(p, 10, &spad)) { + dev_warn(&ntb->dev, "Can't parse spad '%s'\n", p); + spad = 0; + } + } else { + spad = spadt - spadu; + } + if (np && np[0] != 0) { + if (kstrtoint(np, 10, &db)) { + dev_warn(&ntb->dev, "Can't parse db '%s'\n", np); + db = 0; + } + } else { + db = dbt - dbu; + } + + if (mw > mwt - mwu || spad > spadt - spadu || db > dbt - dbu) { + dev_warn(&ntb->dev, "Not enough resources for config\n"); + break; + } + + l = 0; + buf[0] = 0; + if (mw > 1) + l += sprintf(buf + l, " memory windows %d-%d", mwu, mwu + mw - 1); + else if (mw > 0) + l += sprintf(buf + l, " memory window %d", mwu); + if (spad > 1) + l += sprintf(buf + l, " scratchpads %d-%d", spadu, spadu + spad - 1); + else if (spad > 0) + l += sprintf(buf + l, " scratchpad %d", spadu); + if (db > 1) + l += sprintf(buf + l, " doorbells %d-%d", dbu, dbu + db - 1); + else if (db > 0) + l += sprintf(buf + l, " doorbell %d", dbu); + dev_info(&ntb->dev, "%d \"%s\":%s\n", i, name, buf); + + nc = devm_kzalloc(&ntb->dev, sizeof(*nc), GFP_KERNEL); + if (!nc) { + dev_warn(&ntb->dev, "Can't allocate child memory\n"); + break; + } + if (!fcp) { + fcp = nc; + dev_set_drvdata(&ntb->dev, fcp); + } + + nc->function = i; + nc->mwoff = mwu; + nc->mwcnt = mw; + nc->spadoff = spadu; + nc->spadcnt = spad; + nc->dboff = dbu; + nc->dbcnt = db; + nc->dbmask = (db == 0) ? 0 : (0xffffffffffffffff >> (64 - db)); + nc->first = fcp; + + nc->dev.dev.parent = &ntb->dev; + dev_set_name(&nc->dev.dev, "%s-%d", dev_name(&ntb->dev), i); + nc->dev.pdev = ntb->pdev; + nc->dev.topo = ntb->topo; + nc->dev.ops = &ntb_split_dev_ops; + if (name) + nc->dev.driver_override = kstrdup(name, GFP_KERNEL); + ret = ntb_register_device(&nc->dev); + if (ret) { + dev_warn(&ntb->dev, "Can't register child device\n"); + break; + } + *cpp = nc; + cpp = &nc->next; + + mwu += mw; + spadu += spad; + dbu += db; + i++; + } + kfree(cfg); + + return 0; +} + +static void ntb_split_remove(struct ntb_client *client, struct ntb_dev *ntb) +{ + struct ntb_child *nc; + + for (nc = dev_get_drvdata(&ntb->dev); nc != NULL; nc = nc->next) + ntb_unregister_device(&nc->dev); + + ntb_link_disable(ntb); + ntb_db_set_mask(ntb, ntb_db_valid_mask(ntb)); + ntb_clear_ctx(ntb); +} + +static struct ntb_client ntb_split_client = { + .ops = { + .probe = ntb_split_probe, + .remove = ntb_split_remove, + }, +}; + +static int __init ntb_split_init(void) +{ + int ret; + + pr_info("%s, version %s\n", NTB_SPLIT_DESC, NTB_SPLIT_VER); + + ret = ntb_register_client(&ntb_split_client); + if (ret) + return ret; + + return 0; +} +module_init(ntb_split_init); + +static void __exit ntb_split_exit(void) +{ + + ntb_unregister_client(&ntb_split_client); +} +module_exit(ntb_split_exit); diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c index a22ea4a4b202..6e0b636390bb 100644 --- a/drivers/ntb/ntb_transport.c +++ b/drivers/ntb/ntb_transport.c @@ -53,6 +53,7 @@ #include #include #include +#include #include #include #include @@ -66,7 +67,6 @@ #define NTB_TRANSPORT_VER "4" #define NTB_TRANSPORT_NAME "ntb_transport" #define NTB_TRANSPORT_DESC "Software Queue-Pair Transport over NTB" -#define NTB_TRANSPORT_MIN_SPADS (MW0_SZ_HIGH + 2) MODULE_DESCRIPTION(NTB_TRANSPORT_DESC); MODULE_VERSION(NTB_TRANSPORT_VER); @@ -89,6 +89,10 @@ static unsigned int copy_bytes = 1024; module_param(copy_bytes, uint, 0644); MODULE_PARM_DESC(copy_bytes, "Threshold under which NTB will use the CPU to copy instead of DMA"); +static bool compact; +module_param(compact, bool, 0644); +MODULE_PARM_DESC(compact, "Use compact version of sratchpad protocol"); + static bool use_dma; module_param(use_dma, bool, 0644); MODULE_PARM_DESC(use_dma, "Use DMA engine to perform large data copy"); @@ -213,6 +217,11 @@ struct ntb_transport_mw { dma_addr_t dma_addr; }; +struct ntb_transport_client_dev_name { + struct list_head entry; + char device_name[]; +}; + struct ntb_transport_client_dev { struct list_head entry; struct ntb_transport_ctx *nt; @@ -224,9 +233,11 @@ struct ntb_transport_ctx { struct list_head client_devs; struct ntb_dev *ndev; + int unit; struct ntb_transport_mw *mw_vec; struct ntb_transport_qp *qp_vec; + int compact; unsigned int mw_count; unsigned int qp_count; u64 qp_bitmap; @@ -263,6 +274,15 @@ enum { MW0_SZ_LOW, }; +/* + * Compart version of sratchpad protocol, using twice less registers. + */ +enum { + NTBTC_PARAMS = 0, /* NUM_QPS << 24 + NUM_MWS << 16 + VERSION */ + NTBTC_QP_LINKS, /* QP links status */ + NTBTC_MW0_SZ, /* MW size limited to 32 bits. */ +}; + #define dev_client_dev(__dev) \ container_of((__dev), struct ntb_transport_client_dev, dev) @@ -271,7 +291,7 @@ enum { #define QP_TO_MW(nt, qp) ((qp) % nt->mw_count) #define NTB_QP_DEF_NUM_ENTRIES 100 -#define NTB_LINK_DOWN_TIMEOUT 10 +#define NTB_LINK_DOWN_TIMEOUT 100 static void ntb_transport_rxc_db(unsigned long data); static const struct ntb_ctx_ops ntb_transport_ops; @@ -321,11 +341,57 @@ static const struct bus_type ntb_transport_bus = { .remove = ntb_transport_bus_remove, }; +static void ntb_transport_client_release(struct device *dev) +{ + struct ntb_transport_client_dev *client_dev; + + client_dev = dev_client_dev(dev); + kfree(client_dev); +} + +static int ntb_transport_add_dev(struct ntb_transport_ctx *nt, char *device_name) +{ + struct ntb_transport_client_dev *client_dev; + struct device *dev; + int node, rc; + + node = dev_to_node(&nt->ndev->dev); + client_dev = kzalloc_node(sizeof(*client_dev), GFP_KERNEL, node); + if (!client_dev) + return -ENOMEM; + + dev = &client_dev->dev; + + /* setup and register client devices */ + dev_set_name(dev, "%s%d", device_name, nt->unit); + dev->bus = &ntb_transport_bus; + dev->release = ntb_transport_client_release; + dev->parent = &nt->ndev->dev; + + rc = device_register(dev); + if (rc) { + kfree(client_dev); + return rc; + } + + list_add_tail(&client_dev->entry, &nt->client_devs); + return 0; +} + static LIST_HEAD(ntb_transport_list); +static DEFINE_IDA(ntb_transport_unit_ida); +static LIST_HEAD(ntb_transport_client_list); static int ntb_bus_init(struct ntb_transport_ctx *nt) { + struct ntb_transport_client_dev_name *n; + + nt->unit = ida_alloc(&ntb_transport_unit_ida, GFP_KERNEL); + if (nt->unit < 0) + return nt->unit; list_add_tail(&nt->entry, &ntb_transport_list); + list_for_each_entry(n, &ntb_transport_client_list, entry) + ntb_transport_add_dev(nt, n->device_name); return 0; } @@ -341,14 +407,7 @@ static void ntb_bus_remove(struct ntb_transport_ctx *nt) } list_del(&nt->entry); -} - -static void ntb_transport_client_release(struct device *dev) -{ - struct ntb_transport_client_dev *client_dev; - - client_dev = dev_client_dev(dev); - kfree(client_dev); + ida_free(&ntb_transport_unit_ida, nt->unit); } /** @@ -359,6 +418,7 @@ static void ntb_transport_client_release(struct device *dev) */ void ntb_transport_unregister_client_dev(char *device_name) { + struct ntb_transport_client_dev_name *n; struct ntb_transport_client_dev *client, *cd; struct ntb_transport_ctx *nt; @@ -369,6 +429,13 @@ void ntb_transport_unregister_client_dev(char *device_name) list_del(&client->entry); device_unregister(&client->dev); } + list_for_each_entry(n, &ntb_transport_client_list, entry) { + if (!strcmp(n->device_name, device_name)) { + list_del(&n->entry); + kfree(n); + break; + } + } } EXPORT_SYMBOL_GPL(ntb_transport_unregister_client_dev); @@ -382,42 +449,20 @@ EXPORT_SYMBOL_GPL(ntb_transport_unregister_client_dev); */ int ntb_transport_register_client_dev(char *device_name) { - struct ntb_transport_client_dev *client_dev; + struct ntb_transport_client_dev_name *n; struct ntb_transport_ctx *nt; - int node; - int rc, i = 0; + int rc; - if (list_empty(&ntb_transport_list)) - return -ENODEV; + n = kzalloc(sizeof(*n) + strlen(device_name) + 1, GFP_KERNEL); + if (!n) + return -ENOMEM; + strcpy(n->device_name, device_name); + list_add_tail(&n->entry, &ntb_transport_client_list); list_for_each_entry(nt, &ntb_transport_list, entry) { - struct device *dev; - - node = dev_to_node(&nt->ndev->dev); - - client_dev = kzalloc_node(sizeof(*client_dev), - GFP_KERNEL, node); - if (!client_dev) { - rc = -ENOMEM; + rc = ntb_transport_add_dev(nt, device_name); + if (rc < 0) goto err; - } - - dev = &client_dev->dev; - - /* setup and register client devices */ - dev_set_name(dev, "%s%d", device_name, i); - dev->bus = &ntb_transport_bus; - dev->release = ntb_transport_client_release; - dev->parent = &nt->ndev->dev; - - rc = device_register(dev); - if (rc) { - put_device(dev); - goto err; - } - - list_add_tail(&client_dev->entry, &nt->client_devs); - i++; } return 0; @@ -440,10 +485,6 @@ EXPORT_SYMBOL_GPL(ntb_transport_register_client_dev); int ntb_transport_register_client(struct ntb_transport_client *drv) { drv->driver.bus = &ntb_transport_bus; - - if (list_empty(&ntb_transport_list)) - return -ENODEV; - return driver_register(&drv->driver); } EXPORT_SYMBOL_GPL(ntb_transport_register_client); @@ -1062,49 +1103,76 @@ static void ntb_transport_link_work(struct work_struct *work) for (i = 0; i < nt->qp_count; i++) ntb_transport_setup_qp_msi(nt, i); - for (i = 0; i < nt->mw_count; i++) { - size = nt->mw_vec[i].phys_size; - - if (max_mw_size && size > max_mw_size) - size = max_mw_size; + if (nt->compact) { + for (i = 0; i < nt->mw_count; i++) { + size = nt->mw_vec[i].phys_size; - spad = MW0_SZ_HIGH + (i * 2); - ntb_peer_spad_write(ndev, PIDX, spad, upper_32_bits(size)); + if (max_mw_size && size > max_mw_size) + size = max_mw_size; + BUG_ON(upper_32_bits(size) != 0); - spad = MW0_SZ_LOW + (i * 2); - ntb_peer_spad_write(ndev, PIDX, spad, lower_32_bits(size)); - } + spad = NTBTC_MW0_SZ + i; + ntb_peer_spad_write(ndev, PIDX, spad, lower_32_bits(size)); + } + ntb_peer_spad_write(ndev, PIDX, NTBTC_QP_LINKS, 0); + ntb_peer_spad_write(ndev, PIDX, NTBTC_PARAMS, + (nt->qp_count << 24) | (nt->mw_count << 16) | + NTB_TRANSPORT_VERSION); + } else { + for (i = 0; i < nt->mw_count; i++) { + size = nt->mw_vec[i].phys_size; - ntb_peer_spad_write(ndev, PIDX, NUM_MWS, nt->mw_count); + if (max_mw_size && size > max_mw_size) + size = max_mw_size; - ntb_peer_spad_write(ndev, PIDX, NUM_QPS, nt->qp_count); + spad = MW0_SZ_HIGH + (i * 2); + ntb_peer_spad_write(ndev, PIDX, spad, upper_32_bits(size)); - ntb_peer_spad_write(ndev, PIDX, VERSION, NTB_TRANSPORT_VERSION); + spad = MW0_SZ_LOW + (i * 2); + ntb_peer_spad_write(ndev, PIDX, spad, lower_32_bits(size)); + } + ntb_peer_spad_write(ndev, PIDX, NUM_MWS, nt->mw_count); + ntb_peer_spad_write(ndev, PIDX, NUM_QPS, nt->qp_count); + ntb_peer_spad_write(ndev, PIDX, QP_LINKS, 0); + ntb_peer_spad_write(ndev, PIDX, VERSION, NTB_TRANSPORT_VERSION); + } /* Query the remote side for its info */ - val = ntb_spad_read(ndev, VERSION); - dev_dbg(&pdev->dev, "Remote version = %d\n", val); - if (val != NTB_TRANSPORT_VERSION) - goto out; - - val = ntb_spad_read(ndev, NUM_QPS); - dev_dbg(&pdev->dev, "Remote max number of qps = %d\n", val); - if (val != nt->qp_count) - goto out; - - val = ntb_spad_read(ndev, NUM_MWS); - dev_dbg(&pdev->dev, "Remote number of mws = %d\n", val); - if (val != nt->mw_count) - goto out; + if (nt->compact) { + val = ntb_spad_read(ndev, NTBTC_PARAMS); + dev_dbg(&pdev->dev, "Remote params = 0x%x\n", val); + if (val != ((nt->qp_count << 24) | (nt->mw_count << 16) | + NTB_TRANSPORT_VERSION)) + goto out; + } else { + val = ntb_spad_read(ndev, VERSION); + dev_dbg(&pdev->dev, "Remote version = %d\n", val); + if (val != NTB_TRANSPORT_VERSION) + goto out; + + val = ntb_spad_read(ndev, NUM_QPS); + dev_dbg(&pdev->dev, "Remote max number of qps = %d\n", val); + if (val != nt->qp_count) + goto out; + + val = ntb_spad_read(ndev, NUM_MWS); + dev_dbg(&pdev->dev, "Remote number of mws = %d\n", val); + if (val != nt->mw_count) + goto out; + } for (i = 0; i < nt->mw_count; i++) { u64 val64; - val = ntb_spad_read(ndev, MW0_SZ_HIGH + (i * 2)); - val64 = (u64)val << 32; + if (nt->compact) { + val64 = ntb_spad_read(ndev, NTBTC_MW0_SZ + i); + } else { + val = ntb_spad_read(ndev, MW0_SZ_HIGH + (i * 2)); + val64 = (u64)val << 32; - val = ntb_spad_read(ndev, MW0_SZ_LOW + (i * 2)); - val64 |= val; + val = ntb_spad_read(ndev, MW0_SZ_LOW + (i * 2)); + val64 |= val; + } dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64); @@ -1148,15 +1216,19 @@ static void ntb_qp_link_work(struct work_struct *work) link_work.work); struct pci_dev *pdev = qp->ndev->pdev; struct ntb_transport_ctx *nt = qp->transport; - int val; + int i, val; WARN_ON(!nt->link_is_up); - val = ntb_spad_read(nt->ndev, QP_LINKS); - - ntb_peer_spad_write(nt->ndev, PIDX, QP_LINKS, val | BIT(qp->qp_num)); + /* Report queues that are up on our side */ + for (i = 0, val = 0; i < nt->qp_count; i++) { + if (nt->qp_vec[i].client_ready) + val |= BIT(i); + } + ntb_peer_spad_write(nt->ndev, PIDX, QP_LINKS, val); /* query remote spad for qp ready bits */ + val = ntb_spad_read(nt->ndev, QP_LINKS); dev_dbg_ratelimited(&pdev->dev, "Remote QP link status = %x\n", val); /* See if the remote side is up */ @@ -1309,14 +1381,23 @@ static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev) spad_count = ntb_spad_count(ndev); /* Limit the MW's based on the availability of scratchpads */ - - if (spad_count < NTB_TRANSPORT_MIN_SPADS) { - nt->mw_count = 0; - rc = -EINVAL; - goto err; + nt->compact = compact || (spad_count < 4 + 2 * mw_count); + if (nt->compact) { + if (spad_count < NTBTC_MW0_SZ + 1) { + nt->mw_count = 0; + rc = -EINVAL; + goto err; + } + max_mw_count_for_spads = spad_count - NTBTC_MW0_SZ; + } else { + if (spad_count < MW0_SZ_HIGH + 2) { + nt->mw_count = 0; + rc = -EINVAL; + goto err; + } + max_mw_count_for_spads = (spad_count - MW0_SZ_HIGH) / 2; } - max_mw_count_for_spads = (spad_count - MW0_SZ_HIGH) / 2; nt->mw_count = min(mw_count, max_mw_count_for_spads); nt->msi_spad_offset = nt->mw_count * 2 + MW0_SZ_HIGH; @@ -1335,6 +1416,10 @@ static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev) &mw->phys_size); if (rc) goto err1; + if (nt->compact && mw->phys_size > 0xffffffff) { + rc = -ENXIO; + goto err1; + } mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size); if (!mw->vbase) { @@ -1389,6 +1474,7 @@ static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev) INIT_DELAYED_WORK(&nt->link_work, ntb_transport_link_work); INIT_WORK(&nt->link_cleanup, ntb_transport_link_cleanup_work); + nt->link_is_up = false; rc = ntb_set_ctx(ndev, nt, &ntb_transport_ops); if (rc) @@ -1399,7 +1485,6 @@ static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev) if (rc) goto err3; - nt->link_is_up = false; ntb_link_enable(ndev, NTB_SPEED_AUTO, NTB_WIDTH_AUTO); ntb_link_event(ndev); @@ -1427,6 +1512,8 @@ static void ntb_transport_free(struct ntb_client *self, struct ntb_dev *ndev) u64 qp_bitmap_alloc; int i; + ntb_bus_remove(nt); + ntb_transport_link_cleanup(nt); cancel_work_sync(&nt->link_cleanup); cancel_delayed_work_sync(&nt->link_work); @@ -1440,12 +1527,11 @@ static void ntb_transport_free(struct ntb_client *self, struct ntb_dev *ndev) ntb_transport_free_queue(qp); debugfs_remove_recursive(qp->debugfs_dir); } + debugfs_remove_recursive(nt->debugfs_node_dir); ntb_link_disable(ndev); ntb_clear_ctx(ndev); - ntb_bus_remove(nt); - for (i = nt->mw_count; i--; ) { ntb_free_mw(nt, i); iounmap(nt->mw_vec[i].vbase); @@ -1741,7 +1827,8 @@ static void ntb_transport_rxc_db(unsigned long data) */ if (qp->active) tasklet_schedule(&qp->rxc_db_work); - } + } else if (qp->active) + ntb_db_clear_mask(qp->ndev, BIT_ULL(qp->qp_num)); } static void ntb_tx_copy_callback(void *data, @@ -2356,16 +2443,21 @@ EXPORT_SYMBOL_GPL(ntb_transport_link_up); */ void ntb_transport_link_down(struct ntb_transport_qp *qp) { - int val; + struct ntb_transport_ctx *nt; + int i, val; if (!qp) return; qp->client_ready = false; - val = ntb_spad_read(qp->ndev, QP_LINKS); - - ntb_peer_spad_write(qp->ndev, PIDX, QP_LINKS, val & ~BIT(qp->qp_num)); + /* Report queues that are up on our side */ + nt = qp->transport; + for (i = 0, val = 0; i < nt->qp_count; i++) { + if (nt->qp_vec[i].client_ready) + val |= BIT(i); + } + ntb_peer_spad_write(nt->ndev, PIDX, QP_LINKS, val); if (qp->link_is_up) ntb_send_link_down(qp); @@ -2455,14 +2547,18 @@ static void ntb_transport_doorbell_callback(void *data, int vector) u64 db_bits; unsigned int qp_num; - if (ntb_db_read(nt->ndev) & nt->msi_db_mask) { + db_bits = ntb_db_read(nt->ndev); + if (db_bits & nt->msi_db_mask) { ntb_transport_msi_peer_desc_changed(nt); ntb_db_clear(nt->ndev, nt->msi_db_mask); } - db_bits = (nt->qp_bitmap & ~nt->qp_bitmap_free & + db_bits &= (nt->qp_bitmap & ~nt->qp_bitmap_free & ntb_db_vector_mask(nt->ndev, vector)); - + if (db_bits) { + ntb_db_set_mask(nt->ndev, db_bits); + ntb_db_clear(nt->ndev, db_bits); + } while (db_bits) { qp_num = __ffs(db_bits); qp = &nt->qp_vec[qp_num]; diff --git a/drivers/nvdimm/Makefile b/drivers/nvdimm/Makefile index ba0296dca9db..d3a49f5e9fe3 100644 --- a/drivers/nvdimm/Makefile +++ b/drivers/nvdimm/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_LIBNVDIMM) += libnvdimm.o obj-$(CONFIG_BLK_DEV_PMEM) += nd_pmem.o +obj-$(CONFIG_BLK_DEV_PMEM) += ntb_pmem.o obj-$(CONFIG_ND_BTT) += nd_btt.o obj-$(CONFIG_X86_PMEM_LEGACY) += nd_e820.o obj-$(CONFIG_OF_PMEM) += of_pmem.o @@ -8,6 +9,8 @@ obj-$(CONFIG_VIRTIO_PMEM) += virtio_pmem.o nd_virtio.o nd_pmem-y := pmem.o +ntb_pmem-y := ntb.o + nd_btt-y := btt.o nd_e820-y := e820.o diff --git a/drivers/nvdimm/ntb.c b/drivers/nvdimm/ntb.c new file mode 100644 index 000000000000..cc22ba8d4ff8 --- /dev/null +++ b/drivers/nvdimm/ntb.c @@ -0,0 +1,535 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) + +/* + * PCIe NTB PMEM mirroring driver. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "linux/ntb.h" +#include +#include "nd.h" +#include "pmem.h" + +#define NTB_PMEM_VER "1" +#define NTB_PMEM_NAME "ntb_pmem" +#define NTB_PMEM_DESC "NTB PMEM mirroring driver" + +static unsigned long start_timeout = 120; +module_param(start_timeout, ulong, 0644); +MODULE_PARM_DESC(start_timeout, "Synchronization wait timeout (seconds)"); + +MODULE_DESCRIPTION(NTB_PMEM_DESC); +MODULE_VERSION(NTB_PMEM_VER); +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_AUTHOR("Alexander Motin "); + +/* Only two-ports NTB devices are supported */ +#define PIDX NTB_DEF_PEER_IDX + +/* NTB PMEM device */ +struct ntb_pmem { + struct ntb_dev *ndev; + int id; + struct pmem_device *pmem; + async_cookie_t wait; + unsigned long wait_till; + struct delayed_work link_work; + struct work_struct link_cleanup; + phys_addr_t ntb_paddr; /* MW physical address */ + resource_size_t ntb_size; /* MW size */ + void *ntb_vaddr; /* MW KVA address */ + phys_addr_t ntb_xalign; /* XLAT address allignment */ + phys_addr_t ntb_xpaddr; /* XLAT physical address */ + resource_size_t ntb_xsize; /* XLAT size */ +}; + +enum { + NTBN_SIGN = 0, + NTBN_SIZE_HIGH, + NTBN_OFF_HIGH, + NTBN_OFF_LOW, +}; + +#define MAX_PMEMS 4 +static struct ntb_pmem_links { + struct mutex lock; + struct pmem_device *pmem; + struct ntb_pmem *ntb; +} links[MAX_PMEMS]; + +static void ntb_pmem_sync(struct ntb_pmem *sc) +{ + struct ntb_dev *ndev = sc->ndev; + struct pmem_device *pmem = sc->pmem; + struct pmem_label *ll = pmem->label; + struct pmem_label *rl = pmem->rlabel; + long b; + u32 state; + int dir; + + if (rl == NULL || rl->sign != PMEM_SIGN_LONG) { + dev_err(&ndev->dev, "Can't see label on other side.\n"); + return; + } + + /* Decide direciton of copy. */ + dir = 0; + if (rl->empty && !ll->empty) { + dev_info(&ndev->dev, "Other side is empty.\n"); + dir = 1; + } else if (ll->empty && !rl->empty) { + dev_info(&ndev->dev, "Our side is empty.\n"); + dir = -1; + } else if (rl->array != ll->array) { + if (ll->empty && rl->empty) + dev_info(&ndev->dev, "Both sides are empty.\n"); + else + dev_notice(&ndev->dev, "Two different arrays!\n"); + if (ll->array > rl->array) + dir = 1; /* Forcefully sync l->r. */ + else + dir = -1; /* Forcefully sync r->l. */ + } else if (!ll->dirty && !rl->dirty) { + dev_info(&ndev->dev, "Both sides are clean.\n"); + } else if (ll->opened && rl->opened) { + dev_info(&ndev->dev, "Both sides are opened!\n"); + } else if (ll->opened) { + dev_info(&ndev->dev, "Local side is opened.\n"); + dir = 1; + } else if (rl->opened) { + dev_info(&ndev->dev, "Remote side is opened.\n"); + dir = -1; + } else if (ll->dirty) { + dev_info(&ndev->dev, "Local side is dirty.\n"); + dir = 1; + } else if (rl->dirty) { + dev_info(&ndev->dev, "Remote side is dirty.\n"); + dir = -1; + } + + /* Let the other side to get to the same conclusion. */ + smp_store_release(&ll->state, STATE_WAITING); + while (((state = smp_load_acquire(&rl->state)) == STATE_NONE || + state == STATE_IDLE) && pmem->rlabel != NULL) + cpu_relax(); + + /* Source side is copying, destination is waiting for it. */ + if (dir > 0) { + dev_info(&ndev->dev, "Copying local to remote.\n"); + b = jiffies; + memcpy(pmem->rvirt_addr, pmem->virt_addr, + pmem->size - PAGE_SIZE); + b = max_t(long, jiffies - b, 1); + dev_info(&ndev->dev, "Copied %zuMB at %zuMB/s\n", + pmem->size / 1024 / 1024, + pmem->size * HZ / 1024 / 1024 / b); + rl->array = ll->array; + rl->empty = ll->empty; + rl->dirty = ll->dirty = 0; + smp_store_release(&ll->state, STATE_READY); + smp_store_release(&rl->state, STATE_READY); + arch_wb_cache_pmem(ll, sizeof(struct pmem_label)); + } else if (dir < 0) { + dev_info(&ndev->dev, "Waiting for remote to local copy.\n"); + while (smp_load_acquire(&rl->state) == STATE_WAITING && + pmem->rlabel != NULL) + cpu_relax(); + disk_force_media_change(pmem->disk); + } else { + dev_info(&ndev->dev, "No need to copy.\n"); + smp_store_release(&ll->state, STATE_READY); + } + dev_info(&ndev->dev, "Sync is done.\n"); +} + +static int ntb_pmem_set_trans(struct ntb_pmem *sc) +{ + struct ntb_dev *ndev = sc->ndev; + struct pmem_device *pmem = sc->pmem; + int error; + + /* + * Once NTB is connected, we can finally get the peer's required window + * alignment. Depending on it and the pmem physical address the window + * may have to be up to twice bigger than pmem size to cover it. If + * that is true, set up the translation address and size accordingly. + */ + error = ntb_mw_get_align(ndev, PIDX, 0, &sc->ntb_xalign, NULL, NULL); + if (error != 0) { + dev_err(&ndev->dev, "ntb_mw_get_align() error %d\n", error); + return error; + } + sc->ntb_xpaddr = pmem->phys_addr & ~(sc->ntb_xalign - 1); + sc->ntb_xsize = pmem->phys_addr - sc->ntb_xpaddr + pmem->size; + if (sc->ntb_size < sc->ntb_xsize) { + dev_err(&ndev->dev, "Memory window is too small (%pa < %pa).\n", + &sc->ntb_size, &sc->ntb_xsize); + return -ENOMEM; + } else if (sc->ntb_size < 2 * pmem->size) { + dev_notice(&ndev->dev, + "Memory window may be too small (%pa < %zu).\n", + &sc->ntb_size, 2 * pmem->size); + } + error = ntb_mw_set_trans(ndev, PIDX, 0, sc->ntb_xpaddr, sc->ntb_xsize); + if (error != 0) { + dev_err(&ndev->dev, "ntb_mw_set_trans() error %d\n", error); + return error; + } + return (0); +} + +static void ntb_pmem_link_work(struct work_struct *work) +{ + struct ntb_pmem *sc = container_of(work, struct ntb_pmem, + link_work.work); + struct ntb_dev *ndev = sc->ndev; + struct pmem_device *pmem = sc->pmem; + phys_addr_t off; + u32 val; + + if (!sc->ntb_xsize && ntb_pmem_set_trans(sc)) + return; + + /* + * Report our parameters to the peer. The most important is a pmem + * offset within the memory window due to its required alignment. + */ + off = pmem->phys_addr - sc->ntb_xpaddr; + ntb_peer_spad_write(ndev, PIDX, NTBN_OFF_LOW, off & 0xffffffff); + ntb_peer_spad_write(ndev, PIDX, NTBN_OFF_HIGH, off >> 32); + ntb_peer_spad_write(ndev, PIDX, NTBN_SIZE_HIGH, pmem->size >> 32); + ntb_peer_spad_write(ndev, PIDX, NTBN_SIGN, PMEM_SIGN_SHORT); + + /* Look for peer signature. It is written last, but read first. */ + val = ntb_spad_read(ndev, NTBN_SIGN); + if (val != PMEM_SIGN_SHORT) + goto out; + + /* Approximately compare pmems sizes due to limited scratch space. */ + val = ntb_spad_read(ndev, NTBN_SIZE_HIGH); + if (val != (pmem->size >> 32)) { + dev_err(&ndev->dev, "PMEM sizes don't match (%u != %u)\n", + val << 2, (u32)(pmem->size >> 30)); + return; + } + + /* Fetch pmem offset within peer's memory window. */ + val = ntb_spad_read(ndev, NTBN_OFF_HIGH); + off = (phys_addr_t)val << 32; + val = ntb_spad_read(ndev, NTBN_OFF_LOW); + off |= val; + + dev_info(&ndev->dev, "Connection established\n"); + pmem->rphys_addr = sc->ntb_paddr + off; + pmem->rvirt_addr = sc->ntb_vaddr + off; + pmem->rlabel = (struct pmem_label *)(pmem->rvirt_addr + pmem->size - + PAGE_SIZE); + + ntb_pmem_sync(sc); + return; +out: + if (ntb_link_is_up(ndev, NULL, NULL)) + schedule_delayed_work(&sc->link_work, msecs_to_jiffies(100)); +} + +static void ntb_pmem_link_cleanup_work(struct work_struct *work) +{ + struct ntb_pmem *sc = container_of(work, struct ntb_pmem, link_cleanup); + struct ntb_dev *ndev = sc->ndev; + struct pmem_device *pmem = sc->pmem; + + cancel_delayed_work_sync(&sc->link_work); + + pmem->rphys_addr = 0; + pmem->rvirt_addr = NULL; + pmem->rlabel = NULL; + if (pmem->label->state > STATE_IDLE) + pmem->label->state = STATE_IDLE; + + ntb_mw_clear_trans(ndev, PIDX, 0); + sc->ntb_xsize = 0; + + /* + * The scratchpad registers keep the values if the remote side + * goes down, blast them now to give them a sane value the next + * time they are accessed. + */ + ntb_spad_write(ndev, NTBN_SIGN, 0); + ntb_spad_write(ndev, NTBN_SIZE_HIGH, 0); + ntb_spad_write(ndev, NTBN_OFF_HIGH, 0); + ntb_spad_write(ndev, NTBN_OFF_LOW, 0); +} + +static void ntb_pmem_link_event(void *ctx) +{ + struct ntb_pmem *sc = ctx; + struct ntb_dev *ndev = sc->ndev; + enum ntb_speed speed; + enum ntb_width width; + + if (ntb_link_is_up(ndev, &speed, &width)) { + dev_info(&ndev->dev, "Link is up (PCIe %d.x / x%d)\n", + (int)speed, (int)width); + schedule_delayed_work(&sc->link_work, 0); + } else { + dev_info(&ndev->dev, "Link is down\n"); + schedule_work(&sc->link_cleanup); + } +} + +static const struct ntb_ctx_ops ntb_pmem_ops = { + .link_event = ntb_pmem_link_event, +}; + +static ASYNC_DOMAIN(ntb_pmem_async_domain); + +static void ntb_pmem_wait(void *_data, async_cookie_t c) +{ + struct ntb_pmem *sc = _data; + struct device *dev = &sc->ndev->dev; + struct pmem_label *ll = sc->pmem->label; + long left; + int t = 50; + u32 state; + + while ((state = smp_load_acquire(&ll->state)) == STATE_IDLE || + state == STATE_WAITING) { + left = sc->wait_till - jiffies; + if (left <= 0) { + dev_notice(dev, "Gave up waiting for NTB peer.\n"); + return; + } + if (t-- <= 0) { + dev_info(dev, "Waiting for NTB peer to sync (%lds).\n", + left / HZ); + /* Reschedule to not block queue for too long. */ + async_schedule_domain(ntb_pmem_wait, sc, + &ntb_pmem_async_domain); + return; + } + msleep(100); + } +} + +static void ntb_pmem_attach(struct ntb_pmem *sc) +{ + struct ntb_dev *ndev = sc->ndev; + struct pmem_device *pmem = sc->pmem; + int error; + + pmem->rnode = dev_to_node(&ndev->dev); + + /* + * If the pmem was synchronized before, delay boot until the new + * synchronization complete or timeout expire. It should reduce + * the race when both peers are powered on same time and the first + * booted may try to access stale data before hearing from another. + */ + sc->wait_till = jiffies + start_timeout * HZ; + async_schedule_domain(ntb_pmem_wait, sc, &ntb_pmem_async_domain); + + /* Bring up the link. */ + error = ntb_set_ctx(ndev, sc, &ntb_pmem_ops); + if (error != 0) + dev_err(&ndev->dev, "ntb_set_ctx() error %d\n", error); + error = ntb_link_enable(ndev, NTB_SPEED_AUTO, NTB_WIDTH_AUTO); + if (error != 0) + dev_err(&ndev->dev, "ntb_link_enable() error %d\n", error); + ntb_link_event(ndev); +} + +static void ntb_pmem_detach(struct ntb_pmem *sc) +{ + struct ntb_dev *ndev = sc->ndev; + struct pmem_device *pmem = sc->pmem; + + ntb_link_disable(ndev); + ntb_clear_ctx(ndev); + cancel_work_sync(&sc->link_cleanup); + ntb_pmem_link_cleanup_work(&sc->link_cleanup); + + if (pmem->label->state >= STATE_IDLE) + pmem->label->state = STATE_READY; + async_synchronize_full_domain(&ntb_pmem_async_domain); +} + +void ntb_pmem_register(struct pmem_device *pmem) +{ + struct device *dev = pmem->bb.dev; + struct nd_region *nd_region = to_nd_region(dev->parent); + struct pmem_label *label; + int id = nd_region->id; + + /* + * Associate the pmem with ntb_pmem using its region id, which are + * hoped to be sequential and have only one namespace each, since + * we attach only to raw namespaces, not using standard labels. + */ + if (id < 0 || id >= MAX_PMEMS) + return; + + /* Reserve last page of NVDIMM for our custom label. */ + pmem->pfn_pad = PAGE_SIZE; + pmem->label = label = (struct pmem_label *)(pmem->virt_addr + + pmem->size - pmem->pfn_pad); + + if (label->sign != PMEM_SIGN_LONG) { + dev_notice(dev, "PMEM not labeled, new or data loss!\n"); + memset(label, 0, PAGE_SIZE); + label->sign = PMEM_SIGN_LONG; + get_random_bytes(&label->array, sizeof(label->array)); + label->empty = 1; + label->dirty = 0; + label->state = STATE_NONE; + } + label->opened = 0; + if (label->state > STATE_IDLE) + label->state = STATE_IDLE; + arch_wb_cache_pmem(label, sizeof(struct pmem_label)); + + mutex_lock(&links[id].lock); + links[id].pmem = pmem; + if (links[id].ntb) { + links[id].ntb->pmem = pmem; + ntb_pmem_attach(links[id].ntb); + } + mutex_unlock(&links[id].lock); +} +EXPORT_SYMBOL(ntb_pmem_register); + +void ntb_pmem_unregister(struct pmem_device *pmem) +{ + struct device *dev = pmem->bb.dev; + struct nd_region *nd_region = to_nd_region(dev->parent); + int id = nd_region->id; + + if (id < 0 || id >= MAX_PMEMS) + return; + + mutex_lock(&links[id].lock); + links[id].pmem = NULL; + if (links[id].ntb) { + ntb_pmem_detach(links[id].ntb); + links[id].ntb->pmem = NULL; + } + mutex_unlock(&links[id].lock); + + pmem->label = NULL; +} +EXPORT_SYMBOL(ntb_pmem_unregister); + +static int ntb_pmem_probe(struct ntb_client *client, struct ntb_dev *ndev) +{ + struct ntb_pmem *sc; + char *p; + int error, node; + int id; + + /* Make sure we have enough NTB resources. */ + if (ntb_peer_port_count(ndev) != 1) { + dev_err(&ndev->dev, "Multi-port NTB is not supported.\n"); + return -ENXIO; + } + if (ntb_mw_count(ndev, PIDX) < 1) { + dev_err(&ndev->dev, "At least 1 memory window required.\n"); + return -ENXIO; + } + if (ntb_spad_count(ndev) < 4) { + dev_err(&ndev->dev, "At least 4 scratchpads required.\n"); + return -ENXIO; + } + + /* + * Associate the ntb_pmem with pmem based on its position in ntb_split. + * It limits potential NTB configurations, but it is OK for now. + */ + id = 0; + p = strrchr(dev_name(&ndev->dev), '-'); + if (p && p[1] >= '0' && p[1] <= '9') + id = p[1] - '0'; + if (id < 0 || id >= MAX_PMEMS) { + dev_err(&ndev->dev, "Can't get ID (%d).\n", id); + return -ENXIO; + } + + node = dev_to_node(&ndev->dev); + sc = kzalloc_node(sizeof(*sc), GFP_KERNEL, node); + if (!sc) + return -ENOMEM; + sc->ndev = ndev; + sc->id = id; + + error = ntb_peer_mw_get_addr(ndev, 0, &sc->ntb_paddr, &sc->ntb_size); + if (error != 0) { + dev_err(&ndev->dev, "ntb_peer_mw_get_addr() error %d\n", error); + kfree(sc); + return -ENXIO; + } + sc->ntb_vaddr = devm_memremap(&ndev->dev, sc->ntb_paddr, sc->ntb_size, + MEMREMAP_WC); + if (!sc->ntb_vaddr) { + dev_err(&ndev->dev, "devm_memremap() error\n"); + kfree(sc); + return -ENOMEM; + } + + INIT_DELAYED_WORK(&sc->link_work, ntb_pmem_link_work); + INIT_WORK(&sc->link_cleanup, ntb_pmem_link_cleanup_work); + + mutex_lock(&links[id].lock); + links[id].ntb = sc; + sc->pmem = links[id].pmem; + if (sc->pmem) + ntb_pmem_attach(sc); + mutex_unlock(&links[id].lock); + + return 0; +} + +static void ntb_pmem_remove(struct ntb_client *client, struct ntb_dev *ndev) +{ + struct ntb_pmem *sc = ndev->ctx; + int id = sc->id; + + mutex_lock(&links[id].lock); + links[id].ntb = NULL; + if (sc->pmem) + ntb_pmem_detach(sc); + mutex_unlock(&links[id].lock); + kfree(sc); +} + +static struct ntb_client ntb_pmem_client = { + .ops = { + .probe = ntb_pmem_probe, + .remove = ntb_pmem_remove, + }, +}; + +static int __init ntb_pmem_init(void) +{ + int i; + + pr_info("%s, version %s\n", NTB_PMEM_DESC, NTB_PMEM_VER); + for (i = 0; i < MAX_PMEMS; i++) + mutex_init(&links[i].lock); + return ntb_register_client(&ntb_pmem_client); +} +module_init(ntb_pmem_init); + +static void __exit ntb_pmem_exit(void) +{ + int i; + + ntb_unregister_client(&ntb_pmem_client); + for (i = 0; i < MAX_PMEMS; i++) + mutex_destroy(&links[i].lock); +} +module_exit(ntb_pmem_exit); diff --git a/drivers/nvdimm/pmem.c b/drivers/nvdimm/pmem.c index 210fb77f51ba..28e302f43cf5 100644 --- a/drivers/nvdimm/pmem.c +++ b/drivers/nvdimm/pmem.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include #include #include #include @@ -32,6 +34,24 @@ #include "pfn.h" #include "nd.h" +static unsigned int min_dma_size = 24 * 1024; +module_param(min_dma_size, uint, 0644); +MODULE_PARM_DESC(min_dma_size, "Minimal I/O size to use DMA"); + +struct pmem_dma_tr { + struct pmem_device *pmem; + struct bio *bio; + struct device *dma_dev1; /* DMA for local PMEM */ + struct device *dma_dev2; /* DMA for remote PMEM */ + bool single; /* No remote PMEM access */ + bool do_acct; /* Accounting needed */ + unsigned long start; /* Acoounting start time */ + refcount_t inprog; /* Number of active DMAs */ + dma_addr_t laddr; /* Local PMEM DMA address */ + dma_addr_t raddr; /* Remove PMEM DMA address */ + dma_addr_t addr[]; /* BIO DMA addresses */ +}; + static struct device *to_dev(struct pmem_device *pmem) { /* @@ -46,6 +66,379 @@ static struct nd_region *to_region(struct pmem_device *pmem) return to_nd_region(to_dev(pmem)->parent); } +static bool pmem_dma_feq(struct dma_chan *chan, void *data) +{ + return dev_to_node(chan->device->dev) == (long)data; +} + +static bool pmem_dma_fne(struct dma_chan *chan, void *data) +{ + return dev_to_node(chan->device->dev) != (long)data; +} + +static void pmem_dma_init(struct pmem_device *pmem) +{ + struct device *dev = to_dev(pmem); + dma_cap_mask_t dma_mask; + + dma_cap_zero(dma_mask); + dma_cap_set(DMA_MEMCPY, dma_mask); + + /* + * Prefer to allocate NUMA-local DMA channel for remote PMEM writes. + * Remote writes are slower than local and need all boost we can give. + */ + pmem->rdma_chan = dma_request_channel(dma_mask, pmem_dma_feq, + (void *)(long)pmem->rnode); + if (!pmem->rdma_chan) + pmem->rdma_chan = dma_request_channel(dma_mask, NULL, NULL); + if (!pmem->rdma_chan) { + dev_info(dev, "Unable to allocate DMA channel\n"); + return; + } + + /* + * If local PMEM is in different NUMA-node, try to allocate DMA there. + * If it is in the same NUMA-node, then DMA allocation from some other + * allows to avoid DMA engine bottleneck and shows better throughput. + */ + if (pmem->node != dev_to_node(pmem->rdma_chan->device->dev)) { + pmem->dma_chan = dma_request_channel(dma_mask, pmem_dma_feq, + (void *)(long)pmem->node); + } else { + pmem->dma_chan = dma_request_channel(dma_mask, pmem_dma_fne, + (void *)(long)dev_to_node(pmem->rdma_chan->device->dev)); + } + if (!pmem->dma_chan) + pmem->dma_chan = dma_request_channel(dma_mask, NULL, NULL); + if (!pmem->dma_chan) + pmem->dma_chan = pmem->rdma_chan; + + /* + * After all the dances above, we may use remote PMEM DMA channel for + * single destination copies if it is closer to the local PMEM. + */ + pmem->rdma_for_single = + dev_to_node(pmem->dma_chan->device->dev) != pmem->node && + dev_to_node(pmem->rdma_chan->device->dev) == pmem->node; +} + +static void pmem_dma_shutdown(struct pmem_device *pmem) +{ + if (pmem->dma_chan == NULL) + return; + dma_release_channel(pmem->dma_chan); + if (pmem->dma_chan != pmem->rdma_chan) + dma_release_channel(pmem->rdma_chan); + pmem->dma_chan = pmem->rdma_chan = NULL; +} + +static void pmem_dma_unmap(struct pmem_dma_tr *tr) +{ + struct bio_vec bvec; + struct bvec_iter iter; + enum dma_data_direction dir; + unsigned int size = tr->bio->bi_iter.bi_size; + int i = 0; + + /* Unmap local PMEM. */ + dir = op_is_write(bio_op(tr->bio)) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; + if (dma_mapping_error(tr->dma_dev1, tr->laddr)) + goto done; + dma_unmap_resource(tr->dma_dev1, tr->laddr, size, dir, 0); + + if (!tr->single) { + /* Unmap remote PMEM. */ + if (dma_mapping_error(tr->dma_dev2, tr->raddr)) + goto done; + dma_unmap_resource(tr->dma_dev2, tr->raddr, size, dir, 0); + } + + /* Unmap BIO data. */ + dir = op_is_write(bio_op(tr->bio)) ? DMA_TO_DEVICE : DMA_FROM_DEVICE; + bio_for_each_bvec(bvec, tr->bio, iter) { + if (dma_mapping_error(tr->dma_dev1, tr->addr[i])) + break; + dma_unmap_page(tr->dma_dev1, tr->addr[i], bvec.bv_len, dir); + i++; + if (tr->single) + continue; + if (dma_mapping_error(tr->dma_dev2, tr->addr[i])) + break; + dma_unmap_page(tr->dma_dev2, tr->addr[i], bvec.bv_len, dir); + i++; + } +done: + kfree(tr); +} + +static void pmem_dma_callback(void *data, const struct dmaengine_result *result) +{ + struct pmem_dma_tr *tr = data; + struct bio *bio = tr->bio; + struct device *dev = to_dev(tr->pmem); + + if (result->result != DMA_TRANS_NOERROR) { + dev_err(dev, "DMA error %x\n", result->result); + if (result->result == DMA_TRANS_ABORTED) + bio->bi_status = BLK_STS_TRANSPORT; + else + bio->bi_status = BLK_STS_IOERR; + } + if (refcount_dec_and_test(&tr->inprog)) { + if (tr->do_acct) + bio_end_io_acct(bio, tr->start); + pmem_dma_unmap(tr); + bio_endio(bio); + } +} + +static bool pmem_dma_submit_bio(struct pmem_device *pmem, struct bio *bio, + bool do_acct, unsigned long start) +{ + struct device *dev = to_dev(pmem); + struct dma_chan *dma_chan1, *dma_chan2; + struct dma_device *dma_dev1, *dma_dev2; + struct dma_async_tx_descriptor *tx; + dma_async_tx_callback_result cb; + enum dma_data_direction dir; + dma_cookie_t cookie, last_cookie1 = 0, last_cookie2 = 0; + struct pmem_dma_tr *tr; + phys_addr_t laddr, raddr; + struct bio_vec bvec; + struct bvec_iter iter; + unsigned long flags; + unsigned int dmas, i, vecs = 0; + sector_t sector; + static struct dmaengine_result dummy_result = { + .result = DMA_TRANS_ABORTED, + .residue = 0 + }; + + /* For small I/Os softwate copy is faster. */ + if (bio->bi_iter.bi_size < min_dma_size) + return false; + + /* Choose DMA channels for local and remote PMEM accesses. */ + laddr = pmem->phys_addr + pmem->data_offset; + raddr = op_is_write(bio_op(bio)) ? pmem->rphys_addr : 0; + if (raddr) + raddr += pmem->data_offset; + if (!raddr && pmem->rdma_for_single) { + dma_chan1 = pmem->rdma_chan; + dma_chan2 = pmem->dma_chan; + } else { + dma_chan1 = pmem->dma_chan; + dma_chan2 = pmem->rdma_chan; + } + if (dma_chan1 == NULL || dma_chan2 == NULL) + return false; + + /* Check the addresses alignment fit DMA device(s) requirements. */ + dma_dev1 = dma_chan1->device; + dma_dev2 = dma_chan2->device; + bio_for_each_bvec(bvec, bio, iter) { + if (!is_dma_copy_aligned(dma_dev1, bvec.bv_offset, + laddr + iter.bi_sector * 512, bvec.bv_len)) + return false; + if (raddr && + !is_dma_copy_aligned(dma_dev2, bvec.bv_offset, + raddr + iter.bi_sector * 512, bvec.bv_len)) + return false; + vecs++; + } + + /* Collect information needed to complete BIO on DMA completion. */ + dmas = raddr ? 2 : 1; + tr = kmalloc(offsetof(struct pmem_dma_tr, addr[vecs * dmas]), + GFP_NOWAIT | __GFP_ZERO); + if (!tr) { + dev_warn(dev, "kmalloc() failed\n"); + return false; + } + tr->pmem = pmem; + tr->bio = bio; + tr->single = !raddr; + tr->dma_dev1 = dma_dev1->dev; + tr->dma_dev2 = dma_dev2->dev; + refcount_set(&tr->inprog, dmas); + tr->do_acct = do_acct; + tr->start = start; + + /* Map local PMEM for the first DMA device. */ + sector = bio->bi_iter.bi_sector; + dir = op_is_write(bio_op(bio)) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; + tr->laddr = dma_map_resource(dma_dev1->dev, + laddr + sector * 512, bio->bi_iter.bi_size, dir, 0); + if (dma_mapping_error(dma_dev1->dev, tr->laddr)) { + dev_warn(dev, "dma_map_page() 1 failed\n"); + pmem_dma_unmap(tr); + return false; + } + + if (raddr) { + /* Map remote PMEM for the second DMA device. */ + tr->raddr = dma_map_resource(dma_dev2->dev, + raddr + sector * 512, bio->bi_iter.bi_size, dir, 0); + if (dma_mapping_error(dma_dev2->dev, tr->raddr)) { + dev_warn(dev, "dma_map_page() 2 failed\n"); + pmem_dma_unmap(tr); + return false; + } + } + + /* Map BIO data for the DMA device(s). */ + i = 0; + dir = op_is_write(bio_op(bio)) ? DMA_TO_DEVICE : DMA_FROM_DEVICE; + bio_for_each_bvec(bvec, bio, iter) { + tr->addr[i] = dma_map_page(dma_dev1->dev, bvec.bv_page, + bvec.bv_offset, bvec.bv_len, dir); + if (dma_mapping_error(dma_dev1->dev, tr->addr[i])) { + dev_warn(dev, "dma_map_page() 3 failed\n"); + pmem_dma_unmap(tr); + return false; + } + i++; + if (!raddr) + continue; + tr->addr[i] = dma_map_page(dma_dev2->dev, bvec.bv_page, + bvec.bv_offset, bvec.bv_len, dir); + if (dma_mapping_error(dma_dev2->dev, tr->addr[i])) { + dev_warn(dev, "dma_map_page() 4 failed\n"); + pmem_dma_unmap(tr); + return false; + } + i++; + } + + /* Issue the local PMEM I/O. */ + i = 0; + flags = DMA_CTRL_ACK; + cb = NULL; + bio_for_each_bvec(bvec, bio, iter) { + if (iter.bi_size == bvec.bv_len) { + flags |= DMA_PREP_INTERRUPT; + cb = pmem_dma_callback; + } + if (op_is_write(bio_op(bio))) { + tx = dmaengine_prep_dma_memcpy(dma_chan1, + tr->laddr + (iter.bi_sector - sector) * 512, + tr->addr[i], bvec.bv_len, flags); + } else { + tx = dmaengine_prep_dma_memcpy(dma_chan1, tr->addr[i], + tr->laddr + (iter.bi_sector - sector) * 512, + bvec.bv_len, flags); + } + if (!tx) { + dev_warn(dev, "dmaengine_prep_dma_memcpy() 1 failed\n"); + goto error; + } + tx->callback_result = cb; + tx->callback_param = tr; + cookie = dmaengine_submit(tx); + if (dma_submit_error(cookie)) { + dev_warn(dev, "dmaengine_submit() 1 failed\n"); + goto error; + } + last_cookie1 = cookie; + i += dmas; + } + dma_async_issue_pending(dma_chan1); + + if (!raddr) + return true; + + /* Issue the remote PMEM I/O. */ + i = 1; + flags = DMA_CTRL_ACK; + cb = NULL; + bio_for_each_bvec(bvec, bio, iter) { + if (iter.bi_size == bvec.bv_len) { + flags |= DMA_PREP_INTERRUPT; + cb = pmem_dma_callback; + } + tx = dmaengine_prep_dma_memcpy(dma_chan2, + tr->raddr + (iter.bi_sector - sector) * 512, + tr->addr[i], bvec.bv_len, flags); + if (!tx) { + dev_warn(dev, "dmaengine_prep_dma_memcpy() 2 failed\n"); + goto error2; + } + tx->callback_result = cb; + tx->callback_param = tr; + cookie = dmaengine_submit(tx); + if (dma_submit_error(cookie)) { + dev_warn(dev, "dmaengine_submit() 2 failed\n"); + goto error2; + } + last_cookie2 = cookie; + i += 2; + } + dma_async_issue_pending(dma_chan2); + return true; + +error: + /* + * Some error has happened during the local PMEM I/O issue. + * Since none of issued transactions had callback, just wait for + * them to complete, free memory and fall back to software copy. + */ + if (last_cookie1) { + dma_async_issue_pending(dma_chan1); + dma_sync_wait(dma_chan1, last_cookie1); + } + pmem_dma_unmap(tr); + return false; + +error2: + /* + * Some error has happened during the remote PMEM I/O issue. + * The local PMEM I/O is already running and we can't stop it. + * Since none of issued remote transactions had callback, wait for + * them to complete and return I/O error when local I/O completes. + */ + if (last_cookie2) { + dma_async_issue_pending(dma_chan2); + dma_sync_wait(dma_chan2, last_cookie2); + } + pmem_dma_callback(tr, &dummy_result); + return true; +} + +static int pmem_open(struct gendisk *disk, blk_mode_t mode) +{ + struct pmem_device *pmem = disk->private_data; + struct pmem_label *label = pmem->label; + + ++pmem->opened_all; + + if ((pmem->opened++) == 0) + pmem_dma_init(pmem); + if (mode & BLK_OPEN_WRITE) + pmem->opened_for_write = true; + + if (label && pmem->opened_for_write) + label->opened = pmem->opened_all; + + return 0; +} + +static void pmem_release(struct gendisk *disk) +{ + struct pmem_device *pmem = disk->private_data; + struct pmem_label *label = pmem->label; + + --pmem->opened_all; + + if ((--pmem->opened) == 0) + pmem_dma_shutdown(pmem); + if (label && pmem->opened_for_write) + label->opened = pmem->opened_all; + + if (pmem->opened_all == 0) + pmem->opened_for_write = false; +} + static phys_addr_t pmem_to_phys(struct pmem_device *pmem, phys_addr_t offset) { return pmem->phys_addr + offset; @@ -125,40 +518,38 @@ static blk_status_t pmem_clear_poison(struct pmem_device *pmem, static void write_pmem(void *pmem_addr, struct page *page, unsigned int off, unsigned int len) { - unsigned int chunk; void *mem; - while (len) { - mem = kmap_atomic(page); - chunk = min_t(unsigned int, len, PAGE_SIZE - off); - memcpy_flushcache(pmem_addr, mem + off, chunk); - kunmap_atomic(mem); - len -= chunk; - off = 0; - page++; - pmem_addr += chunk; - } + BUG_ON(off + len > PAGE_SIZE); + mem = kmap_local_page(page); + memcpy_flushcache(pmem_addr, mem + off, len); + kunmap_local(mem); +} + +static void write_pmem2(void *pmem_addr, void *pmem_addr2, struct page *page, + unsigned int off, unsigned int len) +{ + void *mem; + + BUG_ON(off + len > PAGE_SIZE); + mem = kmap_local_page(page); + memcpy_flushcache(pmem_addr, mem + off, len); + memcpy(pmem_addr2, mem + off, len); + kunmap_local(mem); } static blk_status_t read_pmem(struct page *page, unsigned int off, void *pmem_addr, unsigned int len) { - unsigned int chunk; unsigned long rem; void *mem; - while (len) { - mem = kmap_atomic(page); - chunk = min_t(unsigned int, len, PAGE_SIZE - off); - rem = copy_mc_to_kernel(mem + off, pmem_addr, chunk); - kunmap_atomic(mem); - if (rem) - return BLK_STS_IOERR; - len -= chunk; - off = 0; - page++; - pmem_addr += chunk; - } + BUG_ON(off + len > PAGE_SIZE); + mem = kmap_local_page(page); + rem = copy_mc_to_kernel(mem + off, pmem_addr, len); + kunmap_local(mem); + if (rem) + return BLK_STS_IOERR; return BLK_STS_OK; } @@ -184,6 +575,7 @@ static blk_status_t pmem_do_write(struct pmem_device *pmem, { phys_addr_t pmem_off = to_offset(pmem, sector); void *pmem_addr = pmem->virt_addr + pmem_off; + void *rpmem_addr = pmem->rvirt_addr; if (unlikely(is_bad_pmem(&pmem->bb, sector, len))) { blk_status_t rc = pmem_clear_poison(pmem, pmem_off, len); @@ -193,7 +585,11 @@ static blk_status_t pmem_do_write(struct pmem_device *pmem, } flush_dcache_page(page); - write_pmem(pmem_addr, page, page_off, len); + if (rpmem_addr) { + write_pmem2(pmem_addr, rpmem_addr + pmem_off, page, page_off, + len); + } else + write_pmem(pmem_addr, page, page_off, len); return BLK_STS_OK; } @@ -208,6 +604,8 @@ static void pmem_submit_bio(struct bio *bio) struct bvec_iter iter; struct pmem_device *pmem = bio->bi_bdev->bd_disk->private_data; struct nd_region *nd_region = to_region(pmem); + struct pmem_label *label = pmem->label; + struct pmem_label *rlabel = pmem->rlabel; if (bio->bi_opf & REQ_PREFLUSH) ret = nvdimm_flush(nd_region, bio); @@ -215,6 +613,19 @@ static void pmem_submit_bio(struct bio *bio) do_acct = blk_queue_io_stat(bio->bi_bdev->bd_disk->queue); if (do_acct) start = bio_start_io_acct(bio); + if (op_is_write(bio_op(bio)) && label) { + if (unlikely(label->empty)) { + label->empty = 0; + if (rlabel) + rlabel->empty = 0; + } + if (!rlabel && unlikely(!label->dirty)) { + label->dirty = 1; + arch_wb_cache_pmem(label, sizeof(struct pmem_label)); + } + } + if (pmem_dma_submit_bio(pmem, bio, do_acct, start)) + return; bio_for_each_segment(bvec, bio, iter) { if (op_is_write(bio_op(bio))) rc = pmem_do_write(pmem, bvec.bv_page, bvec.bv_offset, @@ -288,6 +699,8 @@ __weak long __pmem_direct_access(struct pmem_device *pmem, pgoff_t pgoff, static const struct block_device_operations pmem_fops = { .owner = THIS_MODULE, + .open = pmem_open, + .release = pmem_release, .submit_bio = pmem_submit_bio, }; @@ -371,6 +784,53 @@ static const struct dax_operations pmem_dax_ops = { .recovery_write = pmem_recovery_write, }; +static ssize_t label_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct pmem_device *pmem = dev_to_disk(dev)->private_data; + struct pmem_label *label = pmem->label; + + if (label) { + memcpy(buf, label, sizeof(*label)); + return sizeof(*label); + } + return -ENXIO; +} +static DEVICE_ATTR_RO(label); + +static ssize_t uuid_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct pmem_device *pmem = dev_to_disk(dev)->private_data; + struct pmem_label *label = pmem->label; + + if (label) + return sprintf(buf, "%016llX\n", label->array); + return -ENXIO; +} +static DEVICE_ATTR_RO(uuid); + +static struct attribute *label_attributes[] = { + &dev_attr_label.attr, + &dev_attr_uuid.attr, + NULL, +}; + +static umode_t label_visible(struct kobject *kobj, struct attribute *a, int n) +{ + struct device *dev = container_of(kobj, typeof(*dev), kobj); + struct pmem_device *pmem = dev_to_disk(dev)->private_data; + + if (!pmem->label) + return 0; + return a->mode; +} + +static const struct attribute_group label_attribute_group = { + .attrs = label_attributes, + .is_visible = label_visible, +}; + static ssize_t write_cache_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -415,6 +875,7 @@ static const struct attribute_group dax_attribute_group = { }; static const struct attribute_group *pmem_attribute_groups[] = { + &label_attribute_group, &dax_attribute_group, NULL, }; @@ -546,9 +1007,20 @@ static int pmem_attach_disk(struct device *dev, goto out; } pmem->virt_addr = addr; + pmem->rnode = pmem->node = dev_to_node(dev); + + /* Register raw pmems for NTB mirroring. */ + if (!is_nd_pfn(dev) && !is_nd_dax(dev) && + uuid_is_null((const uuid_t *)nd_dev_to_uuid(&ndns->dev))) { + pmem->bb.dev = dev; + ntb_pmem_register(pmem); + } + disk->fops = &pmem_fops; disk->private_data = pmem; + disk->events = DISK_EVENT_MEDIA_CHANGE; + disk->event_flags = DISK_EVENT_FLAG_UEVENT; nvdimm_namespace_disk_name(ndns, disk->disk_name); set_capacity(disk, (pmem->size - pmem->pfn_pad - pmem->data_offset) / 512); @@ -656,6 +1128,10 @@ static void nd_pmem_remove(struct device *dev) if (is_nd_btt(dev)) nvdimm_namespace_detach_btt(to_nd_btt(dev)); else { + /* Unregister from NTB mirroring. */ + if (pmem->label) + ntb_pmem_unregister(pmem); + /* * Note, this assumes device_lock() context to not * race nd_pmem_notify() diff --git a/drivers/nvdimm/pmem.h b/drivers/nvdimm/pmem.h index 392b0b38acb9..a0c997c514f8 100644 --- a/drivers/nvdimm/pmem.h +++ b/drivers/nvdimm/pmem.h @@ -7,6 +7,28 @@ #include #include #include +#include + +#define PMEM_SIGN_SHORT 0x4e564430 +#define PMEM_SIGN_LONG 0x4e5644494d4d3030 + +enum { + STATE_INCORRECT = 0, + STATE_NONE, + STATE_IDLE, + STATE_WAITING, + STATE_READY, +}; + +/* PMEM label */ +struct pmem_label { + u64 sign; /* PMEM_SIGN_LONG signature */ + u64 array; /* Unique array ID */ + u32 empty; /* PMEM is empty and was never written */ + u32 dirty; /* PMEM was written without NTB connection */ + u32 opened; /* PMEM device is open now */ + u32 state; /* Synchronization state */ +}; enum dax_access_mode; @@ -27,6 +49,19 @@ struct pmem_device { struct dax_device *dax_dev; struct gendisk *disk; struct dev_pagemap pgmap; + + struct pmem_label *label; /* Local PMEM label */ + phys_addr_t rphys_addr; /* Remote PMEM phys address */ + uint8_t *rvirt_addr; /* Remote PMEM KVA address */ + struct pmem_label *rlabel; /* Remote PMEM label */ + int node; /* Local PMEM NUMA node */ + int rnode; /* Remote PMEM (NTB) node */ + bool opened_for_write; /* Device was opened with BLK_OPEN_WRITE */ + int opened_all; /* Track all device opens */ + int opened; /* Number of device opens */ + bool rdma_for_single; /* Prefer remote DMA */ + struct dma_chan *dma_chan; /* Local PMEM DMA channel */ + struct dma_chan *rdma_chan; /* Remote PMEM DMA channel */ }; long __pmem_direct_access(struct pmem_device *pmem, pgoff_t pgoff, @@ -44,4 +79,7 @@ static inline bool test_and_clear_pmem_poison(struct page *page) return false; } #endif + +void ntb_pmem_register(struct pmem_device *pdev); +void ntb_pmem_unregister(struct pmem_device *pdev); #endif /* __NVDIMM_PMEM_H__ */ diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c index 855b42c92284..f8f702819fec 100644 --- a/drivers/nvme/host/core.c +++ b/drivers/nvme/host/core.c @@ -2926,8 +2926,21 @@ static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) return NULL; list_for_each_entry(subsys, &nvme_subsystems, entry) { + bool valid_ctrl = false; + struct nvme_ctrl *ctrl; + if (strcmp(subsys->subnqn, subsysnqn)) continue; + if (list_empty(&subsys->ctrls)) + continue; + list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { + if (!nvme_state_terminal(ctrl)) { + valid_ctrl = true; + break; + } + } + if (!valid_ctrl) + continue; if (!kref_get_unless_zero(&subsys->ref)) continue; return subsys; @@ -3131,8 +3144,10 @@ static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) else ctrl->max_zeroes_sectors = 0; + /* NVME_ID_CNS_CS_CTRL is supported from v2.0.0 onwards. */ if (ctrl->subsys->subtype != NVME_NQN_NVME || !nvme_id_cns_ok(ctrl, NVME_ID_CNS_CS_CTRL) || + ctrl->vs < NVME_VS(2, 0, 0) || test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) return 0; diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 736ad8baa2a5..9531dd45c92e 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -312,7 +312,8 @@ int pciehp_check_link_status(struct controller *ctrl) pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); - if ((lnk_status & PCI_EXP_LNKSTA_LT) || + if (((lnk_status & PCI_EXP_LNKSTA_LT) && + !(lnk_status & PCI_EXP_LNKSTA_DLLLA)) || !(lnk_status & PCI_EXP_LNKSTA_NLW)) { ctrl_info(ctrl, "Slot(%s): Cannot train link: status %#06x\n", slot_name(ctrl), lnk_status); diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index dccb60c1d9cc..de06193343f6 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5015,6 +5015,107 @@ static int pci_quirk_wangxun_nic_acs(struct pci_dev *dev, u16 acs_flags) return false; } +static bool acs_on_downstream; +static bool acs_on_multifunction; + +#define NUM_ACS_IDS 16 +struct acs_on_id { + unsigned short vendor; + unsigned short device; +}; +static struct acs_on_id acs_on_ids[NUM_ACS_IDS]; +static u8 max_acs_id; + +static __init int pcie_acs_override_setup(char *p) +{ + if (!p) + return -EINVAL; + + while (*p) { + if (!strncmp(p, "downstream", 10)) + acs_on_downstream = true; + if (!strncmp(p, "multifunction", 13)) + acs_on_multifunction = true; + if (!strncmp(p, "id:", 3)) { + char opt[5]; + int ret; + long val; + + if (max_acs_id >= NUM_ACS_IDS - 1) { + pr_warn("Out of PCIe ACS override slots (%d)\n", + NUM_ACS_IDS); + goto next; + } + + p += 3; + snprintf(opt, 5, "%s", p); + ret = kstrtol(opt, 16, &val); + if (ret) { + pr_warn("PCIe ACS ID parse error %d\n", ret); + goto next; + } + acs_on_ids[max_acs_id].vendor = val; + p += strcspn(p, ":"); + if (*p != ':') { + pr_warn("PCIe ACS invalid ID\n"); + goto next; + } + + p++; + snprintf(opt, 5, "%s", p); + ret = kstrtol(opt, 16, &val); + if (ret) { + pr_warn("PCIe ACS ID parse error %d\n", ret); + goto next; + } + acs_on_ids[max_acs_id].device = val; + max_acs_id++; + } +next: + p += strcspn(p, ","); + if (*p == ',') + p++; + } + + if (acs_on_downstream || acs_on_multifunction || max_acs_id) + pr_warn("Warning: PCIe ACS overrides enabled; This may allow non-IOMMU protected peer-to-peer DMA\n"); + + return 0; +} +early_param("pcie_acs_override", pcie_acs_override_setup); + +static int pcie_acs_overrides(struct pci_dev *dev, u16 acs_flags) +{ + int i; + + /* Never override ACS for legacy devices or devices with ACS caps */ + if (!pci_is_pcie(dev) || + pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS)) + return -ENOTTY; + + for (i = 0; i < max_acs_id; i++) { + if (acs_on_ids[i].vendor == dev->vendor && + acs_on_ids[i].device == dev->device) + return 1; + } + + switch (pci_pcie_type(dev)) { + case PCI_EXP_TYPE_DOWNSTREAM: + case PCI_EXP_TYPE_ROOT_PORT: + if (acs_on_downstream) + return 1; + break; + case PCI_EXP_TYPE_ENDPOINT: + case PCI_EXP_TYPE_UPSTREAM: + case PCI_EXP_TYPE_LEG_END: + case PCI_EXP_TYPE_RC_END: + if (acs_on_multifunction && dev->multifunction) + return 1; + } + + return -ENOTTY; +} + static const struct pci_dev_acs_enabled { u16 vendor; u16 device; @@ -5168,6 +5269,8 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs }, /* Wangxun nics */ { PCI_VENDOR_ID_WANGXUN, PCI_ANY_ID, pci_quirk_wangxun_nic_acs }, + /* allow acs for any */ + { PCI_ANY_ID, PCI_ANY_ID, pcie_acs_overrides }, { 0 } }; diff --git a/drivers/scsi/iscsi_tcp.c b/drivers/scsi/iscsi_tcp.c index c708e1059638..57fe8f8e6f11 100644 --- a/drivers/scsi/iscsi_tcp.c +++ b/drivers/scsi/iscsi_tcp.c @@ -63,6 +63,13 @@ module_param_named(debug_iscsi_tcp, iscsi_sw_tcp_dbg, int, MODULE_PARM_DESC(debug_iscsi_tcp, "Turn on debugging for iscsi_tcp module " "Set to 1 to turn on, and zero to turn off. Default is off."); +#ifdef CONFIG_TRUENAS +static char *iscsi_genhd_hidden_ips; +module_param_named(genhd_hidden_ips, iscsi_genhd_hidden_ips, charp, 0644); +MODULE_PARM_DESC(genhd_hidden_ips, "Comma separated list of IP addresses from " + "which logged in targets should be hidden."); +#endif + #define ISCSI_SW_TCP_DBG(_conn, dbg_fmt, arg...) \ do { \ if (iscsi_sw_tcp_dbg) \ @@ -1064,6 +1071,31 @@ static int iscsi_sw_tcp_device_configure(struct scsi_device *sdev, struct iscsi_session *session = tcp_sw_host->session; struct iscsi_conn *conn = session->leadconn; +#ifdef CONFIG_TRUENAS + if (conn && conn->persistent_address && iscsi_genhd_hidden_ips) { + char *str; + + str = kstrdup(iscsi_genhd_hidden_ips, GFP_KERNEL); + if (str) { + char *tok, *sep=str; + + while ((tok = strsep(&sep, ",")) != NULL) { + + /* Be tolerant of leading/trailing whitespace */ + tok = strim(tok); + if (strcmp(conn->persistent_address, tok) == 0) { + sdev->genhd_hidden = 1; + break; + } + } + kfree(str); + } else { + iscsi_conn_printk(KERN_ERR, conn, + "Memory allocation failed; could not check genhd_hidden\n"); + } + } +#endif + if (conn->datadgst_en) lim->features |= BLK_FEAT_STABLE_WRITES; return 0; diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/scsi/mpt3sas/mpt3sas_base.h index eceb5eeb4651..46e54c325d7b 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.h +++ b/drivers/scsi/mpt3sas/mpt3sas_base.h @@ -68,6 +68,8 @@ #include #include #include +#include +#include #include "mpt3sas_debug.h" #include "mpt3sas_trigger_diag.h" @@ -625,6 +627,7 @@ static inline void sas_device_put(struct _sas_device *s) struct _pcie_device { struct list_head list; struct scsi_target *starget; + struct nvme_effects_log *nvme_elog; u64 wwid; u16 handle; u32 device_info; @@ -1844,6 +1847,9 @@ mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth); struct _sas_device * __mpt3sas_get_sdev_by_rphy(struct MPT3SAS_ADAPTER *ioc, struct sas_rphy *rphy); +struct _pcie_device * +__mpt3sas_get_pdev_from_target(struct MPT3SAS_ADAPTER *ioc, + struct MPT3SAS_TARGET *tgt_priv); struct virtual_phy * mpt3sas_get_vphy_by_phy(struct MPT3SAS_ADAPTER *ioc, struct hba_port *port, u32 phy); @@ -2051,6 +2057,14 @@ void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_init_debugfs(void); void mpt3sas_exit_debugfs(void); +/* NVME Encapsulation */ +int mpt3_nvme_user_cmd(struct scsi_device *sdev, + struct nvme_passthru_cmd __user *ucmd, int is_admin); +int mpt3_nvme_user_cmd64(struct scsi_device *sdev, + struct nvme_passthru_cmd64 __user *ucmd, int is_admin); +int mpt3_nvme_get_effect_log(struct MPT3SAS_ADAPTER *ioc, + struct _pcie_device *pcie_device, struct nvme_effects_log *nvme_elog); + /** * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device * @device_info: bitfield providing information about the device. diff --git a/drivers/scsi/mpt3sas/mpt3sas_ctl.c b/drivers/scsi/mpt3sas/mpt3sas_ctl.c index 87784c96249a..3f3ba7f10118 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_ctl.c +++ b/drivers/scsi/mpt3sas/mpt3sas_ctl.c @@ -660,7 +660,7 @@ _ctl_set_task_mid(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command *karg, */ static long _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg, - void __user *mf) + void __user *mf, struct mpt3_nvme_kencap *kencap) { MPI2RequestHeader_t *mpi_request = NULL, *request; MPI2DefaultReply_t *mpi_reply; @@ -707,8 +707,11 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg, goto out; } - /* copy in request message frame from user */ - if (copy_from_user(mpi_request, mf, karg.data_sge_offset*4)) { + /* copy in request message frame */ + if (kencap) { + memcpy(mpi_request, kencap->nvme_encap_rqst, + karg.data_sge_offset*4); + } else if (copy_from_user(mpi_request, mf, karg.data_sge_offset*4)) { pr_err("failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); ret = -EFAULT; @@ -763,7 +766,9 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg, mpt3sas_base_free_smid(ioc, smid); goto out; } - if (copy_from_user(data_out, karg.data_out_buf_ptr, + if (kencap && kencap->dout_buf) { + memcpy(data_out, kencap->dout_buf, data_out_sz); + } else if (copy_from_user(data_out, karg.data_out_buf_ptr, data_out_sz)) { pr_err("failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); @@ -1062,7 +1067,9 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg, /* copy out xdata to user */ if (data_in_sz) { - if (copy_to_user(karg.data_in_buf_ptr, data_in, + if (kencap && kencap->din_buf) { + memcpy(kencap->din_buf, data_in, data_in_sz); + } else if (copy_to_user(karg.data_in_buf_ptr, data_in, data_in_sz)) { pr_err("failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); @@ -1074,7 +1081,9 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg, /* copy out reply message frame to user */ if (karg.max_reply_bytes) { sz = min_t(u32, karg.max_reply_bytes, ioc->reply_sz); - if (copy_to_user(karg.reply_frame_buf_ptr, ioc->ctl_cmds.reply, + if (kencap) { + memcpy(kencap->reply_buf, ioc->ctl_cmds.reply, sz); + } else if (copy_to_user(karg.reply_frame_buf_ptr, ioc->ctl_cmds.reply, sz)) { pr_err("failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); @@ -1088,7 +1097,7 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg, MPI2_FUNCTION_SCSI_IO_REQUEST || mpi_request->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || mpi_request->Function == MPI2_FUNCTION_NVME_ENCAPSULATED)) { - if (karg.sense_data_ptr == NULL) { + if (!karg.sense_data_ptr && kencap && !kencap->sense_buf) { ioc_info(ioc, "Response buffer provided by application is NULL; Response data will not be returned\n"); goto out; } @@ -1096,7 +1105,9 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg, MPI2_FUNCTION_NVME_ENCAPSULATED) ? NVME_ERROR_RESPONSE_SIZE : SCSI_SENSE_BUFFERSIZE; sz = min_t(u32, karg.max_sense_bytes, sz_arg); - if (copy_to_user(karg.sense_data_ptr, ioc->ctl_cmds.sense, + if (kencap) { + memcpy(kencap->sense_buf, ioc->ctl_cmds.sense, sz); + } else if (copy_to_user(karg.sense_data_ptr, ioc->ctl_cmds.sense, sz)) { pr_err("failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); @@ -2635,7 +2646,7 @@ _ctl_compat_mpt_command(struct MPT3SAS_ADAPTER *ioc, unsigned cmd, karg.data_in_buf_ptr = compat_ptr(karg32.data_in_buf_ptr); karg.data_out_buf_ptr = compat_ptr(karg32.data_out_buf_ptr); karg.sense_data_ptr = compat_ptr(karg32.sense_data_ptr); - return _ctl_do_mpt_command(ioc, karg, &uarg->mf); + return _ctl_do_mpt_command(ioc, karg, &uarg->mf, NULL); } #endif @@ -2722,7 +2733,7 @@ _ctl_ioctl_main(struct file *file, unsigned int cmd, void __user *arg, } if (_IOC_SIZE(cmd) == sizeof(struct mpt3_ioctl_command)) { uarg = arg; - ret = _ctl_do_mpt_command(ioc, karg, &uarg->mf); + ret = _ctl_do_mpt_command(ioc, karg, &uarg->mf, NULL); } break; } @@ -4247,3 +4258,306 @@ mpt3sas_ctl_exit(ushort hbas_to_enumerate) if (hbas_to_enumerate != 2) misc_deregister(&gen2_ctl_dev); } + +/** + * mpt3_nvme_submit_command - submit NVME encapsulated command + * @ioc: per adapter object + * @cmd: NVME Command + * @ubuf: user buffer + * @kbuf: kernel Buffer + * @buf_len: buffer Length + * @result: cqe result + * @is_admin: admin or IO command + * @handle: to distinguish target NVME device + * @port_num: port number + */ +static int mpt3_nvme_submit_command(struct MPT3SAS_ADAPTER *ioc, + struct nvme_command cmd, u64 ubuf, void *kbuf, u32 buf_len, + u64 *result, int is_admin, u16 handle, u8 port_num) +{ + struct mpt3_nvme_kencap kencap; + struct mpt3_ioctl_command karg; + struct nvme_completion cqe; + int ret; + Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request = kzalloc(sizeof(cmd) + \ + sizeof(Mpi26NVMeEncapsulatedRequest_t), GFP_KERNEL); + + if (!nvme_encap_request) + return (-ENOMEM); + + memset(&karg, 0, sizeof(karg)); + memset(&cqe, 0, sizeof(cqe)); + memset(&kencap, 0, sizeof(kencap)); + karg.hdr.port_number = port_num; + karg.timeout = 120; + + /* + * data_sge_offset refers to the size of both NVME Encpasulated request + * header plus the NVME command in words. data_sge_offset name is a bit + * misleading for NVME Encpasulated request since PRP buffers will be + * allocated by DMA. + */ + karg.data_sge_offset = (sizeof(cmd) + sizeof(*nvme_encap_request)) / 4; + karg.max_reply_bytes = 0; + karg.max_sense_bytes = sizeof(cqe); + + /* + * We can set reply_buf to MPI26_NVME_FLAGS_READ but not required + */ + kencap.reply_buf = NULL; + + /* + * Firmware writes CQE to sense_buf + */ + kencap.sense_buf = &cqe; + kencap.nvme_encap_rqst = nvme_encap_request; + nvme_encap_request->Function = MPI2_FUNCTION_NVME_ENCAPSULATED; + nvme_encap_request->DataLength = buf_len; + nvme_encap_request->EncapsulatedCommandLength = sizeof(cmd); + nvme_encap_request->DevHandle = handle; + memcpy((u8*) nvme_encap_request + offsetof(Mpi26NVMeEncapsulatedRequest_t, + NVMe_Command), &cmd, sizeof(cmd)); + + if (is_admin) { + nvme_encap_request->Flags = MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN | \ + MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP; + } + + if (buf_len && (ubuf || kbuf)) { + + /* Write opcode */ + if (cmd.common.opcode & 0x1) { + if (ubuf) + karg.data_out_buf_ptr = (void __user *) ubuf; + else + kencap.dout_buf = kbuf; + karg.data_out_size = buf_len; + nvme_encap_request->Flags |= MPI26_NVME_FLAGS_WRITE; + } + + /* Read opcode */ + if (cmd.common.opcode & 0x2) { + if (ubuf) + karg.data_in_buf_ptr = (void __user *) ubuf; + else + kencap.din_buf = kbuf; + karg.data_in_size = buf_len; + nvme_encap_request->Flags |= MPI26_NVME_FLAGS_READ; + } + } + + /* + * pci_access_mutex lock acquired by ioctl path + */ + mutex_lock(&ioc->pci_access_mutex); + ret = _ctl_do_mpt_command(ioc, karg, NULL, &kencap); + mutex_unlock(&ioc->pci_access_mutex); + + if (ret) + return (ret); + + ret = cqe.status >> 1; + + if (result) + *result = le64_to_cpu(cqe.result.u64); + + kfree(nvme_encap_request); + return (ret); +} + +/** + * mpt3_nvme_user_cmd - submits NVME command request from userspace + * @sdev: pointer to SCSI device + * @ucmd: user space command + * @is_admin: admin or IO command + */ +int mpt3_nvme_user_cmd(struct scsi_device *sdev, struct nvme_passthru_cmd __user *ucmd, + int is_admin) +{ + struct Scsi_Host *shost = sdev->host; + struct MPT3SAS_ADAPTER *ioc = shost_priv(shost); + struct MPT3SAS_DEVICE *sas_device_priv_data = sdev->hostdata; + struct MPT3SAS_TARGET *sas_target_priv_data = sas_device_priv_data->sas_target; + struct _pcie_device *pcie_device; + struct nvme_passthru_cmd cmd; + struct nvme_command encap_cmd; + unsigned long flags; + u32 effects = NVME_CMD_EFFECTS_CSUPP; + u16 handle; + u8 port_num; + u64 result = 0; + int ret = 0; + + if (copy_from_user(&cmd, ucmd, sizeof(cmd))) + return (-EFAULT); + + if (cmd.flags) + return (-EINVAL); + + /* + * Metadata is not supported according to MPI 2.6 specs + */ + if (cmd.metadata_len > 0) + return (-EOPNOTSUPP); + + spin_lock_irqsave(&ioc->pcie_device_lock, flags); + pcie_device = __mpt3sas_get_pdev_from_target(ioc, sas_target_priv_data); + + if (pcie_device) { + handle = pcie_device->handle; + port_num = pcie_device->port_num; + if (pcie_device->nvme_elog) { + if (is_admin) + effects = pcie_device->nvme_elog->acs[cmd.opcode]; + else + effects = pcie_device->nvme_elog->iocs[cmd.opcode]; + } + } else { + spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); + return (-ENXIO); + } + + spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); + + /* + * pci_access_mutex lock should already take care of + * NVME_CMD_EFFECTS_CSE_MASK and other effects are related + * to the namespace management, which isn't supported + */ + if (!(effects & NVME_CMD_EFFECTS_CSUPP)) + return (-EOPNOTSUPP); + + memset(&encap_cmd, 0, sizeof(encap_cmd)); + encap_cmd.common.opcode = cmd.opcode; + encap_cmd.common.flags = cmd.flags; + encap_cmd.common.nsid = cpu_to_le32(cmd.nsid); + encap_cmd.common.cdw2[0] = cpu_to_le32(cmd.cdw2); + encap_cmd.common.cdw2[1] = cpu_to_le32(cmd.cdw3); + encap_cmd.common.cdw10 = cpu_to_le32(cmd.cdw10); + encap_cmd.common.cdw11 = cpu_to_le32(cmd.cdw11); + encap_cmd.common.cdw12 = cpu_to_le32(cmd.cdw12); + encap_cmd.common.cdw13 = cpu_to_le32(cmd.cdw13); + encap_cmd.common.cdw14 = cpu_to_le32(cmd.cdw14); + encap_cmd.common.cdw15 = cpu_to_le32(cmd.cdw15); + ret = mpt3_nvme_submit_command(ioc, encap_cmd, cmd.addr, NULL, cmd.data_len, + &result, is_admin, handle, port_num); + + if (ret >= 0) { + if (put_user(result, &ucmd->result)) + return (-EFAULT); + } + + return (ret); +} + +/** + * mpt3_nvme_user_cmd64 - submits 64-bit NVME command request from userspace + * @sdev: pointer to SCSI device + * @ucmd: 64-bit user space command + * @is_admin: admin or IO command + */ +int mpt3_nvme_user_cmd64(struct scsi_device *sdev, struct nvme_passthru_cmd64 __user *ucmd, + int is_admin) +{ + struct Scsi_Host *shost = sdev->host; + struct MPT3SAS_ADAPTER *ioc = shost_priv(shost); + struct MPT3SAS_DEVICE *sas_device_priv_data = sdev->hostdata; + struct MPT3SAS_TARGET *sas_target_priv_data = sas_device_priv_data->sas_target; + struct _pcie_device *pcie_device; + struct nvme_passthru_cmd cmd; + struct nvme_command encap_cmd; + unsigned long flags; + u32 effects = NVME_CMD_EFFECTS_CSUPP; + u16 handle; + u8 port_num; + u64 result = 0; + int ret = 0; + + if (copy_from_user(&cmd, ucmd, sizeof(cmd))) + return (-EFAULT); + + if (cmd.flags) + return (-EINVAL); + + /* + * Metadata is not supported according to MPI 2.6 specs + */ + if (cmd.metadata_len > 0) + return (-EOPNOTSUPP); + + spin_lock_irqsave(&ioc->pcie_device_lock, flags); + pcie_device = __mpt3sas_get_pdev_from_target(ioc, sas_target_priv_data); + + if (pcie_device) { + handle = pcie_device->handle; + port_num = pcie_device->port_num; + if (pcie_device->nvme_elog) { + if (is_admin) + effects = pcie_device->nvme_elog->acs[cmd.opcode]; + else + effects = pcie_device->nvme_elog->iocs[cmd.opcode]; + } + } else { + spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); + return (-ENXIO); + } + + spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); + + /* + * pci_access_mutex lock should already take care of + * NVME_CMD_EFFECTS_CSE_MASK and other effects are related + * to the namespace management, which isn't supported + */ + if (!(effects & NVME_CMD_EFFECTS_CSUPP)) + return (-EOPNOTSUPP); + + memset(&encap_cmd, 0, sizeof(encap_cmd)); + encap_cmd.common.opcode = cmd.opcode; + encap_cmd.common.flags = cmd.flags; + encap_cmd.common.nsid = cpu_to_le32(cmd.nsid); + encap_cmd.common.cdw2[0] = cpu_to_le32(cmd.cdw2); + encap_cmd.common.cdw2[1] = cpu_to_le32(cmd.cdw3); + encap_cmd.common.cdw10 = cpu_to_le32(cmd.cdw10); + encap_cmd.common.cdw11 = cpu_to_le32(cmd.cdw11); + encap_cmd.common.cdw12 = cpu_to_le32(cmd.cdw12); + encap_cmd.common.cdw13 = cpu_to_le32(cmd.cdw13); + encap_cmd.common.cdw14 = cpu_to_le32(cmd.cdw14); + encap_cmd.common.cdw15 = cpu_to_le32(cmd.cdw15); + ret = mpt3_nvme_submit_command(ioc, encap_cmd, cmd.addr, NULL, cmd.data_len, + &result, is_admin, handle, port_num); + + if (ret >= 0) { + if (put_user(result, &ucmd->result)) + return (-EFAULT); + } + + return (ret); +} + +/** + * mpt3_nvme_get_effect_log -read effect logs + * @ioc: per adapter object + * @pcie_device: NVME PCIE device + * @nvme_elog: nvme_effect_log to be populated + */ +int mpt3_nvme_get_effect_log(struct MPT3SAS_ADAPTER *ioc, struct _pcie_device *pcie_device, + struct nvme_effects_log *nvme_elog) +{ + struct nvme_command c; + + /* + * Convert byte length to nvme's 0-based num dwords + */ + u32 dwlen = (sizeof(*nvme_elog) >> 2) - 1; + memset(&c, 0, sizeof(c)); + c.get_log_page.opcode = nvme_admin_get_log_page; + c.get_log_page.nsid = 1; + c.get_log_page.lid = NVME_LOG_CMD_EFFECTS; + c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); + c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); + c.get_log_page.csi = NVME_CSI_NVM; + + return (mpt3_nvme_submit_command(ioc, c, 0, nvme_elog, sizeof(*nvme_elog), + NULL, 1, pcie_device->handle, pcie_device->port_num)); +} diff --git a/drivers/scsi/mpt3sas/mpt3sas_ctl.h b/drivers/scsi/mpt3sas/mpt3sas_ctl.h index 171709e91006..24db0699cb25 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_ctl.h +++ b/drivers/scsi/mpt3sas/mpt3sas_ctl.h @@ -458,4 +458,20 @@ struct mpt3_enable_diag_sbr_reload { struct mpt3_ioctl_header hdr; }; +/** + * struct mpt3_nvme_kencap - hold nvme encap request from scsihost + * nvme_encap_rqst - nvme encapsulated request + * dout_buf - output buffer location + * din_buf - input buffer location + * reply_buf - reply buffer location + * sense_buf - sense buffer location + */ +struct mpt3_nvme_kencap { + Mpi26NVMeEncapsulatedRequest_t *nvme_encap_rqst; + void *dout_buf; + void *din_buf; + void *reply_buf; + void *sense_buf; +}; + #endif /* MPT3SAS_CTL_H_INCLUDED */ diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c index f2a55aa5fe65..9acc551d9299 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c +++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c @@ -671,7 +671,7 @@ mpt3sas_get_sdev_from_target(struct MPT3SAS_ADAPTER *ioc, return ret; } -static struct _pcie_device * +struct _pcie_device * __mpt3sas_get_pdev_from_target(struct MPT3SAS_ADAPTER *ioc, struct MPT3SAS_TARGET *tgt_priv) { @@ -1274,6 +1274,7 @@ _scsih_pcie_device_remove(struct MPT3SAS_ADAPTER *ioc, update_latency = 1; spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); if (was_on_pcie_device_list) { + kfree(pcie_device->nvme_elog); kfree(pcie_device->serial_number); pcie_device_put(pcie_device); } @@ -7972,7 +7973,7 @@ _scsih_pcie_device_remove_from_sml(struct MPT3SAS_ADAPTER *ioc, __func__, pcie_device->enclosure_level, pcie_device->connector_name)); - + kfree(pcie_device->nvme_elog); kfree(pcie_device->serial_number); } @@ -8213,6 +8214,13 @@ _scsih_pcie_add_device(struct MPT3SAS_ADAPTER *ioc, u16 handle) pcie_device_pg2.ControllerResetTO; else pcie_device->reset_timeout = 30; + pcie_device->nvme_elog = kzalloc(sizeof(struct nvme_effects_log), + GFP_KERNEL); + if (pcie_device->nvme_elog && mpt3_nvme_get_effect_log(ioc, + pcie_device, pcie_device->nvme_elog)) { + kfree(pcie_device->nvme_elog); + pcie_device->nvme_elog = NULL; + } } else pcie_device->reset_timeout = 30; @@ -11936,12 +11944,70 @@ static struct raid_function_template mpt2sas_raid_functions = { .get_state = scsih_get_state, }; +/** + * scsih_ioctl() - IOCTL handler for driver + * @sdev: SCSI device associated with LUN. + * @cmd: IOCTL command. + * @arg: userspace ioctl data structure. + * + * This interface is used to emulate NVME functionality for the drives + * connected on Trimode HBA. Userspace tools can talk to NVME device + * through passthrough commands, e.g., nvme-cli can identify controller + * through `nvme id-ctrl /dev/sdX`. + * + * Return: 0 on success, -errno on failure + */ +static int scsih_ioctl(struct scsi_device *sdev, unsigned int cmd, void __user *arg) +{ + if (scsih_is_nvme(&sdev->sdev_gendev)) { + switch (cmd) { + case NVME_IOCTL_ID: + /* + * Devices are only reported for NSID 1 + */ + return (1); + case NVME_IOCTL_ADMIN_CMD: + return (mpt3_nvme_user_cmd(sdev, arg, 1)); + case NVME_IOCTL_ADMIN64_CMD: + return (mpt3_nvme_user_cmd64(sdev, arg, 1)); + case NVME_IOCTL_IO_CMD: + return (mpt3_nvme_user_cmd(sdev, arg, 0)); + case NVME_IOCTL_IO64_CMD: + return (mpt3_nvme_user_cmd64(sdev, arg, 0)); + + /* + * NVME_IOCTL_SUBMIT_IO requires the `lba_shift` parameter + * from the namespace to calculate the number of blocks. + * We can obtain the namespace capabilities in the same way + * we retrieve effect logs. Since it's a specific interface + * for read/write operations, we may consider supporting it + * in the future if it is deemed necessary. + */ + case NVME_IOCTL_SUBMIT_IO: + case NVME_IOCTL_IO64_CMD_VEC: + case NVME_IOCTL_RESCAN: + case NVME_IOCTL_RESET: + case NVME_IOCTL_SUBSYS_RESET: + case NVME_URING_CMD_IO: + case NVME_URING_CMD_IO_VEC: + case NVME_URING_CMD_ADMIN: + case NVME_URING_CMD_ADMIN_VEC: + return (-EOPNOTSUPP); + } + } + return (-EINVAL); +} + /* shost template for SAS 3.0 HBA devices */ static const struct scsi_host_template mpt3sas_driver_template = { .module = THIS_MODULE, .name = "Fusion MPT SAS Host", .proc_name = MPT3SAS_DRIVER_NAME, .queuecommand = scsih_qcmd, +#ifdef CONFIG_COMPAT + .compat_ioctl = scsih_ioctl, +#endif + .ioctl = scsih_ioctl, .target_alloc = scsih_target_alloc, .slave_alloc = scsih_slave_alloc, .device_configure = scsih_device_configure, diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c index ca4bc0ac76ad..2378a7a9a775 100644 --- a/drivers/scsi/sd.c +++ b/drivers/scsi/sd.c @@ -4014,6 +4014,10 @@ static int sd_probe(struct device *dev) gd->events |= DISK_EVENT_MEDIA_CHANGE; gd->event_flags = DISK_EVENT_FLAG_POLL | DISK_EVENT_FLAG_UEVENT; } +#ifdef CONFIG_TRUENAS + if (sdp->genhd_hidden) + gd->flags |= GENHD_FL_HIDDEN; +#endif blk_pm_runtime_init(sdp->request_queue, dev); if (sdp->rpm_autosuspend) { diff --git a/drivers/scsi/ses.c b/drivers/scsi/ses.c index 2c61624cb4b0..74a6cd0c177c 100644 --- a/drivers/scsi/ses.c +++ b/drivers/scsi/ses.c @@ -20,6 +20,9 @@ #include +#include +#include "../ata/ahci.h" + struct ses_device { unsigned char *page1; unsigned char *page1_types; @@ -57,8 +60,9 @@ static int ses_probe(struct device *dev) return err; } -#define SES_TIMEOUT (30 * HZ) -#define SES_RETRIES 3 +#define SES_TIMEOUT (30 * HZ) +#define SES_RETRIES 3 +#define SES_POLL_PERIOD_S 60 static void init_device_slot_control(unsigned char *dest_desc, struct enclosure_component *ecomp, @@ -476,10 +480,20 @@ static int ses_process_descriptor(struct enclosure_component *ecomp, struct ses_component *scomp = ecomp->scratch; unsigned char *d; - if (invalid) + if (invalid) { + scomp->addr = 0; return 0; + } switch (proto) { + case SCSI_PROTOCOL_ATA: + d = desc + 4; + if (eip) { + slot = get_unaligned_be32(d); + d = desc + 8; + } + addr = get_unaligned_be32(d) + 1; + break; case SCSI_PROTOCOL_FCP: if (eip) { if (max_desc_len <= 7) @@ -590,6 +604,8 @@ static void ses_enclosure_data_process(struct enclosure_device *edev, /* skip past overall descriptor */ desc_ptr += len + 4; } + if (!create) + spin_lock(&edev->enc_lock); if (ses_dev->page10 && ses_dev->page10_len > 9) addl_desc_ptr = ses_dev->page10 + 8; type_ptr = ses_dev->page1_types; @@ -662,6 +678,8 @@ static void ses_enclosure_data_process(struct enclosure_device *edev, } } } + if (!create) + spin_unlock(&edev->enc_lock); kfree(buf); kfree(hdr_buf); } @@ -678,8 +696,33 @@ static void ses_match_to_enclosure(struct enclosure_device *edev, if (refresh) ses_enclosure_data_process(edev, edev_sdev, 0); - if (scsi_is_sas_rphy(sdev->sdev_target->dev.parent)) + if (scsi_is_sas_rphy(sdev->sdev_target->dev.parent)) { efd.addr = sas_get_address(sdev); + } else if (scsi_is_ata(sdev)) { + efd.addr = sdev->host->host_no + 1; + } else { + const unsigned char *d; + const struct scsi_vpd *vpd_pg83; + rcu_read_lock(); + if ((vpd_pg83 = rcu_dereference(sdev->vpd_pg83)) != NULL) { + d = vpd_pg83->data + 4; + while (d + 12 <= vpd_pg83->data + vpd_pg83->len) { + enum scsi_protocol proto = d[0] >> 4; + u8 code_set = d[0] & 0x0f; + u8 piv = d[1] & 0x80; + u8 assoc = (d[1] & 0x30) >> 4; + u8 type = d[1] & 0x0f; + u8 len = d[3]; + if (piv && code_set == 1 && assoc == 1 && proto == + SCSI_PROTOCOL_SAS && type == 3 && len == 8) { + efd.addr = get_unaligned_be64(&d[4]); + break; + } + d += len + 4; + } + } + rcu_read_unlock(); + } if (efd.addr) { efd.dev = &sdev->sdev_gendev; @@ -688,6 +731,26 @@ static void ses_match_to_enclosure(struct enclosure_device *edev, } } +static int poll_task_cb(void *arg) +{ + struct enclosure_device *edev = (struct enclosure_device*) arg; + struct scsi_device *sdev = to_scsi_device(edev->edev.parent); + struct scsi_device *tmp_sdev; + + while (!kthread_should_stop()) { + shost_for_each_device(tmp_sdev, sdev->host) { + if (tmp_sdev->lun != 0 || scsi_device_enclosure(tmp_sdev)) + continue; + ses_match_to_enclosure(edev, tmp_sdev, 1); + } + if (!kthread_should_stop()) { + schedule_timeout_interruptible( + msecs_to_jiffies(SES_POLL_PERIOD_S * 1000)); + } + } + return (0); +} + static int ses_intf_add(struct device *cdev) { struct scsi_device *sdev = to_scsi_device(cdev->parent); @@ -703,11 +766,21 @@ static int ses_intf_add(struct device *cdev) if (!scsi_device_enclosure(sdev)) { /* not an enclosure, but might be in one */ - struct enclosure_device *prev = NULL; + if (scsi_is_ahci(sdev)) { + struct ata_port *ap = ata_shost_to_port(sdev->host); + struct ahci_host_priv *hpriv = ap->host->private_data; + struct Scsi_Host *shost = hpriv->em_shost; + + edev = enclosure_find(&shost->shost_gendev, NULL); + if (edev) + ses_match_to_enclosure(edev, sdev, 1); + } else { + struct enclosure_device *prev = NULL; - while ((edev = enclosure_find(&sdev->host->shost_gendev, prev)) != NULL) { - ses_match_to_enclosure(edev, sdev, 1); - prev = edev; + while ((edev = enclosure_find(&sdev->host->shost_gendev, prev)) != NULL) { + ses_match_to_enclosure(edev, sdev, 1); + prev = edev; + } } return -ENODEV; } @@ -814,6 +887,7 @@ static int ses_intf_add(struct device *cdev) kfree(hdr_buf); + spin_lock_init(&edev->enc_lock); edev->scratch = ses_dev; for (i = 0; i < components; i++) edev->component[i].scratch = scomp + i; @@ -822,10 +896,32 @@ static int ses_intf_add(struct device *cdev) /* see if there are any devices matching before * we found the enclosure */ - shost_for_each_device(tmp_sdev, sdev->host) { - if (tmp_sdev->lun != 0 || scsi_device_enclosure(tmp_sdev)) - continue; - ses_match_to_enclosure(edev, tmp_sdev, 0); + if (scsi_is_ahciem(sdev)) { + for (i = 0; i < components; i++) { + struct ses_component *tmp_scomp; + struct Scsi_Host *tmp_shost; + + tmp_scomp = edev->component[i].scratch; + if (!tmp_scomp->addr) + continue; + tmp_shost = scsi_host_lookup(tmp_scomp->addr - 1); + shost_for_each_device(tmp_sdev, tmp_shost) { + struct device *tmp_dev = &tmp_sdev->sdev_gendev; + + if (enclosure_add_device(edev, i, tmp_dev) == 0) + kobject_uevent(&tmp_dev->kobj, KOBJ_CHANGE); + break; /* there is only one device */ + } + scsi_host_put(tmp_shost); + } + edev->poll_task = NULL; + } else { + edev->poll_task = kthread_create(poll_task_cb, (void *)edev, + dev_name(&sdev->sdev_gendev)); + if (!IS_ERR(edev->poll_task)) + wake_up_process(edev->poll_task); + else + edev->poll_task = NULL; } return 0; @@ -855,8 +951,17 @@ static int ses_remove(struct device *dev) static void ses_intf_remove_component(struct scsi_device *sdev) { struct enclosure_device *edev, *prev = NULL; + struct Scsi_Host *shost; - while ((edev = enclosure_find(&sdev->host->shost_gendev, prev)) != NULL) { + if (scsi_is_ahci(sdev)) { + struct ata_port *ap = ata_shost_to_port(sdev->host); + struct ahci_host_priv *hpriv = ap->host->private_data; + + shost = hpriv->em_shost; + } else + shost = sdev->host; + + while ((edev = enclosure_find(&shost->shost_gendev, prev)) != NULL) { prev = edev; if (!enclosure_remove_device(edev, &sdev->sdev_gendev)) break; @@ -875,6 +980,11 @@ static void ses_intf_remove_enclosure(struct scsi_device *sdev) if (!edev) return; + if (edev->poll_task) { + kthread_stop(edev->poll_task); + edev->poll_task = NULL; + } + ses_dev = edev->scratch; edev->scratch = NULL; diff --git a/fs/attr.c b/fs/attr.c index c04d19b58f12..dc0c52739c7c 100644 --- a/fs/attr.c +++ b/fs/attr.c @@ -179,21 +179,69 @@ int setattr_prepare(struct mnt_idmap *idmap, struct dentry *dentry, goto kill_priv; /* Make sure a caller can chown. */ +#if CONFIG_TRUENAS + /* + * Check for ACE4_WRITE_OWNER. RFC 5661 Section 6.2.1.3.1 + * On UNIX systems, this is the ability to execute chown() and + * chgrp(). + */ + if ((ia_valid & ATTR_UID) && + !chown_ok(idmap, inode, attr->ia_vfsuid)) { + if (!IS_NFSV4ACL(inode)) { + return -EPERM; + } + else if (inode_permission(idmap, inode, MAY_WRITE_OWNER)) { + return -EPERM; + } + } +#else if ((ia_valid & ATTR_UID) && !chown_ok(idmap, inode, attr->ia_vfsuid)) return -EPERM; +#endif /* Make sure caller can chgrp. */ +#if CONFIG_TRUENAS + if ((ia_valid & ATTR_GID) && + !chgrp_ok(idmap, inode, attr->ia_vfsgid)) { + if (!IS_NFSV4ACL(inode)) { + return -EPERM; + } + else if (inode_permission(idmap, inode, MAY_WRITE_OWNER)) { + return -EPERM; + } + } +#else if ((ia_valid & ATTR_GID) && !chgrp_ok(idmap, inode, attr->ia_vfsgid)) return -EPERM; +#endif /* Make sure a caller can chmod. */ if (ia_valid & ATTR_MODE) { vfsgid_t vfsgid; +#if CONFIG_TRUENAS + /* + * Check for ACE4_WRITE_ACL. RFC 5661 Section 6.2.1.3.1 + * Permission to write the acl or mode attributes. + */ + if (IS_NFSV4ACL(inode)) { + if (!inode_owner_or_capable(idmap, inode)) { + if (inode_permission(idmap, inode, + MAY_WRITE_ACL)) { + return -EPERM; + } + } + } + else { + if (!inode_owner_or_capable(idmap, inode)) + return -EPERM; + } +#else if (!inode_owner_or_capable(idmap, inode)) return -EPERM; +#endif if (ia_valid & ATTR_GID) vfsgid = attr->ia_vfsgid; @@ -207,6 +255,12 @@ int setattr_prepare(struct mnt_idmap *idmap, struct dentry *dentry, /* Check for setting the inode time. */ if (ia_valid & (ATTR_MTIME_SET | ATTR_ATIME_SET | ATTR_TIMES_SET)) { + /* + * Check for ACE4_WRITE_ATTRIBUTES. RFC 5661 Section 6.2.1.3.1 + * Users with ACE4_WRITE_ATTRIBUTES or ACE4_WRITE_DATA can + * change the times associated with a file to the _current_ + * server time. This permissions check happens in notify_change(). + */ if (!inode_owner_or_capable(idmap, inode)) return -EPERM; } @@ -338,7 +392,22 @@ int may_setattr(struct mnt_idmap *idmap, struct inode *inode, return -EPERM; if (!inode_owner_or_capable(idmap, inode)) { +#if CONFIG_TRUENAS + if (IS_NFSV4ACL(inode)) { + error = inode_permission(idmap, inode, + MAY_WRITE); + if (error) { + error = inode_permission(idmap, + inode, MAY_WRITE_ATTRS); + } + } + else { + error = inode_permission(idmap, inode, + MAY_WRITE); + } +#else error = inode_permission(idmap, inode, MAY_WRITE); +#endif if (error) return error; } diff --git a/fs/namei.c b/fs/namei.c index 4a4a22a08ac2..870c9ae05308 100644 --- a/fs/namei.c +++ b/fs/namei.c @@ -485,7 +485,16 @@ static inline int do_inode_permission(struct mnt_idmap *idmap, */ static int sb_permission(struct super_block *sb, struct inode *inode, int mask) { +#if CONFIG_TRUENAS + /* + * NFSv4 ACLs have more granular write permissions. Same logic + * should apply here as with generic MAY_WRITE. Specifically, protect + * against changes to a readonly filesystem. + */ + if (unlikely(mask & (MAY_WRITE | NFS41ACL_WRITE_ALL))) { +#else if (unlikely(mask & MAY_WRITE)) { +#endif umode_t mode = inode->i_mode; /* Nobody gets write access to a read-only fs. */ @@ -516,7 +525,15 @@ int inode_permission(struct mnt_idmap *idmap, if (retval) return retval; +#if CONFIG_TRUENAS + /* + * NFSv4 ACLs have more granular write permissions. Same logic + * should apply here as with generic MAY_WRITE. + */ + if (unlikely(mask & (MAY_WRITE | NFS41ACL_WRITE_ALL))) { +#else if (unlikely(mask & MAY_WRITE)) { +#endif /* * Nobody gets write access to an immutable file. */ @@ -3071,8 +3088,36 @@ static int may_delete(struct mnt_idmap *idmap, struct inode *dir, return -EOVERFLOW; audit_inode_child(dir, victim, AUDIT_TYPE_CHILD_DELETE); - +#if CONFIG_TRUENAS + if (IS_NFSV4ACL(inode)) { + /* + * See RFC 5661 Section 6.2.1.3.2 + * for implementation details of DELETE vs DELETE_CHILD. + * + * Since there may be a variety of ways to implement + * allow in VFS if MAY_DELETE is permitted on viction, + * MAY_DELETE_CHILD is permitted on directory, or MAY_WRITE + * and MAY_EXEC are permitted on directory. This allows + * filesystem to enforce stricter permissions if needed. + * + * MAY_WRITE|MAY_EXEC is checked first to give opportunity + * to perform check via generic_permission() first. + */ + error = inode_permission(idmap, dir, MAY_WRITE | MAY_EXEC); + if (error) { + error = inode_permission(idmap, inode, MAY_DELETE); + if (error) { + error = inode_permission(idmap, dir, + MAY_DELETE_CHILD); + } + } + } + else { + error = inode_permission(idmap, dir, MAY_WRITE | MAY_EXEC); + } +#else error = inode_permission(idmap, dir, MAY_WRITE | MAY_EXEC); +#endif if (error) return error; if (IS_APPEND(dir)) diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c index 9d40319e063d..21f4b1cf2a47 100644 --- a/fs/nfs/nfs4proc.c +++ b/fs/nfs/nfs4proc.c @@ -71,6 +71,13 @@ #include "nfs4trace.h" +#if CONFIG_TRUENAS +#include "../nfs_common/nfs41acl_xdr.h" + +/* 0xFFFFFFFFFFFFFFFF == 18446744073709551615, len('18446744073709551615') == 20 */ +#define U64_STRBUF_SIZE 21 +#endif /* CONFIG_TRUENAS */ + #define NFSDBG_FACILITY NFSDBG_PROC #define NFS4_BITMASK_SZ 3 @@ -7956,6 +7963,508 @@ static bool nfs4_xattr_list_nfs4_sacl(struct dentry *dentry) return nfs4_server_supports_acls(NFS_SB(dentry->d_sb), NFS4ACL_SACL); } +#if CONFIG_TRUENAS +/* + * We will publish the DACL thru NA41_NAME ("system.nfs4_acl_xdr") + * + * First some support functions. These may be similar to upstream + * functions in nfsd. + */ + +/* + * return the size of the struct nfs4_acl required to represent an acl + * with @entries entries. + */ +static int nfs4_acl_bytes(int entries) +{ + return sizeof(struct nfs4_acl) + entries * sizeof(struct nfs4_ace); +} + +static struct { + char *string; + int stringlen; + int type; +} s2t_map[] = { + { + .string = "OWNER@", + .stringlen = sizeof("OWNER@") - 1, + .type = NFS4_ACL_WHO_OWNER, + }, + { + .string = "GROUP@", + .stringlen = sizeof("GROUP@") - 1, + .type = NFS4_ACL_WHO_GROUP, + }, + { + .string = "EVERYONE@", + .stringlen = sizeof("EVERYONE@") - 1, + .type = NFS4_ACL_WHO_EVERYONE, + }, +}; + +static int nfs4_acl_get_whotype(char *p, u32 len) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(s2t_map); i++) { + if (s2t_map[i].stringlen == len && + (memcmp(s2t_map[i].string, p, len) == 0)) + return s2t_map[i].type; + } + return NFS4_ACL_WHO_NAMED; +} + +/* + * XDR encode the ace who into the supplied buffer. + * + * Return the number of bytes (including the leading nbytes and + * any padding necessary) + */ +static int nfs4_ace_encode_who(struct nfs4_ace *ace, char *buf) +{ + u32 *p = (u32 *)buf; + int count = -EINVAL; + const char *pstr = NULL; + char idbuf[U64_STRBUF_SIZE]; /* Future-proof in case uid_t / gid_t change size */ + int total_bytes, pad_count; + + /* + * First find the size of the string (into count) + * + * Will also have some side-effects which will be used below: + * either idbuf will be populated (for NFS4_ACL_WHO_NAMED) or + * pstr will point into s2t_map. + */ + if (ace->whotype == NFS4_ACL_WHO_NAMED) { + if (ace->flag & NFS4_ACE_IDENTIFIER_GROUP) { + gid_t gid = from_kgid_munged(&init_user_ns, ace->who_gid); + + snprintf(idbuf, sizeof(idbuf), "%llu", (unsigned long long)gid); + } else { + uid_t uid = from_kuid_munged(&init_user_ns, ace->who_uid); + + snprintf(idbuf, sizeof(idbuf), "%llu", (unsigned long long)uid); + } + count = strlen(idbuf); + } else { + int i; + + for (i = 0; i < ARRAY_SIZE(s2t_map); i++) { + if (ace->whotype == s2t_map[i].type) { + count = s2t_map[i].stringlen; + pstr = s2t_map[i].string; + break; + } + } + } + if (count < 0) + return count; /* error */ + + /* + * who is a utf8str_mixed, i.e. a utf8string. Per RFC 1832 + * this is encoded as a uint32_t length followed by + * string bytes, and then padded by null up to a 4 byte + * boundary. + */ + total_bytes = 4 + (XDR_QUADLEN(count) << 2); + if (!buf) + return total_bytes; + pad_count = total_bytes - (4 + count); + + /* + * A buffer was supplied. Write the string length, followed by the + * string bytes and then null padding, if necessary. + */ + *p++ = htonl(count); + if (ace->whotype == NFS4_ACL_WHO_NAMED) + memcpy(p, idbuf, count); + else + memcpy(p, pstr, count); + if (pad_count) { + char *pad = buf + (4 + count); + + memset(pad, 0, pad_count); + } + return total_bytes; +} + +/* + * Convert the specified (numeric) name into a unsigned long long ID. + * + * Do this rather than u32 in an effort to future-proof. + * + * Returns true on success. + */ +static bool numeric_name_to_id(const char *name, u32 namelen, unsigned long long *id) +{ + int ret; + char buf[U64_STRBUF_SIZE]; + + if (id && (namelen + 1 > sizeof(buf))) + /* no id buffer or too long to represent a 64-bit id: */ + return false; + /* Just to make sure it's null-terminated: */ + memcpy(buf, name, namelen); + buf[namelen] = '\0'; + ret = kstrtoull(buf, 10, id); + return ret == 0; +} + +/* + * Decode the XDR data supplied in data parameter into an ACE. + * + * Upon success 0 is returned, and the data parameter is advanced. + */ +static int nfs4_decode_nfsace4(void **data, size_t *remaining, struct nfs4_ace *ace) +{ + u32 *p = *data; + u32 length, length_incl_padding; + int error = 0; + + /* + * Per RFC8881 6.2.1 acl the format of nfsace4 is: + * uint32_t type + * uint32_t flag + * uint32_t access_mask + * utf8str_mixed who + * + * where utf8str_mixed is a utf8string. Per RFC 1832 + * this is encoded as a uint32_t length followed by + * string bytes, and then padded by null up to a 4 byte + * boundary. + * + * When it comes to checking remaining, first we will check + * the first four uint32_t (4*4 -> 16 bytes), so that we can + * read the length of the who string. We do not modify remaining + * unless we are successful in decoding the ACE & advancing thru + * the data buffer. + */ + #define NFSACE4_HEADER_BYTES (4 * sizeof(u32)) + if (*remaining < NFSACE4_HEADER_BYTES) { + pr_err("NFS: %s buffer not large enough to contain ACE head", __func__); + return -EOVERFLOW; + } + ace->type = ntohl(*(p++)); + ace->flag = ntohl(*(p++)); + ace->access_mask = ntohl(*(p++)); + length = ntohl(*(p++)); + length_incl_padding = XDR_QUADLEN(length) << 2; + + /* + * Now that we have the length, check remaining again. + * + * The input buffer includes both the string and null + * padding (if necessary to align things). + */ + if (*remaining < (NFSACE4_HEADER_BYTES + length_incl_padding)) { + pr_err("NFS: %s buffer not large enough to contain ACE who", __func__); + return -EOVERFLOW; + } + + ace->whotype = nfs4_acl_get_whotype((char *)p, length); + + if (ace->whotype == NFS4_ACL_WHO_NAMED) { + /* + * We're just going to support numeric IDs here. + * (it's very expensive to do otherwise) + */ + unsigned long long id = -1; + + if (numeric_name_to_id((const char *)p, length, &id)) { + if (ace->flag & NFS4_ACE_IDENTIFIER_GROUP) { + ace->who_gid = make_kgid(&init_user_ns, id); + if (!gid_valid(ace->who_gid)) { + pr_err("NFS: %s Invalid who_gid: %.*s", __func__, + length, (char *)p); + error = -EINVAL; + } + } else { + ace->who_uid = make_kuid(&init_user_ns, id); + if (!uid_valid(ace->who_uid)) { + pr_err("NFS: %s Invalid who_uid: %.*s", __func__, + length, (char *)p); + error = -EINVAL; + } + } + } else { + pr_err("NFS: %s Non-numeric who: %.*s", __func__, length, (char *)p); + error = -EINVAL; + } + } + /* + * If the whotype was a value other than NFS4_ACL_WHO_NAMED + * (e.g. NFS4_ACL_WHO_OWNER), then no further decoding is + * required (so, no else statement). + */ + + if (error >= 0) { + /* + * Advance by a multiple of 4 bytes (string + padding). + * Since p is a pointer to u32 we don't need to << 2 the + * output from XDR_QUADLEN. + */ + p += XDR_QUADLEN(length); + *data = p; + /* Reduce remaining by initial 4 uint32_t + the string (incl padding) */ + *remaining -= (NFSACE4_HEADER_BYTES + length_incl_padding); + } + return error; +} + +/* + * Decode the buffer containing the raw XDR data into struct nfs4_acl. + * + * This is similar to nfsd4_decode_acl + */ +static int nfs4_aclbuf_decode(void *buf, size_t buflen, enum nfs4_acl_type type, + struct nfs4_acl **pacl) +{ + u32 acl_flag, count; + u32 *p = buf; + struct nfs4_acl *acl; + int acl_bytes; + struct nfs4_ace *ace; + int status; + size_t remaining; + + if (buflen < 8) { + pr_err("NFS: %s ACL buffer too small: %zd", __func__, buflen); + return -EINVAL; + } + + acl_flag = ntohl(*(p++)); + count = ntohl(*(p++)); + remaining = buflen - 8; + acl_bytes = nfs4_acl_bytes(count); + acl = kmalloc(acl_bytes, GFP_KERNEL); + if (acl == NULL) + return -ENOMEM; + + acl->flag = acl_flag; + acl->naces = count; + for (ace = acl->aces; ace < acl->aces + count; ace++) { + status = nfs4_decode_nfsace4((void **)&p, &remaining, ace); + if (status) { + kfree(acl); + return status; + } + } + + *pacl = acl; + return acl_bytes; +} + +/* + * XDR encode the specified ACL. + * + * Returns 0 on success, and populates the buf and buflen parameters. The + * buf must be freed by the caller. + */ +static int nfs4_encode_acl_to_buf(struct nfs4_acl *acl, void **buf, size_t *buflen) +{ + int byte_count = 0; + struct nfs4_ace *ace; + void *xdrbuf; + u32 *p; + + /* + * First count how many bytes we will need. + */ + byte_count += 8; /* acl_type and naces */ + for (ace = acl->aces; ace < acl->aces + acl->naces; ace++) { + int who_bytes; + + byte_count += 12; /* ace type, flag, access_mask */ + who_bytes = nfs4_ace_encode_who(ace, NULL); + if (who_bytes < 0) { + pr_err("NFS: %s Failed to determine bytes for ACE (%d)", __func__, + who_bytes); + return who_bytes; + } + byte_count += who_bytes; + } + + xdrbuf = kmalloc(byte_count, GFP_KERNEL); + if (xdrbuf == NULL) + return -ENOMEM; + + /* + * Next encode the acl to the buffer + */ + p = xdrbuf; + *p++ = htonl(acl->flag); + *p++ = htonl(acl->naces); + for (ace = acl->aces; ace < acl->aces + acl->naces; ace++) { + int bytes; + *p++ = htonl(ace->type); + *p++ = htonl(ace->flag); + *p++ = htonl(ace->access_mask); + bytes = nfs4_ace_encode_who(ace, (char *)p); + p += (bytes >> 2); /* >> 2 because pointer to u32 */ + } + + /* Return the allocated buffer */ + *buf = xdrbuf; + *buflen = byte_count; + return 0; +} + +/* + * Allow the client to WRITE the NA41_NAME ("system.nfs4_acl_xdr") + */ +static int nfs4_xattr_set_nfs4_acl_xdr(const struct xattr_handler *handler, + struct mnt_idmap *idmap, + struct dentry *unused, struct inode *inode, + const char *key, const void *buf, + size_t buflen, int flags) +{ + u32 *p = (u32 *)buf; + u32 acl_flag, ace_cnt; + struct nfs4_acl *acl = NULL; + int error; + void *xdrbuf = NULL; + size_t xdrbuflen; + + /* Ensure data was provided */ + if (!buf || !buflen || buflen < 8) + return -EINVAL; + + /* + * In order to write this view (system.nfs4_acl_xdr) of our ZFS ACL + * we will need to: + * - Decode supplied data (system.nfs4_acl_xdr) to struct nfs4_acl + * - Encode struct nfs4_acl to DACL XDR + * - Write the DACL XDR. The nfsd will store it as the NA41_NAME. + * + * To perform the first step we will also need to decode the number + * of ACEs to calculate the size of the buffer required. + */ + + /* Mask out bits from the DACL flag that are not supported by the protocol */ + acl_flag = ntohl(*(p++)) & (ACL4_AUTO_INHERIT | ACL4_PROTECTED | ACL4_DEFAULTED); + ace_cnt = ntohl(*(p++)); + if (ace_cnt > NFS41ACL_MAX_ENTRIES) + return -ERANGE; + + /* Allocate a buffer for the struct nfs4_acl */ + acl = kzalloc(nfs4_acl_bytes(ace_cnt), GFP_KERNEL); + if (!acl) + return -ENOMEM; + + /* Decode supplied data (system.nfs4_acl_xdr) to struct nfs4_acl */ + acl->flag = acl_flag; + acl->naces = ace_cnt; + error = convert_nfs41xdr_to_nfs40_acl(p++, buflen - (2 * sizeof(u32)), acl); + if (error) + goto acl_out; + + /* Encode struct nfs4_acl to DACL XDR */ + error = nfs4_encode_acl_to_buf(acl, &xdrbuf, &xdrbuflen); + if (error) + goto acl_out; + + /* Write the DACL XDR. */ + error = nfs4_proc_set_acl(inode, xdrbuf, xdrbuflen, NFS4ACL_DACL); + kfree(xdrbuf); + +acl_out: + kfree(acl); + return error; +} + +/* + * Allow the client to READ the NA41_NAME ("system.nfs4_acl_xdr") + */ +static int nfs4_xattr_get_nfs4_acl_xdr(const struct xattr_handler *handler, + struct dentry *unused, struct inode *inode, + const char *key, void *buf, size_t buflen) +{ + int ret = 0; + ssize_t dacl_size, acl_size; + void *dacl_buf = NULL; + + /* + * In order to present this view (system.nfs4_acl_xdr) of our ZFS ACL + * we will need to: + * - Read the DACL + * - Decode DACL to struct nfs4_acl + * - Encode nfs4_acl to system.nfs4_acl_xdr (to be returned) + * + * Even if the caller just requested the size we will have to fetch + * the DACL in order to calculate the size required. + */ + + /* Fetch the DACL size first */ + dacl_size = nfs4_proc_get_acl(inode, NULL, 0, NFS4ACL_DACL); + if (dacl_size <= 0) + return dacl_size; + dacl_buf = kmalloc(dacl_size, GFP_KERNEL); + if (dacl_buf == NULL) + return -ENOMEM; + + /* Read the DACL */ + ret = nfs4_proc_get_acl(inode, dacl_buf, dacl_size, NFS4ACL_DACL); + if (ret < 0) { + pr_err("NFS: %s Failed to read DACL: %d", __func__, ret); + goto dacl_out; + } + + if (!buf || buflen == 0) { + /* + * We just want the size, so decode the number of ACEs + * in the DACL and perform a calculation. + */ + u32 count; + u32 *p = dacl_buf; + + p++; /* Skip the acl_flag */ + count = ntohl(*(p++)); + ret = ACES_TO_XDRSIZE(count); + } else { + /* + * Decode DACL to struct nfs4_acl + */ + struct nfs4_acl *acl = NULL; + + acl_size = nfs4_aclbuf_decode(dacl_buf, dacl_size, NFS4ACL_DACL, &acl); + if (acl_size < 0) { + pr_err("NFS: %s Failed to decode DACL: %zu", __func__, acl_size); + ret = -EINVAL; + goto dacl_out; + } + /* This should be the same as acl_size */ + ret = ACES_TO_XDRSIZE(acl->naces); + if (buflen >= ret) { + int error; + + /* Encode nfs4_acl to system.nfs4_acl_xdr (to be returned) */ + error = generate_nfs41acl_buf(buf, acl, S_ISDIR(inode->i_mode)); + if (error) { + pr_err("NFS: %s generate_nfs41acl_buf returned: %d", __func__, + error); + ret = error; + } + } else { + pr_err("NFS: %s Supplied buffer too small: %zu vs %d", __func__, + buflen, ret); + ret = -EINVAL; + } + + kfree(acl); + } + + +dacl_out: + kfree(dacl_buf); + return ret; +} + +static bool nfs4_xattr_list_nfs4_acl_xdr(struct dentry *dentry) +{ + return nfs4_server_supports_acls(NFS_SB(dentry->d_sb), NFS4ACL_DACL); +} +#endif /* CONFIG_TRUENAS */ + #endif #ifdef CONFIG_NFS_V4_SECURITY_LABEL @@ -10951,6 +11460,15 @@ static const struct xattr_handler nfs4_xattr_nfs4_sacl_handler = { .get = nfs4_xattr_get_nfs4_sacl, .set = nfs4_xattr_set_nfs4_sacl, }; + +#if CONFIG_TRUENAS +static const struct xattr_handler nfs4_xattr_nfs4_acl_xdr_handler = { + .name = NA41_NAME, + .list = nfs4_xattr_list_nfs4_acl_xdr, + .get = nfs4_xattr_get_nfs4_acl_xdr, + .set = nfs4_xattr_set_nfs4_acl_xdr, +}; +#endif /* CONFIG_TRUENAS */ #endif #ifdef CONFIG_NFS_V4_2 @@ -10966,6 +11484,9 @@ const struct xattr_handler * const nfs4_xattr_handlers[] = { #if defined(CONFIG_NFS_V4_1) &nfs4_xattr_nfs4_dacl_handler, &nfs4_xattr_nfs4_sacl_handler, +#if CONFIG_TRUENAS + &nfs4_xattr_nfs4_acl_xdr_handler, +#endif /* CONFIG_TRUENAS */ #endif #ifdef CONFIG_NFS_V4_SECURITY_LABEL &nfs4_xattr_nfs4_label_handler, diff --git a/fs/nfs_common/nfs41acl_xdr.h b/fs/nfs_common/nfs41acl_xdr.h new file mode 100644 index 000000000000..31d2f5456a07 --- /dev/null +++ b/fs/nfs_common/nfs41acl_xdr.h @@ -0,0 +1,67 @@ +#ifndef _NFS41ACL_H_RPCGEN +#define _NFS41ACL_H_RPCGEN + +/* + * Native ZFS NFSv41-style ACL is packed in xattr as + * follows: + * + * struct nfsace4i { + * uint32_t type; RFC 5661 Section 6.2.1.1 + * uint32_t flag; RFC 5661 Section 6.2.1.4 + * uint32_t iflag; + * uint32_t access_mask; RFC 5661 Section 6.2.1.3 + * uint32_t who_id; + * }; + * + * struct nfsacl4 { + * uint32_t acl_flags; RFC 5661 Section 6.4.3.2 + * uint32_t ace_count; + * struct nfsace4i aces<>; + * }; + * + * iflag and who_id combined are sufficent for NFS server to convert into ACE + * who (RFC 5661 Section 6.2.1.5). + */ + +#define NA41_NAME "system.nfs4_acl_xdr" + +#define ACE4_FILE_INHERIT_ACE 0x00000001 +#define ACE4_DIRECTORY_INHERIT_ACE 0x00000002 +#define ACE4_NO_PROPAGATE_INHERIT_ACE 0x00000004 +#define ACE4_INHERIT_ONLY_ACE 0x00000008 +#define ACE4_SUCCESSFUL_ACCESS_ACE_FLAG 0x00000010 +#define ACE4_FAILED_ACCESS_ACE_FLAG 0x00000020 +#define ACE4_IDENTIFIER_GROUP 0x00000040 +#define ACE4_INHERITED_ACE 0x00000080 +#define NFS41_FLAGS (ACE4_DIRECTORY_INHERIT_ACE| \ + ACE4_FILE_INHERIT_ACE| \ + ACE4_NO_PROPAGATE_INHERIT_ACE| \ + ACE4_INHERIT_ONLY_ACE| \ + ACE4_INHERITED_ACE| \ + ACE4_IDENTIFIER_GROUP) + +#define ACEI4_SPECIAL_WHO 0x00000001 +#define ACE4_SPECIAL_OWNER 1 +#define ACE4_SPECIAL_GROUP 2 +#define ACE4_SPECIAL_EVERYONE 3 +#define NACE41_LEN 5 + +#define ACL4_AUTO_INHERIT 0x00000001 +#define ACL4_PROTECTED 0x00000002 +#define ACL4_DEFAULTED 0x00000004 + +/* + * Macros for sanity checks related to XDR and ACL buffer sizes + */ +#define NFS41ACL_MAX_ENTRIES 1024 +#define ACE4SIZE (NACE41_LEN * sizeof(u32)) +#define XDRBASE (2 * sizeof (u32)) + +#define ACES_TO_SIZE(x, y) (x + (y * ACE4SIZE)) +#define SIZE_IS_VALID(x, y) ((x >= ACES_TO_SIZE(y, 0)) && \ + (((x - y) % ACE4SIZE) == 0)) + +#define ACES_TO_XDRSIZE(x) (ACES_TO_SIZE(XDRBASE, x)) +#define XDRSIZE_IS_VALID(x) (SIZE_IS_VALID(x, XDRBASE)) + +#endif /* !_NFS41ACL_H_RPCGEN */ diff --git a/fs/nfs_common/nfsacl.c b/fs/nfs_common/nfsacl.c index ea382b75b26c..429e9932ef1a 100644 --- a/fs/nfs_common/nfsacl.c +++ b/fs/nfs_common/nfsacl.c @@ -28,6 +28,13 @@ #include #include #include +#if CONFIG_TRUENAS +#include "nfs41acl_xdr.h" + +/* Value from zfs/include/os/linux/spl/sys/acl.h */ +#define ACL_IS_DIR 0x20000 +#endif /* CONFIG_TRUENAS */ + MODULE_DESCRIPTION("NFS ACL support"); MODULE_LICENSE("GPL"); @@ -419,3 +426,136 @@ bool nfs_stream_decode_acl(struct xdr_stream *xdr, unsigned int *aclcnt, return true; } EXPORT_SYMBOL_GPL(nfs_stream_decode_acl); + +#if CONFIG_TRUENAS +static int +convert_to_nfs40_ace(u32 *xdrbuf, size_t *remaining, struct nfs4_ace *ace) +{ + int error = 0; + u32 iflag, id; + + if (*remaining < ACE4SIZE) + return -EOVERFLOW; + + ace->type = ntohl(*(xdrbuf++)); + if (ace->type > NFS4_ACE_ACCESS_DENIED_ACE_TYPE) + return -EINVAL; + + ace->flag = ntohl(*(xdrbuf++)); + iflag = ntohl(*(xdrbuf++)); + ace->access_mask = ntohl(*(xdrbuf++)) & NFS4_ACE_MASK_ALL; + id = ntohl(*(xdrbuf++)); + + *remaining -= ACE4SIZE; + + if (iflag & ACEI4_SPECIAL_WHO) { + switch (id) { + case ACE4_SPECIAL_OWNER: + ace->whotype = NFS4_ACL_WHO_OWNER; + break; + case ACE4_SPECIAL_GROUP: + ace->whotype = NFS4_ACL_WHO_GROUP; + break; + case ACE4_SPECIAL_EVERYONE: + ace->whotype = NFS4_ACL_WHO_EVERYONE; + break; + } + } else { + ace->whotype = NFS4_ACL_WHO_NAMED; + if (ace->flag & NFS4_ACE_IDENTIFIER_GROUP) { + ace->who_gid = make_kgid(&init_user_ns, id); + if (!gid_valid(ace->who_gid)) { + error = -EINVAL; + } + } else { + ace->who_uid = make_kuid(&init_user_ns, id); + if (!uid_valid(ace->who_uid)) { + error = -EINVAL; + } + } + } + + return error; +} + +int +convert_nfs41xdr_to_nfs40_acl(u32 *xdrbuf, size_t remaining, struct nfs4_acl *acl) +{ + int error = 0; + int i; + + for (i = 0; i < acl->naces; i++, xdrbuf += NACE41_LEN) { + error = convert_to_nfs40_ace(xdrbuf, &remaining, &acl->aces[i]); + if (error) + break; + } + + return error; +} +EXPORT_SYMBOL_GPL(convert_nfs41xdr_to_nfs40_acl); + +static int +convert_ace_to_nfs41(u32 *p, const struct nfs4_ace *ace) +{ + int error = 0; + u32 iflag = 0, who = -1; + + /* Audit and Alarm are not currently supported */ + if (ace->type > NFS4_ACE_ACCESS_DENIED_ACE_TYPE) + return -EINVAL; + + switch (ace->whotype) { + case NFS4_ACL_WHO_OWNER: + iflag = ACEI4_SPECIAL_WHO; + who = ACE4_SPECIAL_OWNER; + break; + case NFS4_ACL_WHO_GROUP: + iflag = ACEI4_SPECIAL_WHO; + who = ACE4_SPECIAL_GROUP; + break; + case NFS4_ACL_WHO_EVERYONE: + iflag = ACEI4_SPECIAL_WHO; + who = ACE4_SPECIAL_EVERYONE; + break; + case NFS4_ACL_WHO_NAMED: + if (ace->flag & NFS4_ACE_IDENTIFIER_GROUP) + who = (u32)__kgid_val(ace->who_gid); + else + who = (u32)__kuid_val(ace->who_uid); + break; + default: + error = -EINVAL; + } + + *p++ = htonl(ace->type); + *p++ = htonl(ace->flag & NFS41_FLAGS); + *p++ = htonl(iflag); + *p++ = htonl(ace->access_mask & NFS4_ACE_MASK_ALL); + *p++ = htonl(who); + + return error; +} + +int +generate_nfs41acl_buf(u32 *xdrbuf, const struct nfs4_acl *acl, bool isdir) +{ + int error = 0; + int i; + + /* + * first byte is NFS41 Flags. Maybe be zero if these are RFC3530 acls + */ + *xdrbuf++ = htonl(acl->flag | (isdir ? ACL_IS_DIR : 0)); + *xdrbuf++ = htonl(acl->naces); + + for (i = 0; i < acl->naces; i++, xdrbuf += NACE41_LEN) { + error = convert_ace_to_nfs41(xdrbuf, &acl->aces[i]); + if (error) + break; + } + + return error; +} +EXPORT_SYMBOL_GPL(generate_nfs41acl_buf); +#endif /* CONFIG_TRUENAS */ + diff --git a/fs/nfsd/acl.h b/fs/nfsd/acl.h index 4b7324458a94..4d2e2c168c10 100644 --- a/fs/nfsd/acl.h +++ b/fs/nfsd/acl.h @@ -40,14 +40,22 @@ struct svc_fh; struct svc_rqst; struct nfsd_attrs; enum nfs_ftype4; +#if CONFIG_TRUENAS +enum nfs4_acl_type; +#endif /* CONFIG_TRUENAS */ int nfs4_acl_bytes(int entries); int nfs4_acl_get_whotype(char *, u32); __be32 nfs4_acl_write_who(struct xdr_stream *xdr, int who); +void nfsd4_setup_attr(struct dentry *dentry, struct nfsd_attrs *attr); int nfsd4_get_nfs4_acl(struct svc_rqst *rqstp, struct dentry *dentry, +#if CONFIG_TRUENAS + struct nfs4_acl **acl, enum nfs4_acl_type acl_type); +#else struct nfs4_acl **acl); -__be32 nfsd4_acl_to_attr(enum nfs_ftype4 type, struct nfs4_acl *acl, - struct nfsd_attrs *attr); +#endif /* CONFIG_TRUENAS */ +int nfsv4_set_zfacl_from_attr(struct dentry *dentry, + struct nfsd_attrs *attr); #endif /* LINUX_NFS4_ACL_H */ diff --git a/fs/nfsd/nfs3proc.c b/fs/nfsd/nfs3proc.c index 372bdcf5e07a..62630432c4cf 100644 --- a/fs/nfsd/nfs3proc.c +++ b/fs/nfsd/nfs3proc.c @@ -337,7 +337,7 @@ nfsd3_create_file(struct svc_rqst *rqstp, struct svc_fh *fhp, goto out; } - if (!IS_POSIXACL(inode)) + if (!IS_POSIXACL(inode) && !IS_NFSV4ACL(inode)) iap->ia_mode &= ~current_umask(); status = fh_fill_pre_attrs(fhp); diff --git a/fs/nfsd/nfs4acl.c b/fs/nfsd/nfs4acl.c index 96e786b5e544..37399b4557a4 100644 --- a/fs/nfsd/nfs4acl.c +++ b/fs/nfsd/nfs4acl.c @@ -37,11 +37,14 @@ #include #include #include +#include #include "nfsfh.h" #include "nfsd.h" #include "acl.h" #include "vfs.h" +#include "../nfs_common/nfs41acl_xdr.h" +#include /* For convert_nfs41xdr_to_nfs40_acl and generate_nfs41acl_buf */ #define NFS4_ACL_TYPE_DEFAULT 0x01 #define NFS4_ACL_DIR 0x02 @@ -125,8 +128,8 @@ static short ace2type(struct nfs4_ace *); static void _posix_to_nfsv4_one(struct posix_acl *, struct nfs4_acl *, unsigned int); -int -nfsd4_get_nfs4_acl(struct svc_rqst *rqstp, struct dentry *dentry, +static int +get_nfs4_posix_acl(struct svc_rqst *rqstp, struct dentry *dentry, struct nfs4_acl **acl) { struct inode *inode = d_inode(dentry); @@ -176,6 +179,121 @@ nfsd4_get_nfs4_acl(struct svc_rqst *rqstp, struct dentry *dentry, return error; } +static int +get_nfs4_nfsv41xdr_acl(struct svc_rqst *rqstp, struct dentry *dentry, + struct nfs4_acl **pacl, enum nfs4_acl_type acl_type) +{ + int error = 0; + u32 ace_cnt, acl_flag = 0; + u32 *xdr_buf = NULL, *p; + struct nfs4_acl *acl = NULL; + ssize_t len; + size_t xdr_buf_sz = ACES_TO_XDRSIZE(NFS41ACL_MAX_ENTRIES); + + xdr_buf = kzalloc(xdr_buf_sz, GFP_KERNEL); + if (!xdr_buf) + return -ENOMEM; + + len = vfs_getxattr(&nop_mnt_idmap, dentry, NA41_NAME, xdr_buf, xdr_buf_sz); + if (len == 0) { + error = -EOPNOTSUPP; + goto out; + } + + if (len < 0) { + switch (len) { + case -EOPNOTSUPP: + /* ZFS says NFSv4 ACLs not supported */ + error = -EOPNOTSUPP; + goto out; + case -EINVAL: + /* ZFS unhappy with buffer size */ + error = -EINVAL; + goto out; + case -ERANGE: + /* our buffer is too small. This is _very_ unexpected */ + error = -EINVAL; + goto out; + case -EPERM: + case -EACCES: + error = -EPERM; + goto out; + default: + error = -ENOMEM; + goto out; + } + } + + BUG_ON(!(XDRSIZE_IS_VALID(len))); + + switch (acl_type) { + case NFS4ACL_ACL: + /* + * Only NFS 4.0 (RFC 3530) ACLs are to be exported here by the NFS + * server, and so the ACL-wide flags are ignored when generating the + * internal NFS server ACL. + */ + p = xdr_buf + 1; + break; + + case NFS4ACL_DACL: + case NFS4ACL_SACL: + /* + * When we read the vsa_aclflags from the xattr there are some + * values that are not supported by NFS (e.g. ACL_IS_DIR).Mask + * them out. + * + * Fortunately, ACL4_AUTO_INHERIT, ACL4_PROTECTED and + * ACL4_DEFAULTED have the same values as the ZFS equivalents + * (ACL_AUTO_INHERIT, ACL_PROTECTED, ACL_DEFAULTED) so no + * value mapping is required. + */ + p = xdr_buf; + acl_flag = ntohl(*(p++)) & (ACL4_AUTO_INHERIT | ACL4_PROTECTED | ACL4_DEFAULTED); + break; + + default: + /* Should never happen */ + error = -EINVAL; + goto out; + } + + ace_cnt = ntohl(*(p++)); + if (ace_cnt > NFS41ACL_MAX_ENTRIES) { + error = -ERANGE; + goto out; + } + + acl = kzalloc(nfs4_acl_bytes(ace_cnt), GFP_KERNEL); + if (!acl) { + error = -ENOMEM; + goto out; + } + acl->naces = ace_cnt; + acl->flag = acl_flag; + + error = convert_nfs41xdr_to_nfs40_acl(p++, len - (2 * sizeof(u32)), acl); + if (error) + kfree(acl); + else + *pacl = acl; +out: + kfree(xdr_buf); + return (error); +} + +int +nfsd4_get_nfs4_acl(struct svc_rqst *rqstp, struct dentry *dentry, + struct nfs4_acl **acl, enum nfs4_acl_type acl_type) +{ + struct inode *inode = d_inode(dentry); + + if (IS_NFSV4ACL(inode)) + return get_nfs4_nfsv41xdr_acl(rqstp, dentry, acl, acl_type); + else + return get_nfs4_posix_acl(rqstp, dentry, acl); +} + struct posix_acl_summary { unsigned short owner; unsigned short users; @@ -775,26 +893,89 @@ static int nfs4_acl_nfsv4_to_posix(struct nfs4_acl *acl, return ret; } -__be32 nfsd4_acl_to_attr(enum nfs_ftype4 type, struct nfs4_acl *acl, - struct nfsd_attrs *attr) +static __be32 +nfsd4_acl_to_attr_posix(enum nfs_ftype4 type, struct nfs4_acl *acl, + fsacl_t *fsaclp) { int host_error; unsigned int flags = 0; if (!acl) return nfs_ok; - if (type == NF4DIR) flags = NFS4_ACL_DIR; - host_error = nfs4_acl_nfsv4_to_posix(acl, &attr->na_pacl, - &attr->na_dpacl, flags); + host_error = nfs4_acl_nfsv4_to_posix(acl, &fsaclp->posixacl.na_pacl, + &fsaclp->posixacl.na_dpacl, flags); if (host_error == -EINVAL) return nfserr_attrnotsupp; else return nfserrno(host_error); } +static __be32 +nfsd4_acl_to_attr_zfsacl(enum nfs_ftype4 type, struct nfs4_acl *acl, + fsacl_t *fsaclp) +{ + int error; + u32 *xdr_buf = NULL; + size_t len; + + if (!acl) + return nfs_ok; + + if (acl->naces > NFS41ACL_MAX_ENTRIES) + return nfserrno(-ERANGE); + + else if (acl->naces == 0) + return nfserrno(-EINVAL); + + len = ACES_TO_XDRSIZE(acl->naces); + + xdr_buf = kzalloc(len, GFP_KERNEL); + if (!xdr_buf) + return nfserrno(-ENOMEM); + + error = generate_nfs41acl_buf(xdr_buf, acl, type == NF4DIR); + if (error) { + kfree(xdr_buf); + return nfserrno(error); + } + + fsaclp->zfsacl.aclbuf = xdr_buf; + fsaclp->zfsacl.sz = len; + + return nfs_ok; +} + +static __be32 +nfsd4_acl_to_attr_fail(enum nfs_ftype4 type, struct nfs4_acl *acl, + fsacl_t *fsaclp) +{ + if (!acl) + return nfs_ok; + + return nfserr_attrnotsupp; +} + +int +nfsv4_set_zfacl_from_attr(struct dentry *dentry, struct nfsd_attrs *attr) +{ + struct inode *delegated_inode = NULL; + int error; + +retry: + error = __vfs_setxattr_locked(&nop_mnt_idmap, dentry, NA41_NAME, + attr->na_fsacl.zfsacl.aclbuf, + attr->na_fsacl.zfsacl.sz, + XATTR_REPLACE, &delegated_inode); + + if (delegated_inode) + goto retry; + + return error; +} + static short ace2type(struct nfs4_ace *ace) { @@ -875,3 +1056,20 @@ __be32 nfs4_acl_write_who(struct xdr_stream *xdr, int who) WARN_ON_ONCE(1); return nfserr_serverfault; } + +void +nfsd4_setup_attr(struct dentry *dentry, struct nfsd_attrs *attr) +{ + struct inode *inode = d_inode(dentry); + + if (IS_NFSV4ACL(inode)) { + attr->na_acltype = ACL_TYPE_ZFS; + attr->na_conv_fn = nfsd4_acl_to_attr_zfsacl; + } else if (IS_POSIXACL(inode)) { + attr->na_acltype = ACL_TYPE_POSIX; + attr->na_conv_fn = nfsd4_acl_to_attr_posix; + } else { + attr->na_acltype = ACL_TYPE_NONE; + attr->na_conv_fn = nfsd4_acl_to_attr_fail; + } +} diff --git a/fs/nfsd/nfs4proc.c b/fs/nfsd/nfs4proc.c index d32f2dfd148f..ad1dabe50df3 100644 --- a/fs/nfsd/nfs4proc.c +++ b/fs/nfsd/nfs4proc.c @@ -87,8 +87,13 @@ check_attr_support(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, if (!nfsd_attrs_supported(cstate->minorversion, bmval)) return nfserr_attrnotsupp; - if ((bmval[0] & FATTR4_WORD0_ACL) && !IS_POSIXACL(d_inode(dentry))) + if ((bmval[0] & FATTR4_WORD0_ACL) && !IS_POSIXACL(d_inode(dentry)) && + !IS_NFSV4ACL(d_inode(dentry))) return nfserr_attrnotsupp; +#if CONFIG_TRUENAS + if ((bmval[1] & FATTR4_WORD1_DACL) && !IS_NFSV4ACL(d_inode(dentry))) + return nfserr_attrnotsupp; +#endif /* CONFIG_TRUENAS */ if ((bmval[2] & FATTR4_WORD2_SECURITY_LABEL) && !(exp->ex_flags & NFSEXP_SECURITY_LABEL)) return nfserr_attrnotsupp; @@ -237,6 +242,7 @@ nfsd4_create_file(struct svc_rqst *rqstp, struct svc_fh *fhp, struct nfsd_attrs attrs = { .na_iattr = iap, .na_seclabel = &open->op_label, + .na_acltype = ACL_TYPE_NONE }; struct dentry *parent, *child; __u32 v_mtime, v_atime; @@ -259,8 +265,10 @@ nfsd4_create_file(struct svc_rqst *rqstp, struct svc_fh *fhp, if (host_err) return nfserrno(host_err); - if (is_create_with_attrs(open)) - nfsd4_acl_to_attr(NF4REG, open->op_acl, &attrs); + if (is_create_with_attrs(open)) { + nfsd4_setup_attr(parent, &attrs); + attrs.na_conv_fn(NF4REG, open->op_acl, &attrs.na_fsacl); + } inode_lock_nested(inode, I_MUTEX_PARENT); @@ -343,7 +351,7 @@ nfsd4_create_file(struct svc_rqst *rqstp, struct svc_fh *fhp, goto out; } - if (!IS_POSIXACL(inode)) + if (!IS_POSIXACL(inode) && !IS_NFSV4ACL(inode)) iap->ia_mode &= ~current_umask(); status = fh_fill_pre_attrs(fhp); @@ -372,8 +380,15 @@ nfsd4_create_file(struct svc_rqst *rqstp, struct svc_fh *fhp, if (attrs.na_labelerr) open->op_bmval[2] &= ~FATTR4_WORD2_SECURITY_LABEL; +#if CONFIG_TRUENAS + if (attrs.na_aclerr) { + open->op_bmval[0] &= ~FATTR4_WORD0_ACL; + open->op_bmval[1] &= ~FATTR4_WORD1_DACL; + } +#else if (attrs.na_aclerr) open->op_bmval[0] &= ~FATTR4_WORD0_ACL; +#endif /* CONFIG_TRUENAS */ out: inode_unlock(inode); nfsd_attrs_free(&attrs); @@ -780,6 +795,7 @@ nfsd4_create(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, struct nfsd_attrs attrs = { .na_iattr = &create->cr_iattr, .na_seclabel = &create->cr_label, + .na_acltype = ACL_TYPE_NONE }; struct svc_fh resfh; __be32 status; @@ -796,7 +812,9 @@ nfsd4_create(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, if (status) return status; - status = nfsd4_acl_to_attr(create->cr_type, create->cr_acl, &attrs); + nfsd4_setup_attr(cstate->current_fh.fh_dentry, &attrs); + status = attrs.na_conv_fn(create->cr_type, create->cr_acl, + &attrs.na_fsacl); current->fs->umask = create->cr_umask; switch (create->cr_type) { case NF4LNK: @@ -855,8 +873,15 @@ nfsd4_create(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, if (attrs.na_labelerr) create->cr_bmval[2] &= ~FATTR4_WORD2_SECURITY_LABEL; +#if CONFIG_TRUENAS + if (attrs.na_aclerr) { + create->cr_bmval[0] &= ~FATTR4_WORD0_ACL; + create->cr_bmval[1] &= ~FATTR4_WORD1_DACL; + } +#else if (attrs.na_aclerr) create->cr_bmval[0] &= ~FATTR4_WORD0_ACL; +#endif /* CONFIG_TRUENAS */ set_change_info(&create->cr_cinfo, &cstate->current_fh); fh_dup2(&cstate->current_fh, &resfh); out: @@ -1132,6 +1157,7 @@ nfsd4_setattr(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, struct nfsd_attrs attrs = { .na_iattr = &setattr->sa_iattr, .na_seclabel = &setattr->sa_label, + .na_acltype = ACL_TYPE_NONE }; struct inode *inode; __be32 status = nfs_ok; @@ -1156,8 +1182,9 @@ nfsd4_setattr(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate, goto out; inode = cstate->current_fh.fh_dentry->d_inode; - status = nfsd4_acl_to_attr(S_ISDIR(inode->i_mode) ? NF4DIR : NF4REG, - setattr->sa_acl, &attrs); + nfsd4_setup_attr(cstate->current_fh.fh_dentry, &attrs); + status = attrs.na_conv_fn(S_ISDIR(inode->i_mode) ? NF4DIR : NF4REG, + setattr->sa_acl, &attrs.na_fsacl); if (status) goto out; @@ -2907,6 +2934,10 @@ static u32 nfsd4_getattr_rsize(const struct svc_rqst *rqstp, return nfsd4_max_payload(rqstp); if (bmap0 & FATTR4_WORD0_FS_LOCATIONS) return nfsd4_max_payload(rqstp); +#if CONFIG_TRUENAS + if (bmap1 & FATTR4_WORD1_DACL) + return nfsd4_max_payload(rqstp); +#endif /* CONFIG_TRUENAS */ if (bmap1 & FATTR4_WORD1_OWNER) { ret += IDMAP_NAMESZ + 4; diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c index f118921250c3..e6d8c3e7b6ba 100644 --- a/fs/nfsd/nfs4xdr.c +++ b/fs/nfsd/nfs4xdr.c @@ -318,11 +318,36 @@ nfsd4_decode_nfsace4(struct nfsd4_compoundargs *argp, struct nfs4_ace *ace) /* A counted array of nfsace4's */ static noinline __be32 +#if CONFIG_TRUENAS +nfsd4_decode_acl(struct nfsd4_compoundargs *argp, struct nfs4_acl **acl, + enum nfs4_acl_type acl_type) +{ + struct nfs4_ace *ace; + __be32 status; + u32 count; + u32 acl_flag = 0; + + switch (acl_type) { + case NFS4ACL_NONE: + case NFS4ACL_ACL: + break; + + case NFS4ACL_DACL: + case NFS4ACL_SACL: + /* + * Per RFC-8881 Section 6.4.3.2 nfsacl41 has a leading aclflag4 + */ + if (xdr_stream_decode_u32(argp->xdr, &acl_flag) < 0) + return nfserr_bad_xdr; + break; + } +#else nfsd4_decode_acl(struct nfsd4_compoundargs *argp, struct nfs4_acl **acl) { struct nfs4_ace *ace; __be32 status; u32 count; +#endif /* CONFIG_TRUENAS */ if (xdr_stream_decode_u32(argp->xdr, &count) < 0) return nfserr_bad_xdr; @@ -339,6 +364,9 @@ nfsd4_decode_acl(struct nfsd4_compoundargs *argp, struct nfs4_acl **acl) if (*acl == NULL) return nfserr_jukebox; +#if CONFIG_TRUENAS + (*acl)->flag = acl_flag; +#endif /* CONFIG_TRUENAS */ (*acl)->naces = count; for (ace = (*acl)->aces; ace < (*acl)->aces + count; ace++) { status = nfsd4_decode_nfsace4(argp, ace); @@ -411,7 +439,11 @@ nfsd4_decode_fattr4(struct nfsd4_compoundargs *argp, u32 *bmval, u32 bmlen, iattr->ia_valid |= ATTR_SIZE; } if (bmval[0] & FATTR4_WORD0_ACL) { +#if CONFIG_TRUENAS + status = nfsd4_decode_acl(argp, acl, NFS4ACL_ACL); +#else status = nfsd4_decode_acl(argp, acl); +#endif /* CONFIG_TRUENAS */ if (status) return status; } else @@ -500,6 +532,16 @@ nfsd4_decode_fattr4(struct nfsd4_compoundargs *argp, u32 *bmval, u32 bmlen, return nfserr_bad_xdr; } } +#if CONFIG_TRUENAS + /* + * This is based on the FATTR4_WORD0_ACL handling above. + */ + if (bmval[1] & FATTR4_WORD1_DACL) { + status = nfsd4_decode_acl(argp, acl, NFS4ACL_DACL); + if (status) + return status; + } +#endif /* CONFIG_TRUENAS */ label->len = 0; if (IS_ENABLED(CONFIG_NFSD_V4_SECURITY_LABEL) && bmval[2] & FATTR4_WORD2_SECURITY_LABEL) { @@ -2967,8 +3009,13 @@ static __be32 nfsd4_encode_fattr4_supported_attrs(struct xdr_stream *xdr, u32 supp[3]; memcpy(supp, nfsd_suppattrs[minorversion], sizeof(supp)); - if (!IS_POSIXACL(d_inode(args->dentry))) + if (!IS_POSIXACL(d_inode(args->dentry)) && + !IS_NFSV4ACL(d_inode(args->dentry))) supp[0] &= ~FATTR4_WORD0_ACL; +#if CONFIG_TRUENAS + if (!IS_NFSV4ACL(d_inode(args->dentry))) + supp[1] &= ~FATTR4_WORD1_DACL; +#endif /* CONFIG_TRUENAS */ if (!args->contextsupport) supp[2] &= ~FATTR4_WORD2_SECURITY_LABEL; @@ -3519,6 +3566,13 @@ nfsd4_encode_fattr4(struct svc_rqst *rqstp, struct xdr_stream *xdr, int attrlen_offset; u32 attrmask[3]; int err; +#if CONFIG_TRUENAS + /* + * Even though we expect *either* ACL or DACL to be fetched, + * lets be cautious and use separate variables. + */ + struct nfs4_acl *dacl = NULL; +#endif /* CONFIG_TRUENAS */ struct nfsd4_compoundres *resp = rqstp->rq_resp; u32 minorversion = resp->cstate.minorversion; struct path path = { @@ -3599,7 +3653,19 @@ nfsd4_encode_fattr4(struct svc_rqst *rqstp, struct xdr_stream *xdr, args.fhp = fhp; if (attrmask[0] & FATTR4_WORD0_ACL) { +#if CONFIG_TRUENAS + /* + * In TrueNAS we have renamed the existing nfsd4_get_nfs4_acl + * to get_nfs4_posix_acl, so that we can implement a nfsd4_get_nfs4_acl + * that can be based either on POSIX ACL or ZFS ACL. + * + * Add a acl_type parameter so that the same underlying function + * can be adapted to get either ACL or DACL. + */ + err = nfsd4_get_nfs4_acl(rqstp, dentry, &args.acl, NFS4ACL_ACL); +#else err = nfsd4_get_nfs4_acl(rqstp, dentry, &args.acl); +#endif /* CONFIG_TRUENAS */ if (err == -EOPNOTSUPP) attrmask[0] &= ~FATTR4_WORD0_ACL; else if (err == -EINVAL) { @@ -3609,6 +3675,19 @@ nfsd4_encode_fattr4(struct svc_rqst *rqstp, struct xdr_stream *xdr, goto out_nfserr; } +#if CONFIG_TRUENAS + if (attrmask[1] & FATTR4_WORD1_DACL) { + err = nfsd4_get_nfs4_acl(rqstp, dentry, &dacl, NFS4ACL_DACL); + if (err == -EOPNOTSUPP) + attrmask[1] &= ~FATTR4_WORD1_DACL; + else if (err == -EINVAL) { + status = nfserr_attrnotsupp; + goto out; + } else if (err != 0) + goto out_nfserr; + } +#endif /* CONFIG_TRUENAS */ + args.contextsupport = false; #ifdef CONFIG_NFSD_V4_SECURITY_LABEL @@ -3648,6 +3727,51 @@ nfsd4_encode_fattr4(struct svc_rqst *rqstp, struct xdr_stream *xdr, if (status != nfs_ok) goto out; } +#if CONFIG_TRUENAS + /* See FATTR4_WORD0_ACL above */ + if (attrmask[1] & FATTR4_WORD1_DACL) { + struct nfs4_ace *ace; + __be32 *p; + + if (dacl == NULL) { + p = xdr_reserve_space(xdr, 4); + if (!p) + goto out_resource; + + *p++ = cpu_to_be32(0); + goto out_dacl; + } + p = xdr_reserve_space(xdr, 4); + if (!p) + goto out_resource; + *p++ = cpu_to_be32(dacl->flag); + + p = xdr_reserve_space(xdr, 4); + if (!p) + goto out_resource; + *p++ = cpu_to_be32(dacl->naces); + + for (ace = dacl->aces; ace < dacl->aces + dacl->naces; ace++) { + p = xdr_reserve_space(xdr, 4*3); + if (!p) + goto out_resource; + *p++ = cpu_to_be32(ace->type); + *p++ = cpu_to_be32(ace->flag); + *p++ = cpu_to_be32(ace->access_mask & + NFS4_ACE_MASK_ALL); + if (ace->whotype != NFS4_ACL_WHO_NAMED) + status = nfs4_acl_write_who(xdr, ace->whotype); + else if (ace->flag & NFS4_ACE_IDENTIFIER_GROUP) + status = nfsd4_encode_group(xdr, rqstp, ace->who_gid); + else + status = nfsd4_encode_user(xdr, rqstp, ace->who_uid); + + if (status) + goto out; + } + } +out_dacl: +#endif /* CONFIG_TRUENAS */ *attrlen_p = cpu_to_be32(xdr->buf->len - attrlen_offset - XDR_UNIT); status = nfs_ok; @@ -3657,6 +3781,9 @@ nfsd4_encode_fattr4(struct svc_rqst *rqstp, struct xdr_stream *xdr, security_release_secctx(args.context, args.contextlen); #endif /* CONFIG_NFSD_V4_SECURITY_LABEL */ kfree(args.acl); +#if CONFIG_TRUENAS + kfree(dacl); +#endif /* CONFIG_TRUENAS */ if (tempfh) { fh_put(tempfh); kfree(tempfh); diff --git a/fs/nfsd/nfsd.h b/fs/nfsd/nfsd.h index 4b56ba1e8e48..7e03bbbe084e 100644 --- a/fs/nfsd/nfsd.h +++ b/fs/nfsd/nfsd.h @@ -440,8 +440,13 @@ enum { #define NFSD4_1_SUPPORTED_ATTRS_WORD0 \ NFSD4_SUPPORTED_ATTRS_WORD0 +#if CONFIG_TRUENAS +#define NFSD4_1_SUPPORTED_ATTRS_WORD1 \ + (NFSD4_SUPPORTED_ATTRS_WORD1 | PNFSD_SUPPORTED_ATTRS_WORD1 | FATTR4_WORD1_DACL) +#else #define NFSD4_1_SUPPORTED_ATTRS_WORD1 \ (NFSD4_SUPPORTED_ATTRS_WORD1 | PNFSD_SUPPORTED_ATTRS_WORD1) +#endif /* CONFIG_TRUENAS */ #define NFSD4_1_SUPPORTED_ATTRS_WORD2 \ (NFSD4_SUPPORTED_ATTRS_WORD2 | PNFSD_SUPPORTED_ATTRS_WORD2 | \ @@ -516,10 +521,17 @@ static inline bool nfsd_attrs_supported(u32 minorversion, const u32 *bmval) */ #define NFSD_WRITEABLE_ATTRS_WORD0 \ (FATTR4_WORD0_SIZE | FATTR4_WORD0_ACL) +#if CONFIG_TRUENAS +#define NFSD_WRITEABLE_ATTRS_WORD1 \ + (FATTR4_WORD1_MODE | FATTR4_WORD1_OWNER | FATTR4_WORD1_OWNER_GROUP \ + | FATTR4_WORD1_TIME_ACCESS_SET | FATTR4_WORD1_TIME_CREATE \ + | FATTR4_WORD1_TIME_MODIFY_SET | FATTR4_WORD1_DACL) +#else #define NFSD_WRITEABLE_ATTRS_WORD1 \ (FATTR4_WORD1_MODE | FATTR4_WORD1_OWNER | FATTR4_WORD1_OWNER_GROUP \ | FATTR4_WORD1_TIME_ACCESS_SET | FATTR4_WORD1_TIME_CREATE \ | FATTR4_WORD1_TIME_MODIFY_SET) +#endif /* CONFIG_TRUENAS */ #ifdef CONFIG_NFSD_V4_SECURITY_LABEL #define MAYBE_FATTR4_WORD2_SECURITY_LABEL \ FATTR4_WORD2_SECURITY_LABEL diff --git a/fs/nfsd/vfs.c b/fs/nfsd/vfs.c index d6d4f2a0e898..eb8d8bc31641 100644 --- a/fs/nfsd/vfs.c +++ b/fs/nfsd/vfs.c @@ -582,15 +582,30 @@ nfsd_setattr(struct svc_rqst *rqstp, struct svc_fh *fhp, if (attr->na_seclabel && attr->na_seclabel->len) attr->na_labelerr = security_inode_setsecctx(dentry, attr->na_seclabel->data, attr->na_seclabel->len); - if (IS_ENABLED(CONFIG_FS_POSIX_ACL) && attr->na_pacl) - attr->na_aclerr = set_posix_acl(&nop_mnt_idmap, - dentry, ACL_TYPE_ACCESS, - attr->na_pacl); - if (IS_ENABLED(CONFIG_FS_POSIX_ACL) && - !attr->na_aclerr && attr->na_dpacl && S_ISDIR(inode->i_mode)) - attr->na_aclerr = set_posix_acl(&nop_mnt_idmap, - dentry, ACL_TYPE_DEFAULT, - attr->na_dpacl); + + switch(attr->na_acltype) { + case ACL_TYPE_POSIX: + if (IS_ENABLED(CONFIG_FS_POSIX_ACL) && attr->na_fsacl.posixacl.na_pacl) + attr->na_aclerr = set_posix_acl(&nop_mnt_idmap, + dentry, ACL_TYPE_ACCESS, + attr->na_fsacl.posixacl.na_pacl); + if (IS_ENABLED(CONFIG_FS_POSIX_ACL) && + !attr->na_aclerr && attr->na_fsacl.posixacl.na_dpacl && + S_ISDIR(inode->i_mode)) + attr->na_aclerr = set_posix_acl(&nop_mnt_idmap, + dentry, ACL_TYPE_DEFAULT, + attr->na_fsacl.posixacl.na_dpacl); + break; + case ACL_TYPE_ZFS: + if (attr->na_fsacl.zfsacl.aclbuf) + attr->na_aclerr = nfsv4_set_zfacl_from_attr(dentry, attr); + break; + case ACL_TYPE_NONE: + break; + default: + BUG(); + }; + out_fill_attrs: /* * RFC 1813 Section 3.3.2 does not mandate that an NFS server @@ -1480,7 +1495,7 @@ nfsd_create_locked(struct svc_rqst *rqstp, struct svc_fh *fhp, iap->ia_mode = 0; iap->ia_mode = (iap->ia_mode & S_IALLUGO) | type; - if (!IS_POSIXACL(dirp)) + if (!IS_POSIXACL(dirp) && !IS_NFSV4ACL(dirp)) iap->ia_mode &= ~current_umask(); err = 0; @@ -2566,6 +2581,20 @@ nfsd_permission(struct svc_cred *cred, struct svc_export *exp, err = inode_permission(&nop_mnt_idmap, inode, acc & (MAY_READ | MAY_WRITE | MAY_EXEC)); + /* + * See RFC 5661 Section 6.2.1.3.2 + * Allow NFSv4 ACL to override normal delete permission + * In this case REMOVE is granted if DELETE is granted on file + * or DELETE_CHILD is granted on parent. + */ + if ((err == -EACCES) && IS_NFSV4ACL(inode) && + (acc == NFSD_MAY_REMOVE)) { + err = inode_permission(&nop_mnt_idmap, inode, MAY_DELETE); + if (err == -EACCES) + err = inode_permission(&nop_mnt_idmap, d_inode(dentry->d_parent), + MAY_DELETE_CHILD); + } + /* Allow read access to binaries even when mode 111 */ if (err == -EACCES && S_ISREG(inode->i_mode) && (acc == (NFSD_MAY_READ | NFSD_MAY_OWNER_OVERRIDE) || diff --git a/fs/nfsd/vfs.h b/fs/nfsd/vfs.h index 3ff146522556..7602eb0e2237 100644 --- a/fs/nfsd/vfs.h +++ b/fs/nfsd/vfs.h @@ -45,21 +45,43 @@ struct nfsd_file; */ typedef int (*nfsd_filldir_t)(void *, const char *, int, loff_t, u64, unsigned); +enum acltype { ACL_TYPE_NONE, ACL_TYPE_POSIX, ACL_TYPE_ZFS }; +typedef struct zacl { u32 *aclbuf; size_t sz; } zacl_t; +typedef struct pacl { struct posix_acl *na_pacl; struct posix_acl *na_dpacl;} pacl_t; +typedef union fsacl { zacl_t zfsacl; pacl_t posixacl; } fsacl_t; +typedef __be32(*aclconv_t)(enum nfs_ftype4, struct nfs4_acl *, fsacl_t *); + /* nfsd/vfs.c */ struct nfsd_attrs { struct iattr *na_iattr; /* input */ struct xdr_netobj *na_seclabel; /* input */ - struct posix_acl *na_pacl; /* input */ - struct posix_acl *na_dpacl; /* input */ + fsacl_t na_fsacl; + enum acltype na_acltype; int na_labelerr; /* output */ int na_aclerr; /* output */ + aclconv_t na_conv_fn; }; static inline void nfsd_attrs_free(struct nfsd_attrs *attrs) { - posix_acl_release(attrs->na_pacl); - posix_acl_release(attrs->na_dpacl); + switch(attrs->na_acltype) { + case ACL_TYPE_POSIX: + posix_acl_release(attrs->na_fsacl.posixacl.na_pacl); + posix_acl_release(attrs->na_fsacl.posixacl.na_dpacl); + break; + case ACL_TYPE_ZFS: + kfree(attrs->na_fsacl.zfsacl.aclbuf); + attrs->na_fsacl.zfsacl.aclbuf = NULL; + attrs->na_fsacl.zfsacl.sz = 0; + break; + case ACL_TYPE_NONE: + break; + default: + BUG(); + }; + + attrs->na_acltype = ACL_TYPE_NONE; } static inline bool nfsd_attrs_valid(struct nfsd_attrs *attrs) diff --git a/fs/smb/client/Makefile b/fs/smb/client/Makefile index 22023e30915b..ac3b2bbbc0e1 100644 --- a/fs/smb/client/Makefile +++ b/fs/smb/client/Makefile @@ -12,7 +12,7 @@ cifs-y := trace.o cifsfs.o cifs_debug.o connect.o dir.o file.o \ smb2ops.o smb2maperror.o smb2transport.o \ smb2misc.o smb2pdu.o smb2inode.o smb2file.o cifsacl.o fs_context.o \ dns_resolve.o cifs_spnego_negtokeninit.asn1.o asn1.o \ - namespace.o reparse.o + namespace.o reparse.o truenas_streams.o $(obj)/asn1.o: $(obj)/cifs_spnego_negtokeninit.asn1.h diff --git a/fs/smb/client/cifs_debug.c b/fs/smb/client/cifs_debug.c index e03c890de0a0..bf1b175af4e0 100644 --- a/fs/smb/client/cifs_debug.c +++ b/fs/smb/client/cifs_debug.c @@ -26,6 +26,9 @@ #include "smbdirect.h" #endif #include "cifs_swn.h" +#ifdef CONFIG_TRUENAS +#include "nfs41acl_xdr.h" +#endif void cifs_dump_mem(char *label, void *data, int length) @@ -845,6 +848,11 @@ static const struct proc_ops cifs_security_flags_proc_ops; static const struct proc_ops cifs_linux_ext_proc_ops; static const struct proc_ops cifs_mount_params_proc_ops; +#ifdef CONFIG_TRUENAS +static const struct proc_ops cifs_zfsacl_flags_proc_ops; +static const struct proc_ops cifs_stream_samba_compat; +#endif + void cifs_proc_init(void) { @@ -870,6 +878,14 @@ cifs_proc_init(void) proc_create("mount_params", 0444, proc_fs_cifs, &cifs_mount_params_proc_ops); +#ifdef CONFIG_TRUENAS + proc_create("zfsacl_configuration_flags", 0644, proc_fs_cifs, + &cifs_zfsacl_flags_proc_ops); + + proc_create("stream_samba_compat", 0644, proc_fs_cifs, + &cifs_stream_samba_compat); +#endif + #ifdef CONFIG_CIFS_DFS_UPCALL proc_create("dfscache", 0644, proc_fs_cifs, &dfscache_proc_ops); #endif @@ -910,9 +926,15 @@ cifs_proc_clean(void) remove_proc_entry("LookupCacheEnabled", proc_fs_cifs); remove_proc_entry("mount_params", proc_fs_cifs); +#ifdef CONFIG_TRUENAS + remove_proc_entry("zfsacl_configuration_flags", proc_fs_cifs); + remove_proc_entry("stream_samba_compat", proc_fs_cifs); +#endif + #ifdef CONFIG_CIFS_DFS_UPCALL remove_proc_entry("dfscache", proc_fs_cifs); #endif + #ifdef CONFIG_CIFS_SMB_DIRECT remove_proc_entry("rdma_readwrite_threshold", proc_fs_cifs); remove_proc_entry("smbd_max_frmr_depth", proc_fs_cifs); @@ -1161,6 +1183,129 @@ static const struct proc_ops cifs_security_flags_proc_ops = { .proc_write = cifs_security_flags_proc_write, }; +#ifdef CONFIG_TRUENAS +static int cifs_stream_compat_proc_show(struct seq_file *m, void *v) +{ + seq_printf(m, "%u\n", streams_samba_compat_enabled); + return 0; +} + +static int cifs_stream_compat_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, cifs_stream_compat_proc_show, NULL); +} + +static ssize_t cifs_stream_compat_proc_write(struct file *file, + const char __user *buffer, + size_t count, + loff_t *ppos) +{ + int rc; + unsigned int enabled; + char enabled_string[4] = { 0 }; + + if (count >= sizeof(enabled_string)) + return -EINVAL; + + if (copy_from_user(enabled_string, buffer, count)) + return -EFAULT; + + rc = kstrtouint(enabled_string, 0, &enabled); + if (rc) { + cifs_dbg(VFS, "failed to convert value [%s] to int\n", + enabled_string); + return rc; + } + + if (enabled > 1) { + cifs_dbg(VFS, "Value must be 1 or 0\n"); + return -EINVAL; + } + + streams_samba_compat_enabled = enabled; + return count; +} + +static const struct proc_ops cifs_stream_samba_compat = { + .proc_open = cifs_stream_compat_proc_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_release = single_release, + .proc_write = cifs_stream_compat_proc_write, +}; + +static int cifs_zfsacl_flags_proc_show(struct seq_file *m, void *v) +{ + seq_printf(m, "0x%x\n", global_zfsaclflags); + return 0; +} + +static int cifs_zfsacl_flags_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, cifs_zfsacl_flags_proc_show, NULL); +} + +static ssize_t cifs_zfsacl_flags_proc_write(struct file *file, + const char __user *buffer, + size_t count, + loff_t *ppos) +{ + int rc; + unsigned int flags, idmap_flags; + char flags_string[6] = { 0 }; + + if (count >= sizeof(flags_string)) + return -EINVAL; + + if (copy_from_user(flags_string, buffer, count)) + return -EFAULT; + + rc = kstrtouint(flags_string, 0, &flags); + if (rc) { + cifs_dbg(VFS, "failed to convert flags [%s] to int\n", + flags_string); + return rc; + } + + if (flags & ~MODFLAG_ALL) { + cifs_dbg(VFS, "Invalid flags: 0x%08x\n", flags & ~MODFLAG_ALL); + return -EINVAL; + } + + idmap_flags = flags & MODFLAG_ALL_IDMAP; + + if (idmap_flags == 0) { + cifs_dbg(VFS, "At least one idmap-related flag must be set"); + return -EINVAL; + } + + if ((idmap_flags == MODFLAG_ALL_IDMAP) || + (idmap_flags == (MODFLAG_FAIL_UNKNOWN_SID | MODFLAG_SKIP_UNKNOWN_SID)) || + (idmap_flags == (MODFLAG_FAIL_UNKNOWN_SID | MODFLAG_MAP_UNKNOWN_SID)) || + (idmap_flags == (MODFLAG_SKIP_UNKNOWN_SID | MODFLAG_MAP_UNKNOWN_SID))) { + cifs_dbg(VFS, "Only one idmap-related flag may be set. Current settings: " + "fail_unknown_sid: %s, skip_unknown_sid: %s, map_unknown_sid: %s, " + "raw: 0x%08x\n", + idmap_flags & MODFLAG_FAIL_UNKNOWN_SID ? "true" : "false", + idmap_flags & MODFLAG_SKIP_UNKNOWN_SID ? "true" : "false", + idmap_flags & MODFLAG_MAP_UNKNOWN_SID ? "true" : "false", + idmap_flags); + return -EINVAL; + } + + global_zfsaclflags = flags; + return count; +} + +static const struct proc_ops cifs_zfsacl_flags_proc_ops = { + .proc_open = cifs_zfsacl_flags_proc_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_release = single_release, + .proc_write = cifs_zfsacl_flags_proc_write, +}; +#endif + /* To make it easier to debug, can help to show mount params */ static int cifs_mount_params_proc_show(struct seq_file *m, void *v) { diff --git a/fs/smb/client/cifsacl.c b/fs/smb/client/cifsacl.c index 1d294d53f662..ea4c7c2acaee 100644 --- a/fs/smb/client/cifsacl.c +++ b/fs/smb/client/cifsacl.c @@ -25,10 +25,20 @@ #include "fs_context.h" #include "cifs_fs_sb.h" #include "cifs_unicode.h" +#ifdef CONFIG_TRUENAS +#include "nfs41acl_xdr.h" +#endif /* security id for everyone/world system group */ static const struct smb_sid sid_everyone = { 1, 1, {0, 0, 0, 0, 0, 1}, {0} }; +#ifdef CONFIG_TRUENAS +static const struct smb_sid sid_creator_owner = { + 1, 1, {0, 0, 0, 0, 0, 3}, {0} }; + +static const struct smb_sid sid_creator_group = { + 1, 1, {0, 0, 0, 0, 0, 3}, {cpu_to_le32(1)} }; +#endif /* CONFIG_TRUENAS */ /* security id for Authenticated Users system group */ static const struct smb_sid sid_authusers = { 1, 1, {0, 0, 0, 0, 0, 5}, {cpu_to_le32(11)} }; @@ -1809,3 +1819,1132 @@ int cifs_set_acl(struct mnt_idmap *idmap, struct dentry *dentry, return -EOPNOTSUPP; #endif } + +#ifdef CONFIG_TRUENAS +enum account_special_sid_type { + ACCOUNT_SID_UNKNOWN, + ACCOUNT_SID_UNIX_USER, + ACCOUNT_SID_UNIX_GROUP, + ACCOUNT_SID_NFS_USER, + ACCOUNT_SID_NFS_GROUP, +}; + +unsigned int global_zfsaclflags = MODFLAG_DEFAULTS; + +static const struct { + u32 nfs_perm; + u32 smb_perm; +} nfsperm2smb[] = { + { ACE4_READ_DATA, FILE_READ_DATA}, + { ACE4_WRITE_DATA, FILE_WRITE_DATA}, + { ACE4_APPEND_DATA, FILE_APPEND_DATA}, + { ACE4_READ_NAMED_ATTRS, FILE_READ_EA}, + { ACE4_WRITE_NAMED_ATTRS, FILE_WRITE_EA}, + { ACE4_EXECUTE, FILE_EXECUTE}, + { ACE4_DELETE_CHILD, FILE_DELETE_CHILD}, + { ACE4_READ_ATTRIBUTES, FILE_READ_ATTRIBUTES}, + { ACE4_WRITE_ATTRIBUTES, FILE_WRITE_ATTRIBUTES}, + { ACE4_DELETE, DELETE}, + { ACE4_READ_ACL, READ_CONTROL}, + { ACE4_WRITE_ACL, WRITE_DAC}, + { ACE4_WRITE_OWNER, WRITE_OWNER}, + { ACE4_SYNCHRONIZE, SYNCHRONIZE}, +}; + +static const struct { + u32 nfs_flag; + u8 smb_flag; +} nfsflag2smb[] = { + { ACE4_FILE_INHERIT_ACE, OBJECT_INHERIT_ACE}, + { ACE4_DIRECTORY_INHERIT_ACE, CONTAINER_INHERIT_ACE}, + { ACE4_NO_PROPAGATE_INHERIT_ACE, NO_PROPAGATE_INHERIT_ACE}, + { ACE4_INHERIT_ONLY_ACE, INHERIT_ONLY_ACE}, + { ACE4_INHERITED_ACE, INHERITED_ACE}, +}; + +static int +set_xdr_ace(u32 *acep, + u32 who_iflag, + u32 who_id, + u32 ace_type, + u32 access_mask, + u32 flags) +{ + /* Audit and Alarm are not currently supported */ + if (ace_type > ACE4_ACCESS_DENIED_ACE_TYPE) + return -EINVAL; + + *acep++ = htonl(ace_type); + *acep++ = htonl(flags); + *acep++ = htonl(who_iflag); + *acep++ = htonl(access_mask); + *acep++ = htonl(who_id); + + return 0; +} + +static enum account_special_sid_type +get_account_special_sid_type(struct smb_sid *psid) +{ + if (psid->num_subauth == 2) { + if (psid->sub_auth[0] == sid_unix_groups.sub_auth[0]) { + return ACCOUNT_SID_UNIX_GROUP; + } else if (psid->sub_auth[0] == sid_unix_users.sub_auth[0]) { + return ACCOUNT_SID_UNIX_USER; + } + } else if (psid->num_subauth == 3) { + // S-1-5-88-1- - NFS user + // S-1-5-88-2- - NFS group + if (psid->sub_auth[0] != sid_unix_NFS_groups.sub_auth[0]) { + // First subauth doesn't match, not an NFS SID + return ACCOUNT_SID_UNKNOWN; + } + if (psid->sub_auth[1] == sid_unix_NFS_groups.sub_auth[1]) { + return ACCOUNT_SID_NFS_GROUP; + } else if (psid->sub_auth[1] == sid_unix_NFS_groups.sub_auth[1]) { + return ACCOUNT_SID_NFS_USER; + } + } + + return ACCOUNT_SID_UNKNOWN; +} + +/* + * Per Microsoft Win32 documentation, an empty DACL (i.e. one that + * is properly initialized and contains no ACEs) grants no access to the + * object it is assigned to. We can't set an empty ACL on ZFS, and so the + * best we can do is create an ACL with a single entry granting file owner + * owner@ no rights. Note that in Windows and Unix the file owner is able + * to override the ACL. + */ +static int +generate_empty_zfsacl(char **buf_out) +{ + u32 *xdrbuf = NULL, *zfsacl; + xdrbuf = kzalloc(ACES_TO_XDRSIZE(1), GFP_KERNEL); + if (!xdrbuf) + return -ENOMEM; + + zfsacl = xdrbuf; + *zfsacl++ = 0; /* acl_flags */ + *zfsacl++ = htonl(1); /* acl count */ + + set_xdr_ace(zfsacl, ACEI4_SPECIAL_WHO, ACE4_SPECIAL_OWNER, + ACE4_ACCESS_ALLOWED_ACE_TYPE, 0, 0); + + *buf_out = (char *)xdrbuf; + return ACES_TO_XDRSIZE(1); +} + +/* + * Per Microsoft Win32 documentation, a NULL DACL grants full access to + * any user that requests it; normal security checking is not performed + * with respect to the object. We can't set a NULL ZFS ACL and so + * the best we can do is set one granting everyone@ full control. + */ +static int +generate_null_zfsacl(char **buf_out) +{ + u32 *xdrbuf = NULL, *zfsacl; + + xdrbuf = kzalloc(ACES_TO_XDRSIZE(1), GFP_KERNEL); + if (!xdrbuf) + return -ENOMEM; + + zfsacl = xdrbuf; + *zfsacl++ = 0; /* acl_flags */ + *zfsacl++ = htonl(1); /* acl count */ + + set_xdr_ace(zfsacl, ACEI4_SPECIAL_WHO, ACE4_SPECIAL_EVERYONE, + ACE4_ACCESS_ALLOWED_ACE_TYPE, ACE4_ALL_PERMS, 0); + + *buf_out = (char *)xdrbuf; + return ACES_TO_XDRSIZE(1); +} + +/* + * Convert generic access into NFSv4 perms + */ +static u32 +generic_to_nfs(u32 generic_access) +{ + u32 out = 0; + if (generic_access == GENERIC_ALL) { + return ACE4_ALL_PERMS; + } + + if (generic_access & GENERIC_READ) { + out |= ACE4_READ_PERMS; + } + + if (generic_access & GENERIC_EXECUTE) { + out |= ACE4_EXECUTE; + } + + if (generic_access & GENERIC_WRITE) { + out |= (ACE4_WRITE_PERMS|ACE4_DELETE); + } + + return out; +} + +static int +convert_smb_access_to_nfs(u32 smbaccess, u32 *nfs_access_out) +{ + int i; + u32 perms = generic_to_nfs(smbaccess); + + if (perms == ACE4_ALL_PERMS) { + *nfs_access_out = perms; + return 0; + } + + for (i = 0; i < (sizeof(nfsperm2smb) / sizeof(nfsperm2smb[0])); i++) { + if (smbaccess & nfsperm2smb[i].smb_perm) + perms |= nfsperm2smb[i].nfs_perm; + } + + *nfs_access_out = perms; + return 0; +} + +static int +convert_smb_flags_to_nfs(u8 smbflags, u32 *nfs_flags_out) +{ + int i; + u32 flags = 0; + + if (smbflags & (SUCCESSFUL_ACCESS_ACE_FLAG | FAILED_ACCESS_ACE_FLAG)) { + cifs_dbg(VFS, "%s: ACE contains unsupported flags 0x%04x\n", + __func__, smbflags); + return -EINVAL; + } + + for (i = 0; i < (sizeof(nfsflag2smb) / sizeof(nfsflag2smb[0])); i++) { + if (smbflags & nfsflag2smb[i].smb_flag) + flags |= nfsflag2smb[i].nfs_flag; + } + + *nfs_flags_out = flags; + return 0; +} + +static int +convert_smb_ace_type_to_nfs(u8 smbacetype, u32 *nfs_ace_type_out) +{ + switch (smbacetype) { + case ACCESS_ALLOWED_ACE_TYPE: + *nfs_ace_type_out = ACE4_ACCESS_ALLOWED_ACE_TYPE; + break; + case ACCESS_DENIED_ACE_TYPE: + *nfs_ace_type_out = ACE4_ACCESS_DENIED_ACE_TYPE; + break; + default: + cifs_dbg(VFS, "%s: ACE contains unsupported ace type 0x%04x\n", + __func__, smbacetype); + return -EINVAL; + } + + return 0; +} + +/* + * Convert SID into NFS4 ID and type. Try to map BUILTIN / SPECIAL sids + * directly to NFS4 special type where possible (to avoid upcall to winbindd). + * + * Since the existing idmap key implementation does support return of both + * users and groups in one call, we first try to retrieve group (because this + * is in real life much more likely). If retrieving as group fails, we retry + * as user. + */ +static int +convert_smb_sid_to_nfs_who_special(struct smb_sid *psid, + u32 *iflag, + u32 *who_id, + u32 *flags) +{ + /* + * Check for direct mapping of owner@, group@, and everyone@ + */ + if (psid->num_subauth > 3) { + return -ENOENT; + } + + if (compare_sids(psid, &sid_everyone) == 0) { + *iflag = ACEI4_SPECIAL_WHO; + *who_id = ACE4_SPECIAL_EVERYONE; + return 0; + } + + if (compare_sids(psid, &sid_creator_owner) == 0) { + *iflag = ACEI4_SPECIAL_WHO; + *who_id = ACE4_SPECIAL_OWNER; + return 0; + } + + if (compare_sids(psid, &sid_creator_group) == 0) { + *iflag = ACEI4_SPECIAL_WHO; + *who_id = ACE4_SPECIAL_GROUP; + *flags |= ACE4_IDENTIFIER_GROUP; + return 0; + } + + /* + * SID communicating Unix mode can be safely skipped since we will + * get permissions info from other ACL entries + */ + if (compare_sids(psid, &sid_unix_NFS_mode) == 0) + return -EAGAIN; + + /* + * SID may directly encode a Unix uid or gid. + */ + switch (get_account_special_sid_type(psid)) { + case ACCOUNT_SID_UNIX_GROUP: + *flags |= ACE4_IDENTIFIER_GROUP; + *who_id = le32_to_cpu(psid->sub_auth[1]); + return 0; + case ACCOUNT_SID_UNIX_USER: + *who_id = le32_to_cpu(psid->sub_auth[1]); + return 0; + case ACCOUNT_SID_NFS_GROUP: + *flags |= ACE4_IDENTIFIER_GROUP; + *who_id = le32_to_cpu(psid->sub_auth[2]); + return 0; + case ACCOUNT_SID_NFS_USER: + *who_id = le32_to_cpu(psid->sub_auth[2]); + return 0; + case ACCOUNT_SID_UNKNOWN: + // This SID most likely is for a user or group + // which means we must make an upcall + break; + } + + return -ENOENT; +} + +static int +convert_smb_sid_to_nfs_who(struct smb_sid *psid, u32 *iflag, u32 *who_id, u32 *flags) +{ + char *sidstr; + const struct cred *saved_cred; + struct key *sidkey; + uint sidtype = SIDGROUP; + int rc; + + if (unlikely(psid->num_subauth > SID_MAX_SUB_AUTHORITIES)) { + cifs_dbg(FYI, "%s: subauthority count [%u] exceeds " + "maxiumum possible value.\n", + __func__, psid->num_subauth); + return -EINVAL; + } + + rc = convert_smb_sid_to_nfs_who_special(psid, iflag, who_id, flags); + switch (rc) { + case -ENOENT: + // We need to perform a lookup; + break; + case -EAGAIN: + case 0: + // EAGAIN means skip this entry + // zero means that it was converted + return rc; + } + + saved_cred = override_creds(root_cred); + +try_upcall_to_get_id: + sidstr = sid_to_key_str(psid, sidtype); + if (!sidstr) { + revert_creds(saved_cred); + return -ENOMEM; + } + sidkey = request_key(&cifs_idmap_key_type, sidstr, ""); + if (IS_ERR(sidkey)) { + if (sidkey == NULL) { + revert_creds(saved_cred); + kfree(sidstr); + return -ENOMEM; + } + + if ((PTR_ERR(sidkey) == -ENOKEY) && + (sidtype == SIDGROUP)) { + /* + * No group, retry as SIDOWNER + */ + kfree(sidstr); + sidtype = SIDOWNER; + goto try_upcall_to_get_id; + } + + cifs_dbg(FYI, "%s: Can't map SID %s to a %cid\n", + __func__, sidstr, sidtype == SIDOWNER ? 'u' : 'g'); + + kfree(sidstr); + revert_creds(saved_cred); + return PTR_ERR(sidkey); + } + + BUILD_BUG_ON(sizeof(uid_t) != sizeof(gid_t)); + if (sidkey->datalen != sizeof(uid_t)) { + cifs_dbg(FYI, "%s: Downcall for sid [%s] contained malformed " + "key (datalen=%hu)\n", + __func__, sidstr, sidkey->datalen); + key_invalidate(sidkey); + key_put(sidkey); + revert_creds(saved_cred); + kfree(sidstr); + return -ENOKEY; + } + + if (sidtype == SIDGROUP) { + *flags |= ACE4_IDENTIFIER_GROUP; + } + + memcpy(who_id, &sidkey->payload.data[0], sizeof(uid_t)); + key_put(sidkey); + revert_creds(saved_cred); + kfree(sidstr); + + return 0; +} + +static int +do_ace_conversion(struct smb_ace *pace, + u32 *p_perms, + u32 *p_iflag, + u32 *p_who_id, + u32 *p_flags, + u32 *p_ace_type) +{ + int error; + char *sid_str; + + if (le16_to_cpu(pace->size) < 16) { + cifs_dbg(VFS, "%s: NT ACE size is invalid %d\n", + __func__, le16_to_cpu(pace->size)); + return -E2BIG; + } + + error = convert_smb_ace_type_to_nfs(pace->type, p_ace_type); + if (error) { + return error; + } + + error = convert_smb_access_to_nfs(pace->access_req, p_perms); + if (error) { + return error; + } + + error = convert_smb_flags_to_nfs(pace->flags, p_flags); + if (error) { + return error; + } + + error = convert_smb_sid_to_nfs_who(&pace->sid, p_iflag, p_who_id, p_flags); + if (error == -ENOKEY) { + if (*p_ace_type == ACE4_ACCESS_DENIED_ACE_TYPE) { + sid_str = sid_to_key_str(&pace->sid, SIDOWNER); + if (sid_str == NULL) { + return -ENOMEM; + } + + cifs_dbg(VFS, + "%s: [%s] unable to convert SID into a local " + "ID for a DENY ACL entry. Since omission or " + "alteration of the ACL entry would increase " + "access to the file, this error may not be " + "overriden via client configuration change. " + "Administrative action will be required to " + "either remove the ACL entry from the remote " + "server or map the unknown SID to a local " + "Unix ID on this client\n", __func__, sid_str); + kfree(sid_str); + return -ENOKEY; + } + if (global_zfsaclflags & MODFLAG_SKIP_UNKNOWN_SID) { + return -EAGAIN; + } else if (global_zfsaclflags & MODFLAG_MAP_UNKNOWN_SID) { + *p_who_id = from_kuid(&init_user_ns, current_fsuid()); + return 0; + } + } + + return error; +} + +static bool +combine_with_next(struct smb_ace *pace, + u32 *p_perms, + u32 *p_iflag, + u32 *p_who_id, + u32 *p_flags, + u32 *p_ace_type) +{ + u32 perms = 0, iflag = 0, who_id = 0, flags = 0, ace_type = 0; + int error; + + error = do_ace_conversion(pace, + &perms, + &iflag, + &who_id, + &flags, + &ace_type); + + /* + * If an error is encountered here, it will also + * be picked up when we formally parse next ACE + * and so we'll handle the error there. + */ + if (error) { + return false; + } + + if (perms != *p_perms) { + return false; + } + + if (ace_type != *p_ace_type) { + return false; + } + + if ((flags & ACE4_INHERIT_ONLY_ACE) == 0) { + return false; + } + + if (iflag != ACEI4_SPECIAL_WHO) { + return false; + } + + *p_iflag = iflag; + *p_who_id = who_id; + *p_flags = (flags & ~ACE4_INHERIT_ONLY_ACE); + return true; +} + +/* + * There are various situations where admin may want to just skip + * certain aces in case of conversion failure. A primary example + * is if ACL contains an ACE for a local user on the remote server. + * In this case (as long as the ACE is ALLOW rather than DENY) it + * is safe (although perhaps incorrect) to simply skip the entry. + * + * Currently this function on success returns number of good ACEs + * added to the acl. + * + * On error return -errno. + */ +static int +convert_smbace_to_nfsace(struct smb_ace *pace, + u32 *zfsacl, + bool isdir, + uid_t owner, + uid_t group, + bool islast, + bool *pskip_next) +{ + u32 *zace = zfsacl; + u32 perms = 0, iflag = 0, who_id = 0, flags = 0, ace_type = 0; + uid_t to_check; + int error; + + error = do_ace_conversion(pace, + &perms, + &iflag, + &who_id, + &flags, + &ace_type); + if (error) { + return error; + } + + to_check = flags & ACE4_IDENTIFIER_GROUP ? group : owner; + + /* + * This is a Samba server implementation detail for NFS4 ACL. + * S-1-3-0 and S-1-3-1 are only valid with INHERIT_ONLY set + * whereas owner@ and group@ in NFS4 ACL carry no such restriction. + * Therefore the server will split owner@ into two separate aces: + * one with S-1-3-0 (or S-1-3-1 in case of group@) and INHERIT_ONLY + * and the other as a normal non-special entry for the ID of the user + * or group with no inheritance flags set. + * + * The SMB server will always present the next ACE as the second of + * the pair and so we peek ahead here. If both halves of pair are + * present, then we combine into a single owner@ or group@ entry. + */ + if ((iflag == 0) && + (who_id == to_check) && + ((flags & ~(ACE4_INHERITED_ACE | ACE4_IDENTIFIER_GROUP)) == 0)) { + struct smb_ace *next; + if (!isdir) { + iflag = ACEI4_SPECIAL_WHO; + if (flags & ACE4_IDENTIFIER_GROUP) { + who_id = ACE4_SPECIAL_GROUP; + + } else { + who_id = ACE4_SPECIAL_OWNER; + } + + } else if (!islast) { + next = (struct smb_ace *)((char *)pace + + le16_to_cpu(pace->size)); + *pskip_next = combine_with_next(next, + &perms, + &iflag, + &who_id, + &flags, + &ace_type); + } + } + + error = set_xdr_ace(zace, iflag, who_id, ace_type, perms, flags); + if (error) { + return error; + } + + return 1; +} + +static int +convert_dacl_to_zfsacl(struct smb_acl *dacl_ptr, + char *end, + struct inode *inode, + char **buf_out) +{ + int good_aces = 0, aces_set; + char *acl_base; + u32 *xdr_base, *zfsacl, num_aces, i; + struct smb_ace *pace; + bool skip_next = false; + bool isdir = S_ISDIR(inode->i_mode); + uid_t owner, group; + + num_aces = le32_to_cpu(dacl_ptr->num_aces); + if (num_aces > NFS41ACL_MAX_ENTRIES) + return -E2BIG; + + if (num_aces == 0) + return generate_empty_zfsacl(buf_out); + + if (end < (char *)dacl_ptr + le16_to_cpu(dacl_ptr->size)) { + cifs_dbg(VFS, "%s: ACL size [%u] encoded in NT DACL " + "is invalid.\n", + __func__, le16_to_cpu(dacl_ptr->size)); + return -EINVAL; + } + + xdr_base = kzalloc(ACES_TO_XDRSIZE(num_aces), GFP_KERNEL); + if (!xdr_base) + return -ENOMEM; + + zfsacl = (u32 *)xdr_base + NACL_OFFSET; + acl_base = (char *)dacl_ptr + sizeof(struct smb_acl); + + owner = from_kuid(&init_user_ns, inode->i_uid); + group = from_kgid(&init_user_ns, inode->i_gid); + + for (i = 0; i < num_aces; i++) { + pace = (struct smb_ace *)(acl_base); + acl_base += pace->size; + + if (end < (char *)acl_base) { + cifs_dbg(VFS, "%s: ACL entry %d in NT DACL has a size " + "[%u] that would exceed the buffer size " + "allocated for DACL.", + __func__, i, pace->size); + kfree(xdr_base); + return -EINVAL; + } + + if (parse_sid(&pace->sid, end)) { + kfree(xdr_base); + return -EINVAL; + } + + if (skip_next) { + skip_next = false; + continue; + } + + aces_set = convert_smbace_to_nfsace(pace, zfsacl, isdir, owner, + group, i == (num_aces -1), &skip_next); + if (aces_set < 0) { + switch (aces_set) { + case -EAGAIN: + // Entry should be skipped + aces_set = 0; + break; + default: + cifs_dbg(VFS, "%s: conversion of ACE %d in " + "DACL could not be converted into " + "local ZFS ACE format: %d\n", + __func__, i, aces_set); + kfree(xdr_base); + return aces_set; + } + } + + good_aces += aces_set; + zfsacl += (aces_set * NACE41_LEN); + } + + xdr_base[0] = htonl(isdir ? ACL4_ISDIR : 0); + xdr_base[1] = htonl(good_aces); + + *buf_out = (char *)xdr_base; + return ACES_TO_XDRSIZE(good_aces); +} + +int ntsd_to_zfsacl_xattr(struct smb_ntsd *pntsd, + u32 acl_len, + struct inode *inode, + char **buf_out) +{ + struct smb_acl *dacl_ptr; /* no need for SACL ptr */ + char *end_of_acl = ((char *)pntsd) + acl_len; + __u32 dacloffset; + + if (pntsd == NULL) + return -EIO; + + dacloffset = le32_to_cpu(pntsd->dacloffset); + if (!dacloffset) { + return generate_null_zfsacl(buf_out); + } + + dacl_ptr = (struct smb_acl *)((char *)pntsd + dacloffset); + if (dacl_ptr == NULL) { + return generate_null_zfsacl(buf_out); + } + + return convert_dacl_to_zfsacl(dacl_ptr, end_of_acl, inode, buf_out); +} + +/* + * Creator-owner and creator-owner-group SIDs are only valid if flags are + * set to INHERIT_ONLY. This means other ones will need to be split into two + * separate entries. + */ +static int calculate_ntsd_acecnt(u32 *zfsacl, u32 acecnt, struct inode *inode, u32 *cnt) +{ + u32 *ace = zfsacl; + u32 i, cnt_out = 0; + u32 flag, iflag, who_id; + bool isdir = S_ISDIR(inode->i_mode); + + for (i = 0; i < acecnt; i++) { + flag = ntohl(*(ace + NA_FLAG_OFFSET)); + iflag = ntohl(*(ace + NA_IFLAG_OFFSET)); + who_id = ntohl(*(ace + NA_WHO_OFFSET)); + + if (!isdir && (flag & DIR_ONLY_FLAGS)) { + /* Not all flags are valid for files */ + return -EINVAL; + } + + if ((flag & ACE4_INHERIT_ONLY_ACE) && + ((flag & (ACE4_DIRECTORY_INHERIT_ACE | \ + ACE4_FILE_INHERIT_ACE)) == 0)) { + /* INHERIT_ONLY without some inherit flags is invalid */ + return -EINVAL; + } + + if (isdir && (iflag == ACEI4_SPECIAL_WHO) && + ((flag & ACE4_INHERIT_ONLY_ACE) == 0) && + ((who_id == ACE4_SPECIAL_OWNER) || (who_id == ACE4_SPECIAL_GROUP))) { + cnt_out += 1; + } + + cnt_out += 1; + ace += NACE41_LEN; + } + + *cnt = cnt_out; + + return 0; +} + +static int +convert_zfsperm_to_ntperm(u32 zfsperms, struct smb_ace *ace) +{ + u32 access_mask = 0; + int i; + + for (i = 0; i < (sizeof(nfsperm2smb) / sizeof(nfsperm2smb[0])); i++) { + if (zfsperms & nfsperm2smb[i].nfs_perm) { + access_mask |= nfsperm2smb[i].smb_perm; + } + } + + ace->access_req = cpu_to_le32(access_mask); + + return 0; +} + +static int +convert_zfsflag_to_ntflag(u32 zfsflags, struct smb_ace *ace) +{ + u8 flags = 0; + int i; + + for (i = 0; i < (sizeof(nfsflag2smb) / sizeof(nfsflag2smb[0])); i++) { + + if (zfsflags & nfsflag2smb[i].nfs_flag) { + flags |= nfsflag2smb[i].smb_flag; + } + } + + ace->flags = flags; + return 0; +} + +static int +convert_zfstype_to_nttype(u32 ace_type, struct smb_ace *ace) +{ + switch (ace_type) { + case ACE4_ACCESS_ALLOWED_ACE_TYPE: + ace->type = ACCESS_ALLOWED_ACE_TYPE; + break; + case ACE4_ACCESS_DENIED_ACE_TYPE: + ace->type = ACCESS_DENIED_ACE_TYPE; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int +convert_zfswho_to_ntsid(u32 iflag, u32 who_id, struct inode *inode, u32 flags, struct smb_ace *ace) +{ + + uint sidtype = flags & ACE4_IDENTIFIER_GROUP; + uid_t id; + + if ((iflag & ACEI4_SPECIAL_WHO) == 0) { + /* + * This is not a special entry (owner@, group@, everyone@) + * and so we need to make go through normal conversion + */ + return id_to_sid(who_id, sidtype, &ace->sid); + } + + switch (who_id) { + case ACE4_SPECIAL_EVERYONE: + cifs_copy_sid(&ace->sid, &sid_everyone); + return 0; + break; + case ACE4_SPECIAL_OWNER: + id = from_kuid(&init_user_ns, inode->i_uid); + + if (flags & ACE4_INHERIT_ONLY_ACE) { + cifs_copy_sid(&ace->sid, &sid_creator_owner); + return 0; + } else { + return id_to_sid(id, SIDOWNER, &ace->sid); + } + break; + case ACE4_SPECIAL_GROUP: + id = from_kgid(&init_user_ns, inode->i_gid); + if (flags & ACE4_INHERIT_ONLY_ACE) { + cifs_copy_sid(&ace->sid, &sid_creator_group); + return 0; + } else { + return id_to_sid(id, SIDGROUP, &ace->sid); + } + break; + } + return -EINVAL; +} + +#define BASE_ACE_SIZE (1 + 1 + 2 + 4) /* struct smb_ace: type, flags, size, access_req */ +#define CIFS_ACE_SIZE(cnt) (BASE_ACE_SIZE + (CIFS_SID_BASE_SIZE + (cnt * 4))) + +static int +convert_zfsace_to_cifs_aces(u32 *zfsace, char *acl_base, struct inode *inode, u16 *size) +{ + u32 perms, flags, iflag, who_id, ace_type; + int error; + u16 out_sz = 0, ace_sz; + struct smb_ace *ace = (struct smb_ace *)acl_base; + + ace_type = ntohl(*(zfsace + NA_TYPE_OFFSET)); + flags = ntohl(*(zfsace + NA_FLAG_OFFSET)); + iflag = ntohl(*(zfsace + NA_IFLAG_OFFSET)); + perms = ntohl(*(zfsace + NA_ACCESS_MASK_OFFSET)); + who_id = ntohl(*(zfsace + NA_WHO_OFFSET)); + + /* + * Creator-owner and Creator-owner-group SIDS are only valid + * for ACES with INHERIT_ONLY set. This means that we split + * inheriting owner@ and group@ entries into two separate ACEs with + * an identical access mask. One is non-inheriting for the inode owner + * or group, and the other is inherit-only with the special SID value. + */ + if ((iflag & ACEI4_SPECIAL_WHO) && (who_id != ACE4_SPECIAL_EVERYONE) && + S_ISDIR(inode->i_mode) && ((flags & ACE4_INHERIT_ONLY_ACE) == 0)) { + convert_zfsperm_to_ntperm(perms, ace); + convert_zfsflag_to_ntflag(flags | ACE4_INHERIT_ONLY_ACE, ace); + error = convert_zfstype_to_nttype(ace_type, ace); + if (error) { + return error; + } + + error = convert_zfswho_to_ntsid(iflag, + who_id, + inode, + flags | ACE4_INHERIT_ONLY_ACE, + ace); + if (error) { + return error; + } + + ace_sz = CIFS_ACE_SIZE(ace->sid.num_subauth); + ace->size = cpu_to_le16(ace_sz); + out_sz += ace_sz; + + /* skip forward to next ACE slot */ + ace = (struct smb_ace *)(acl_base + ace_sz); + flags &= ~DIR_ONLY_FLAGS; + + convert_zfsperm_to_ntperm(perms, ace); + convert_zfsflag_to_ntflag(flags, ace); + error = convert_zfstype_to_nttype(ace_type, ace); + if (error) { + return error; + } + + error = convert_zfswho_to_ntsid(iflag, + who_id, + inode, + flags, + ace); + if (error) { + return error; + } + + ace_sz = CIFS_ACE_SIZE(ace->sid.num_subauth); + ace->size = cpu_to_le16(ace_sz); + out_sz += ace_sz; + } else { + convert_zfsperm_to_ntperm(perms, ace); + convert_zfsflag_to_ntflag(flags, ace); + error = convert_zfstype_to_nttype(ace_type, ace); + if (error) { + return error; + } + error = convert_zfswho_to_ntsid(iflag, + who_id, + inode, + flags, + ace); + if (error) { + return error; + } + + ace_sz = CIFS_ACE_SIZE(ace->sid.num_subauth); + ace->size = cpu_to_le16(ace_sz); + out_sz += ace_sz; + } + + if (error) { + return error; + } + + *size = out_sz; + + return 0; +} + +static int +convert_zfsacl_to_cifsacl(u32 *aclbuf, + u32 acecnt, + struct inode *inode, + struct smb_acl *pdacl, + u32 dacl_ace_cnt, + u16 *pacl_size_out) +{ + u32 i, nsize = sizeof(struct smb_acl); + char *acl_base = (char *)pdacl; + u16 size; + int error; + + for (i = 0; i < acecnt; i++) { + u32 *zfsace = aclbuf + (i * NACE41_LEN); + error = convert_zfsace_to_cifs_aces(zfsace, acl_base + nsize, inode, &size); + if (error) + return error; + + nsize += size; + } + + *pacl_size_out = nsize; + pdacl->size = cpu_to_le16(nsize); + pdacl->revision = cpu_to_le16(ACL_REVISION); + pdacl->num_aces = cpu_to_le32(dacl_ace_cnt); + + return 0; +} + +static void +force_smb3_dacl_info(struct smb3_sd *sd, u32 acl_flag) +{ + u16 control = ACL_CONTROL_SR | ACL_CONTROL_DP; + + if (acl_flag & ACL4_PROTECTED) { + control |= ACL_CONTROL_PD; + } + + /* + * kzalloc call zero-initialized + * sd->Sbz1, which is correct since we are not + * using resource manager + */ + sd->Revision = 1; + sd->Control = cpu_to_le16(control); +} + +/* + * This is special handling for either NULL or empty ACLs. + * Returns 0 if ACL is generated, -EAGAIN if regular parsing + * required, and otherwise -errno. + */ +static int +parse_single_ace(u32 *zfsace, struct smb_ntsd **ppntsd_out, u32 *acllen_out) +{ + u32 perms, flags, iflag, who_id, ace_type; + bool dacl_is_null = false, dacl_is_empty = false; + u32 secdesclen = sizeof(struct smb_ntsd); + struct smb_ntsd *pnntsd = NULL; + struct smb_acl *dacl = NULL; + + perms = ntohl(*(zfsace + NA_ACCESS_MASK_OFFSET)); + flags = ntohl(*(zfsace + NA_FLAG_OFFSET)); + iflag = ntohl(*(zfsace + NA_IFLAG_OFFSET)); + who_id = ntohl(*(zfsace + NA_WHO_OFFSET)); + ace_type = ntohl(*(zfsace + NA_TYPE_OFFSET)); + + if ((iflag == ACEI4_SPECIAL_WHO) && (who_id == ACE4_SPECIAL_EVERYONE) && + (perms == ACE4_ALL_PERMS) && (flags == 0) && + (ace_type == ACE4_ACCESS_ALLOWED_ACE_TYPE)) { + dacl_is_null = true; + } + + if ((iflag == ACEI4_SPECIAL_WHO) && (who_id == ACE4_SPECIAL_OWNER) && + (perms == 0) && (flags == 0) && + (ace_type == ACE4_ACCESS_ALLOWED_ACE_TYPE)) { + dacl_is_empty = true; + secdesclen += sizeof(struct smb_acl); + } + + if (!dacl_is_null && !dacl_is_empty) { + return -EAGAIN; + } + + pnntsd = kzalloc(secdesclen, GFP_KERNEL); + if (pnntsd == NULL) { + return -ENOMEM; + } + + force_smb3_dacl_info((struct smb3_sd *)pnntsd, 0); + + *ppntsd_out = pnntsd; + *acllen_out = secdesclen; + + if (dacl_is_null) { + return 0; + } + + /* dacl_is_empty */ + pnntsd->dacloffset = cpu_to_le32(sizeof(struct smb_ntsd)); + dacl = (struct smb_acl *)(pnntsd + sizeof(struct smb_ntsd)); + dacl->size = cpu_to_le16(sizeof(struct smb_acl)); + dacl->revision = cpu_to_le16(ACL_REVISION); + return 0; +} + +/* + * This method converts ZFS ACL format into a Security Descriptor. The + * resulting SD only contains a DACL and is limited to only ALLOW and DENY + * entries. + */ +int zfsacl_xattr_to_ntsd(char *aclbuf, + size_t size, + struct inode *inode, + struct smb_ntsd **ppntsd_out, + u32 *acllen_out) +{ + int error; + u32 *zfsacl = (u32 *)aclbuf; + u32 control, acecnt, dacl_ace_cnt, secdesclen; + struct smb_ntsd *pnntsd = NULL; + struct smb_acl *dacl = NULL; + u16 acl_size_out = 0; + + if (!XDRSIZE_IS_VALID(size)) { + return -EINVAL; + } + + control = ntohl(*(zfsacl++)); + acecnt = ntohl(*(zfsacl++)); + + /* + * C.f. notes about S-1-3-0 and S-1-3-1 above. There are some + * circumstances when one ZFS ACL entry may need to expand to two + * SMB DACL entries. + */ + error = calculate_ntsd_acecnt(zfsacl, acecnt, inode, &dacl_ace_cnt); + if (error) { + return error; + } + + /* + * Special handling for NULL or empty DACL. A single ACL entry + * is unusual and so we first check to see whether it's a NULL or empty + * DACL, if it isn't then the function returns -EAGAIN so that we + * fall back to normal parsing. + */ + if (dacl_ace_cnt == 1) { + error = parse_single_ace(zfsacl, ppntsd_out, acllen_out); + if ((error == 0) || (error != -EAGAIN)) { + return error; + } + } + + secdesclen = dacl_ace_cnt * sizeof(struct smb_ace); + secdesclen = max_t(u32, secdesclen, DEFAULT_SEC_DESC_LEN); + secdesclen += sizeof(struct smb_ntsd); + + pnntsd = kzalloc(secdesclen, GFP_KERNEL); + if (pnntsd == NULL) { + return -ENOMEM; + } + + /* + * Format of Security Descriptor has changed over time. We require + * support for setting ACL-wide control bits and so this method + * is gated on whether connection is SMB3+. Hence, we are safe in + * assuming we can recast as an smb3_sd for setting our control bits. + */ + force_smb3_dacl_info((struct smb3_sd *)pnntsd, control); + + pnntsd->dacloffset = cpu_to_le32(sizeof(struct smb_ntsd)); + + dacl = (struct smb_acl *)((char*)pnntsd + pnntsd->dacloffset); + error = convert_zfsacl_to_cifsacl(zfsacl, acecnt, inode, dacl, + dacl_ace_cnt, &acl_size_out); + + dacl->size = cpu_to_le16(acl_size_out); + if (error) { + kfree(pnntsd); + return error; + } + + *ppntsd_out = pnntsd; + *acllen_out = secdesclen; + + return 0; +} +#endif /* CONFIG_TRUENAS */ diff --git a/fs/smb/client/cifsfs.c b/fs/smb/client/cifsfs.c index 20cafdff5081..fba88fecd09e 100644 --- a/fs/smb/client/cifsfs.c +++ b/fs/smb/client/cifsfs.c @@ -195,6 +195,7 @@ cifs_read_super(struct super_block *sb) cifs_sb = CIFS_SB(sb); tcon = cifs_sb_master_tcon(cifs_sb); + sb->s_flags |= SB_LARGEXATTR; if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_POSIXACL) sb->s_flags |= SB_POSIXACL; diff --git a/fs/smb/client/cifsglob.h b/fs/smb/client/cifsglob.h index 5041b1ffc244..7700727a94cb 100644 --- a/fs/smb/client/cifsglob.h +++ b/fs/smb/client/cifsglob.h @@ -2060,6 +2060,11 @@ extern unsigned int dir_cache_timeout; /* max time for directory lease caching o extern bool disable_legacy_dialects; /* forbid vers=1.0 and vers=2.0 mounts */ extern atomic_t mid_count; +#ifdef CONFIG_TRUENAS +extern unsigned int global_zfsaclflags; +extern unsigned int streams_samba_compat_enabled; +#endif + void cifs_oplock_break(struct work_struct *work); void cifs_queue_oplock_break(struct cifsFileInfo *cfile); void smb2_deferred_work_close(struct work_struct *work); diff --git a/fs/smb/client/cifsproto.h b/fs/smb/client/cifsproto.h index 1d3470bca45e..263c4fb31115 100644 --- a/fs/smb/client/cifsproto.h +++ b/fs/smb/client/cifsproto.h @@ -675,6 +675,18 @@ int cifs_sfu_make_node(unsigned int xid, struct inode *inode, struct dentry *dentry, struct cifs_tcon *tcon, const char *full_path, umode_t mode, dev_t dev); +#ifdef CONFIG_TRUENAS +int ntsd_to_zfsacl_xattr(struct smb_ntsd *pacl, + u32 acllen, + struct inode *inode, + char **buf_out); +int zfsacl_xattr_to_ntsd(char *aclbuf, + size_t size, + struct inode *inode, + struct smb_ntsd **ppntsd_out, + u32 *acllen_out); +#endif + #ifdef CONFIG_CIFS_DFS_UPCALL static inline int get_dfs_path(const unsigned int xid, struct cifs_ses *ses, const char *old_path, diff --git a/fs/smb/client/nfs41acl_xdr.h b/fs/smb/client/nfs41acl_xdr.h new file mode 100644 index 000000000000..600653b1a624 --- /dev/null +++ b/fs/smb/client/nfs41acl_xdr.h @@ -0,0 +1,151 @@ +#ifndef _NFS41ACL_H +#define _NFS41ACL_H + +/* + * Native ZFS NFSv41-style ACL is packed (using network byte order) in xattr as + * follows: + * + * struct nfsace4i { + * uint32_t type; RFC 5661 Section 6.2.1.1 + * uint32_t flag; RFC 5661 Section 6.2.1.4 + * uint32_t iflag; + * uint32_t access_mask; RFC 5661 Section 6.2.1.3 + * uint32_t who_id; + * }; + * + * struct nfsacl4 { + * uint32_t acl_flags; RFC 5661 Section 6.4.3.2 + * uint32_t ace_count; + * struct nfsace4i aces<>; + * }; + * + * iflag and who_id combined are sufficent for NFS server to convert into ACE + * who (RFC 5661 Section 6.2.1.5). + */ + +#define NA41_NAME "system.nfs4_acl_xdr" +#define NA_TYPE_OFFSET 0 +#define NA_FLAG_OFFSET 1 +#define NA_IFLAG_OFFSET 2 +#define NA_ACCESS_MASK_OFFSET 3 +#define NA_WHO_OFFSET 4 + +/* + * Following are defined in RFC 5661 Section 6.2.1.3 ACE Access Mask + */ +#define ACE4_READ_DATA 0x00000001 +#define ACE4_WRITE_DATA 0x00000002 +#define ACE4_APPEND_DATA 0x00000004 +#define ACE4_READ_NAMED_ATTRS 0x00000008 +#define ACE4_WRITE_NAMED_ATTRS 0x00000010 +#define ACE4_EXECUTE 0x00000020 +#define ACE4_DELETE_CHILD 0x00000040 +#define ACE4_READ_ATTRIBUTES 0x00000080 +#define ACE4_WRITE_ATTRIBUTES 0x00000100 +#define ACE4_DELETE 0x00010000 +#define ACE4_READ_ACL 0x00020000 +#define ACE4_WRITE_ACL 0x00040000 +#define ACE4_WRITE_OWNER 0x00080000 +#define ACE4_SYNCHRONIZE 0x00100000 + +#define ACE4_READ_PERMS (ACE4_READ_DATA|ACE4_READ_ACL|ACE4_READ_ATTRIBUTES| \ + ACE4_READ_NAMED_ATTRS) + +#define ACE4_WRITE_PERMS (ACE4_WRITE_DATA|ACE4_APPEND_DATA|ACE4_WRITE_ATTRIBUTES| \ + ACE4_WRITE_NAMED_ATTRS) + +#define ACE4_MODIFY_PERMS (ACE4_READ_PERMS|ACE4_WRITE_PERMS|ACE4_SYNCHRONIZE| \ + ACE4_EXECUTE|ACE4_DELETE_CHILD|ACE4_DELETE) + +#define ACE4_ALL_PERMS (ACE4_MODIFY_PERMS|ACE4_WRITE_ACL|ACE4_WRITE_OWNER) + +/* + * Following are defined in RFC 5661 Section 6.2.1.4 ACE flags + */ +#define ACE4_FILE_INHERIT_ACE 0x00000001 +#define ACE4_DIRECTORY_INHERIT_ACE 0x00000002 +#define ACE4_NO_PROPAGATE_INHERIT_ACE 0x00000004 +#define ACE4_INHERIT_ONLY_ACE 0x00000008 +#define ACE4_SUCCESSFUL_ACCESS_ACE_FLAG 0x00000010 +#define ACE4_FAILED_ACCESS_ACE_FLAG 0x00000020 +#define ACE4_IDENTIFIER_GROUP 0x00000040 +#define ACE4_INHERITED_ACE 0x00000080 +#define NFS41_FLAGS (ACE4_DIRECTORY_INHERIT_ACE| \ + ACE4_FILE_INHERIT_ACE| \ + ACE4_NO_PROPAGATE_INHERIT_ACE| \ + ACE4_INHERIT_ONLY_ACE| \ + ACE4_INHERITED_ACE| \ + ACE4_IDENTIFIER_GROUP) +#define DIR_ONLY_FLAGS (ACE4_DIRECTORY_INHERIT_ACE| \ + ACE4_FILE_INHERIT_ACE| \ + ACE4_NO_PROPAGATE_INHERIT_ACE| \ + ACE4_INHERIT_ONLY_ACE) + +#define ACEI4_SPECIAL_WHO 0x00000001 +#define ACE4_SPECIAL_OWNER 1 +#define ACE4_SPECIAL_GROUP 2 +#define ACE4_SPECIAL_EVERYONE 3 +#define NACE41_LEN 5 +#define NACL_OFFSET 2 + +/* + * Follow ACL flags are defined in RFC 5661 Section 6.4.3.2 and are mapped to + * NT Security Descriptor control bits (MS-DTYP Section 2.4.6) on an as-needed + * basis. From a practical standpoint the primary concern is preserving the + * DACL Protected bit as this alters Windows SMB client auto-inheritance + * behavior when propagating ACL changes recursively. + */ +#define ACL4_AUTO_INHERIT 0x00000001 +#define ACL4_PROTECTED 0x00000002 +#define ACL4_DEFAULTED 0x00000004 + +/* Non-RFC ZFS flag indicating that ACL is a directory */ +#define ACL4_ISDIR 0x00020000 + +/* + * Following are defined in RFC 5661 Section 6.2.1.1 + */ +#define ACE4_ACCESS_ALLOWED_ACE_TYPE 0x0000 +#define ACE4_ACCESS_DENIED_ACE_TYPE 0x0001 +#define ACE4_SYSTEM_AUDIT_ACE_TYPE 0x0002 +#define ACE4_SYSTEM_ALARM_ACE_TYPE 0x0003 + +/* + * Macros for sanity checks related to XDR and ACL buffer sizes + */ +#define NFS41ACL_MAX_ENTRIES 1024 +#define ACE4SIZE (NACE41_LEN * sizeof(u32)) +#define XDRBASE (2 * sizeof (u32)) + +#define ACES_TO_SIZE(x, y) (x + (y * ACE4SIZE)) +#define SIZE_IS_VALID(x, y) ((x >= ACES_TO_SIZE(y, 0)) && \ + (((x - y) % ACE4SIZE) == 0)) + +#define ACES_TO_XDRSIZE(x) (ACES_TO_SIZE(XDRBASE, x)) +#define XDRSIZE_IS_VALID(x) (SIZE_IS_VALID(x, XDRBASE)) + +/* + * Supported flags for /proc/fs/cifs/zfsacl_configuration_flags + */ +#define MODFLAG_UNDEFINED 0x00000000 + +/* if SID is unknown map it to current fsuid */ +#define MODFLAG_MAP_UNKNOWN_SID 0x00000001 + +/* if SID is unknown, skip it */ +#define MODFLAG_SKIP_UNKNOWN_SID 0x00000002 + +/* if SID is unknown, fail the operation */ +#define MODFLAG_FAIL_UNKNOWN_SID 0x00000004 + +/* Allow writing ACL through xattr (off by default) */ +#define MODFLAG_ALLOW_ACL_WRITE 0x00000008 + +#define MODFLAG_ALL_IDMAP (MODFLAG_FAIL_UNKNOWN_SID | MODFLAG_MAP_UNKNOWN_SID |\ + MODFLAG_SKIP_UNKNOWN_SID) + +#define MODFLAG_ALL (MODFLAG_ALL_IDMAP | MODFLAG_ALLOW_ACL_WRITE) + +#define MODFLAG_DEFAULTS (MODFLAG_FAIL_UNKNOWN_SID) + +#endif /* !_NFS41ACL_H */ diff --git a/fs/smb/client/smb2misc.c b/fs/smb/client/smb2misc.c index f3c4b70b77b9..de0cbec32637 100644 --- a/fs/smb/client/smb2misc.c +++ b/fs/smb/client/smb2misc.c @@ -482,6 +482,92 @@ cifs_convert_path_to_utf16(const char *from, struct cifs_sb_info *cifs_sb) return to; } +#ifdef CONFIG_TRUENAS +static const char * +get_start_of_path(const char *from, struct cifs_sb_info *cifs_sb) +{ + /* Windows doesn't allow paths beginning with \ */ + if (from[0] == '\\') + return from + 1; + + /* SMB311 POSIX extensions paths do not include leading slash */ + else if (cifs_sb_master_tlink(cifs_sb) && + cifs_sb_master_tcon(cifs_sb)->posix_extensions && + (from[0] == '/')) { + return from + 1; + } + return from; +} + +/* + * This is a variant of cifs_convert_path_to_utf16() for generating a UTF16 + * path name for a named stream. File name and stream name are separated by the + * colon character ":". Since this separator must be preserved in an unaltered + * form, the normal path conversion function may not be used to generate a + * full stream path. + * + * Note: caller must free return buffer + */ +__le16 * +cifs_convert_stream_path_to_utf16(const char *from, const char *stream, struct cifs_sb_info *cifs_sb) +{ + int file_len, stream_len; + const char *start_of_path; + int map_type; + char *buf = NULL, *pbuf; + __le16 *file_buf = NULL, *stream_buf = NULL; + + if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SFM_CHR) + map_type = SFM_MAP_UNI_RSVD; + else if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR) + map_type = SFU_MAP_UNI_RSVD; + else + map_type = NO_MAP_UNI_RSVD; + + start_of_path = get_start_of_path(from, cifs_sb); + + file_buf = cifs_strndup_to_utf16(start_of_path, PATH_MAX, &file_len, + cifs_sb->local_nls, map_type); + + if (file_buf == NULL) { + return NULL; + } + + + start_of_path = get_start_of_path(stream, cifs_sb); + + stream_buf = cifs_strndup_to_utf16(start_of_path, PATH_MAX, &stream_len, + cifs_sb->local_nls, map_type); + if (stream_buf == NULL) { + kfree(file_buf); + return NULL; + } + + buf = kzalloc(file_len + stream_len, GFP_KERNEL); + if (buf == NULL) { + kfree(file_buf); + kfree(stream_buf); + return NULL; + } + + memcpy(buf, file_buf, file_len); + + // cifs_strndup_to_utf16() appends a UTF16 NULL character to end of + // string. We take advantage of this and replace with UTF-16 colon + // (separator for file and stream names in SMB protocol) for + // concatenating the full stream name. + pbuf = buf + (file_len - 2); + *pbuf++ = ':'; + *pbuf++ = '\0'; + + memcpy(pbuf, stream_buf, stream_len); + kfree(file_buf); + kfree(stream_buf); + + return (__le16 *)buf; +} +#endif + __le32 smb2_get_lease_state(struct cifsInodeInfo *cinode) { diff --git a/fs/smb/client/smb2pdu.c b/fs/smb/client/smb2pdu.c index 6584b5cddc28..ab6f865bb67b 100644 --- a/fs/smb/client/smb2pdu.c +++ b/fs/smb/client/smb2pdu.c @@ -3919,6 +3919,36 @@ int SMB2_query_info(const unsigned int xid, struct cifs_tcon *tcon, NULL); } +#ifdef CONFIG_TRUENAS +int SMB2_query_streams(const unsigned int xid, struct cifs_tcon *tcon, + u64 persistent_fid, u64 volatile_fid, struct smb2_file_stream_info **data, + u32 *plen) +{ + /* + * Each returned data stream name will be of form "::$DATA" + * + * Per MS-FSCC 2.1.5.3 a stream name must be no more than 255 characters. + * Total calculation for maximum length of response though needs to + * include the separator characters and string indicating that it's a + * data stream. There is no documented limit on number of named streams + * a file may have and so we pass CIFSMaxBufSize as the maximum response + * size. Memory allocation for data out is based on OutputBufferLength + * in SMB2 response. + * + * NOTE: caller must free `data` on success. + */ + + // force memory allocation + *plen = 0; + *data = NULL; + return query_info(xid, tcon, persistent_fid, volatile_fid, + FILE_STREAM_INFORMATION, SMB2_O_INFO_FILE, 0, + CIFSMaxBufSize, + sizeof(struct smb2_file_stream_info), (void **)data, + plen); +} +#endif /* CONFIG_TRUENAS */ + #if 0 /* currently unused, as now we are doing compounding instead (see smb311_posix_query_path_info) */ int diff --git a/fs/smb/client/smb2pdu.h b/fs/smb/client/smb2pdu.h index 076d9e83e1a0..2287fe789c24 100644 --- a/fs/smb/client/smb2pdu.h +++ b/fs/smb/client/smb2pdu.h @@ -414,6 +414,16 @@ struct smb2_posix_info_parsed { const u8 *name; }; +#ifdef CONFIG_TRUENAS +struct smb2_file_stream_info { + __le32 NextEntryOffset; + __le32 StreamNameLength; + __le64 StreamSize; + __le64 StreamAllocationSize; + char StreamName[]; +} __packed; +#endif /* CONFIG_TRUENAS */ + struct smb2_create_ea_ctx { struct create_context_hdr ctx; __u8 name[8]; diff --git a/fs/smb/client/smb2proto.h b/fs/smb/client/smb2proto.h index 6f9885e4f66c..ebbdef96910f 100644 --- a/fs/smb/client/smb2proto.h +++ b/fs/smb/client/smb2proto.h @@ -197,6 +197,13 @@ extern int SMB311_posix_query_info(const unsigned int xid, struct cifs_tcon *tco extern int SMB2_query_info(const unsigned int xid, struct cifs_tcon *tcon, u64 persistent_file_id, u64 volatile_file_id, struct smb2_file_all_info *data); +#ifdef CONFIG_TRUENAS +extern int SMB2_query_streams(const unsigned int xid, struct cifs_tcon *tcon, + u64 persistent_fid, u64 volatile_fid, + struct smb2_file_stream_info **data, u32 *plen); +__le16 * +cifs_convert_stream_path_to_utf16(const char *from, const char *stream, struct cifs_sb_info *cifs_sb); +#endif extern int SMB2_query_info_init(struct cifs_tcon *tcon, struct TCP_Server_Info *server, struct smb_rqst *rqst, diff --git a/fs/smb/client/truenas_streams.c b/fs/smb/client/truenas_streams.c new file mode 100644 index 000000000000..6cfde6e26805 --- /dev/null +++ b/fs/smb/client/truenas_streams.c @@ -0,0 +1,670 @@ +/* SPDX-License-Identifier: LGPL-2.1 */ +/* + * + * Copyright (c) iXsystems, inc (2024) + * Author(s): Andrew Walker + * + */ + +#include +#include "cifspdu.h" +#include "cifsglob.h" +#include "cifsproto.h" +#include "cifs_debug.h" +#include "truenas_streams.h" +#include "cifs_unicode.h" +#include "smb2glob.h" +#include "smb2pdu.h" +#include "smb2proto.h" + +#define STREAM_MAX_RETRIES 5 + +unsigned int streams_samba_compat_enabled = 1; + +struct parsed_stream_info { + u32 size; + u32 allocation_size; + char *stream_name; +}; + +/* + * See MS-FSCC 2.4.43 FileStreamInformation + * + * NOTE regarding stream name: + * It is a sequence of unicode characters containing the name of the stream + * using the form ":streamname:$DATA" or "::$DATA" for the default data stream. + * as specified in MS-FSCC 2.1.4. The field is not null-terminated and MUST + * be handled as a sequence of `namelength` bytes. + * + * NOTE regarding aligment: + * When multiple FILE_STREAM_INFORMATION data elements are present in the + * buffer, each MUST be alinged on an 8-byte boundaries; any bytes inserted + * for alignment SHOULD be set to zero and the receiver MUST ignore them. + */ + +static int +validate_stream_info(struct smb2_file_stream_info *stream, + char *end) +{ + // Check overall stream info + char *stream_buf = (char *)stream + sizeof(struct smb2_file_stream_info); + if ((stream_buf + stream->StreamNameLength) > end) { + return -EOVERFLOW; + } + + if (stream->StreamNameLength < DEFAULT_DATA_STREAMLEN) { + return -EINVAL; + } + + return 0; +} + +static struct smb2_file_stream_info +*get_next_stream(struct smb2_file_stream_info *in, + char *end_of_streams, int *perror) +{ + char *stream_buf = (char *)in; + + if (in->NextEntryOffset == 0) { + // MS-FSCC 2.4.43 - zero means no more entries + return NULL; + } + + stream_buf += in->NextEntryOffset; + if (stream_buf > end_of_streams) { + *perror = -EOVERFLOW; + return NULL; + } + + return (struct smb2_file_stream_info *)stream_buf; +} + +static int +parse_to_xat_buf(struct cifs_sb_info *cifs_sb, + char *dst, size_t dstsz, + struct smb2_file_stream_info *in, + char *end_of_streams, + u32 *pused) +{ + char *name = NULL, *stream_name; + struct smb2_file_stream_info *stream = NULL; + int error = 0; + u32 used = 0; + size_t namelen = 0; + + for (stream = in; + stream != NULL; + stream = get_next_stream(stream, end_of_streams, &error)) { + error = validate_stream_info(stream, end_of_streams); + if (error) { + break; + } + + /* + * `name` is UTF-16 and not NULL-terminated and so convert + * to NULL-terminated UTF-8 string + */ + name = (char *)stream + sizeof(struct smb2_file_stream_info); + + stream_name = cifs_strndup_from_utf16(name, + stream->StreamNameLength, true, cifs_sb->local_nls); + if (stream_name == NULL) { + error = -ENOMEM; + break; + } + namelen = strlen(stream_name); + + // skip default data stream. + if (strcmp(stream_name, DEFAULT_DATA_STREAM) == 0) { + kfree(stream_name); + continue; + } + + // dstsz == 0 means that caller is trying to figure out buffer + // size needed for the xattr names. See man(2) listxattr. + if (dstsz == 0) { + used += (namelen + STREAM_XATTR_PREFIXLEN); + kfree(stream_name); + continue; + } + + if ((namelen + STREAM_XATTR_PREFIXLEN) > dstsz) { + kfree(stream_name); + error = -ERANGE; + break; + } + + dstsz -= STREAM_XATTR_PREFIXLEN; + memcpy(dst, STREAM_XATTR_PREFIX, STREAM_XATTR_PREFIXLEN); + dst += STREAM_XATTR_PREFIXLEN; + + // we'll eat the leading ':' in stream name. `namelen` is + // fine because we want the terminating NULL to be copied over + dstsz -= namelen; + memcpy(dst, stream_name + 1, namelen); + dst += namelen; + + used += (namelen + STREAM_XATTR_PREFIXLEN); + kfree(stream_name); + } + + *pused = used; + return error; +} + +static int +get_streams_by_path(struct dentry *dentry, const char *path, + unsigned int xid, struct cifs_tcon *tcon, + struct smb2_file_stream_info **ppstreams, + u32 *pstreamlen) +{ + u8 oplock = SMB2_OPLOCK_LEVEL_NONE; + struct cifs_sb_info *cifs_sb = CIFS_SB(dentry->d_sb); + int rc; + struct cifs_fid fid; + struct cifs_open_parms oparms; + __le16 *utf16_path; + struct smb2_file_stream_info *pstreams = NULL; + u32 plen; + + cifs_dbg(FYI, "get smb3 streams for path %s\n", path); + + utf16_path = cifs_convert_path_to_utf16(path, cifs_sb); + if (!utf16_path) { + return -ENOMEM; + } + + oparms = (struct cifs_open_parms) { + .tcon = tcon, + .path = path, + .desired_access = FILE_READ_ATTRIBUTES, + .disposition = FILE_OPEN, + .create_options = cifs_create_options(cifs_sb, 0) | + OPEN_REPARSE_POINT, + .fid = &fid, + }; + + // TODO: refactor to use smb2_query_info_compound() to reduce + // network traffic. This would require changing path parsing + // and so currently beyond scope. + rc = SMB2_open(xid, &oparms, utf16_path, &oplock, NULL, NULL, NULL, + NULL); + kfree(utf16_path); + if (rc) + return rc; + + + rc = SMB2_query_streams(xid, tcon, + fid.persistent_fid, + fid.volatile_fid, + &pstreams, &plen); + SMB2_close(xid, tcon, fid.persistent_fid, fid.volatile_fid); + if (rc < 0) { + return rc; + } + + *ppstreams = pstreams; + *pstreamlen = plen; + + return 0; +} + +static int +get_streams_by_fid(const struct cifs_fid *fid, + unsigned int xid, struct cifs_tcon *tcon, + struct smb2_file_stream_info **ppstreams, + u32 *pstreamlen) +{ + int rc = -EOPNOTSUPP; + u32 plen; + struct smb2_file_stream_info *pstreams = NULL; + + rc = SMB2_query_streams(xid, tcon, + fid->persistent_fid, + fid->volatile_fid, + &pstreams, &plen); + if (rc < 0) { + return rc; + } + + *ppstreams = pstreams; + *pstreamlen = plen; + + return 0; +} + +static int +get_smb2_streams(struct dentry *dentry, const char *path, + unsigned int xid, struct cifs_tcon *tcon, + struct smb2_file_stream_info **ppstreams, + u32 *pstreamlen) +{ + int error; + struct cifsFileInfo *open_file = NULL; + struct inode *inode = d_inode(dentry); + + if (inode) + open_file = find_readable_file(CIFS_I(inode), true); + + if (!open_file) + return get_streams_by_path(dentry, path, xid, tcon, ppstreams, pstreamlen); + + error = get_streams_by_fid(&open_file->fid, xid, tcon, ppstreams, pstreamlen); + cifsFileInfo_put(open_file); + + return error; +} + +enum stream_open_type { + STREAM_OPEN_READ, + STREAM_OPEN_WRITE, + STREAM_OPEN_DELETE, +}; + +static int +do_stream_open(struct cifs_tcon *tcon, struct cifs_sb_info *sb, + enum stream_open_type otype, unsigned int xid, + const char *path, const char *stream, + int xattr_flags, struct cifs_fid *fid_out, + struct smb2_file_all_info *info_out) +{ + int rc; + __le16 *utf16_path = NULL; + struct cifs_open_parms oparms; + u8 oplock = SMB2_OPLOCK_LEVEL_NONE; + + switch (otype) { + case STREAM_OPEN_WRITE: + oparms = (struct cifs_open_parms) { + .tcon = tcon, + .cifs_sb = sb, + .desired_access = FILE_WRITE_ATTRIBUTES | + FILE_WRITE_DATA | SYNCHRONIZE, + .create_options = cifs_create_options(sb, CREATE_NOT_DIR) | + OPEN_REPARSE_POINT, + .path = path, + .fid = fid_out, + .mode = ACL_NO_MODE, + }; + switch (xattr_flags) { + case XATTR_CREATE: + oparms.disposition = FILE_CREATE; + break; + case XATTR_REPLACE: + oparms.disposition = FILE_OPEN; + break; + default: + // We may be able to optimize here by + // setting FILE_SUPERSEDE on open and avoid + // setting EOF as a separate operation. + oparms.disposition = FILE_OPEN_IF; + break; + }; + break; + case STREAM_OPEN_READ: + oparms = (struct cifs_open_parms) { + .tcon = tcon, + .cifs_sb = sb, + .desired_access = FILE_READ_ATTRIBUTES | + FILE_READ_DATA | SYNCHRONIZE, + .create_options = cifs_create_options(sb, CREATE_NOT_DIR) | + OPEN_REPARSE_POINT, + .disposition = FILE_OPEN, + .path = path, + .fid = fid_out, + }; + break; + case STREAM_OPEN_DELETE: + oparms = (struct cifs_open_parms) { + .tcon = tcon, + .cifs_sb = sb, + .desired_access = DELETE | FILE_WRITE_ATTRIBUTES, + .create_options = cifs_create_options(sb, CREATE_NOT_DIR) | + OPEN_REPARSE_POINT | CREATE_DELETE_ON_CLOSE, + .disposition = FILE_OPEN, + .path = path, + .fid = fid_out, + }; + break; + default: + BUG(); + }; + + utf16_path = cifs_convert_stream_path_to_utf16(path, stream, sb); + if (!utf16_path) { + return -ENOMEM; + } + + rc = SMB2_open(xid, &oparms, utf16_path, &oplock, info_out, NULL, NULL, NULL); + kfree(utf16_path); + + return rc; +} + +static int +delete_stream(struct dentry *dentry, struct cifs_tcon *tcon, + unsigned int xid, const char *path, const char *stream) +{ + int rc; + struct cifs_fid fid; + struct smb2_file_all_info info; + + rc = do_stream_open(tcon, CIFS_SB(dentry->d_sb), STREAM_OPEN_DELETE, xid, path, stream, 0, &fid, &info); + if (rc) { + // To maintain consistency with removexattr + // failure modes, convert ENOENT to ENODATA. + if (rc == -ENOENT) + rc = -ENODATA; + + return rc; + } + + SMB2_close(xid, tcon, fid.persistent_fid, fid.volatile_fid); + return rc; +} + +static int +write_stream(struct dentry *dentry, struct cifs_tcon *tcon, + const char *data, size_t sz, int flags, unsigned int xid, + const char *path, const char *stream) +{ + /* + * Write alternate data stream for file specified by dentry. + * The stream is temporarily opened to perform IO (there is + * no open for stream associated in VFS). + */ + int rc; + struct cifs_fid fid; + struct cifs_io_parms io_parms; + struct kvec iov[2]; // header, data + struct smb2_file_all_info info; + unsigned int written = 0; + unsigned int total_written; + unsigned int wsize; + struct TCP_Server_Info *server; + + server = cifs_pick_channel(tcon->ses); + if (!server->ops->sync_write) + return -ENOSYS; + + // We will potentially need to break up stream write into chunks. + // Typical IO size in SMB is 1 MiB and typical streams are much + // smaller than this. + wsize = tcon->ses->server->ops->wp_retry_size(d_inode(dentry)); + + // See "Samba background" note in truenas_streams.h + if (streams_samba_compat_enabled) { + sz -= 1; /* Remove NULL appended by samba */ + } + rc = do_stream_open(tcon, CIFS_SB(dentry->d_sb), STREAM_OPEN_WRITE, + xid, path, stream, flags, &fid, &info); + if (rc) { + return rc; + } + + // We may have a short write and so should loop until + // all of payload written + for (total_written = 0; sz > total_written; + total_written += written) { + unsigned int len = min(wsize, sz - total_written); + unsigned int retries = 0; + rc = -EAGAIN; + + io_parms = (struct cifs_io_parms) { + .persistent_fid = fid.persistent_fid, + .volatile_fid = fid.volatile_fid, + .pid = current->tgid, + .tcon = tcon, + .server = server, + .offset = total_written, + .length = len, + }; + + iov[1].iov_base = (char *)data + total_written; + iov[1].iov_len = len; + while ((rc == -EAGAIN) && ((retries += 1) < STREAM_MAX_RETRIES)) { + rc = server->ops->sync_write(xid, &fid, &io_parms, + &written, iov, 1); + } + + if (rc || (written == 0)) { + break; + } + } + + if (total_written < le64_to_cpu(info.EndOfFile)) { + int err; + err = SMB2_set_eof(xid, tcon, fid.persistent_fid, + fid.volatile_fid, current->tgid, total_written); + } + + server->ops->close(xid, tcon, &fid); + if (rc) { + return rc; + } + + return 0; +} + +static int +read_stream(struct dentry *dentry, struct cifs_tcon *tcon, + char *dst, size_t dstsz, unsigned int xid, + const char *path, const char *stream, u32 *pused) +{ + int rc, buf_type = CIFS_NO_BUFFER; + struct cifs_fid fid; + struct cifs_io_parms io_parms; + struct smb2_file_all_info info; + unsigned int bytes_read = 0; + unsigned int total_read; + u32 to_read; + struct TCP_Server_Info *server; + + server = cifs_pick_channel(tcon->ses); + if (!server->ops->sync_read) + return -ENOSYS; + + rc = do_stream_open(tcon, CIFS_SB(dentry->d_sb), STREAM_OPEN_READ, xid, + path, stream, 0, &fid, &info); + if (rc) { + return rc; + } + + if (dstsz == 0) { + server->ops->close(xid, tcon, &fid); + *pused = le64_to_cpu(info.EndOfFile) + streams_samba_compat_enabled; + return 0; + } + + to_read = le64_to_cpu(info.EndOfFile); + if ((to_read >= XATTR_LARGE_SIZE_MAX) || + ((to_read + streams_samba_compat_enabled) > dstsz)) { + /* + * The SMB protocol and MS-FSCC does not provide an upper-bound + * on the maximum size of an alternate data stream. ReFS on + * windows limits ADS max size to 64 KiB, MacOS has no + * real limit on size of resource forks. ZFS doesn't + * have an upper bound on xattr size (these get written as + * files when they're too large), but since our APIs here + * are somewhat terrible (no pwrite / pread equivalent) we + * limit to XATTR_LARGE_SIZE_MAX to reduce maximum allocation + * size that we need to perform. + * + * Typically an alternate data stream will be less than 1 KiB. + */ + + server->ops->close(xid, tcon, &fid); + return -ERANGE; + } + + for (total_read = 0; to_read > total_read; total_read += bytes_read) { + unsigned int len = min(to_read, CIFSMaxBufSize); + unsigned int retries = 0; + rc = -EAGAIN; + char *pbuf = dst + total_read; + + io_parms = (struct cifs_io_parms) { + .persistent_fid = fid.persistent_fid, + .volatile_fid = fid.volatile_fid, + .pid = current->tgid, + .tcon = tcon, + .server = server, + .offset = total_read, + .length = len, + }; + + while ((rc == -EAGAIN) && + ((retries += 1) < STREAM_MAX_RETRIES)) { + rc = server->ops->sync_read(xid, &fid, &io_parms, + &bytes_read, &pbuf, &buf_type); + } + + // If we've read to end of stream, rc will be 0 and bytes_read 0 + if (rc || (bytes_read == 0)) + break; + } + + server->ops->close(xid, tcon, &fid); + if (rc == 0) { + // See "Samba background" note in truenas_streams.h + if (streams_samba_compat_enabled) { + *pused = total_read + 1; + *(dst + total_read) = '\0'; + } else { + *pused = total_read; + } + } + + return rc; +} + +static int +get_stream_name(const char *name_in, char **name_out) +{ + /* + * `name_in` will be of format: "user.DosStream.:$DATA". + * This format matches standard naming convention in Samba's + * vfs_streams_xattr. + * + * `name_out` will contain only the portion of `name_in` + * NOTE: caller must free `name_out`. + * + * Some care needs to be taken here because of the following edge case + * Both and ::$DATA may be used to open the default + * data stream for a file. We need to guard against ever generating the + * latter as a path for getting or setting named streams via an xattr + * handler. + * + * :$DATA:$DATA is also a valid stream name and so strstr + * and similar string-related functions operating "$DATA" should be + * used in a way that avoids or handles this edge case. We avoid + * this here by not including the stream separator as part of the + * xattr name and trimming off sufix starting with the separator ":" + * for the stream suffix. + */ + char *stream_name, *suffix; + + if (strcmp(name_in, DEFAULT_DATA_STREAM) == 0) { + // This is our default data stream "::$DATA" + return -EINVAL; + } + + if (strncmp(name_in, STREAM_XATTR, STREAM_XATTR_LEN) != 0) { + // `name_in` does not start with "user.DosStream." + return -EINVAL; + } + + // Remove the user.DosStream. prefix + stream_name = kstrdup(name_in + STREAM_XATTR_LEN, GFP_KERNEL); + if (stream_name == NULL) { + return -ENOMEM; + } + + suffix = strstr(stream_name, STREAM_SUFFIX); + if (suffix == NULL) { + // malformed stream name (no :$DATA suffix) + kfree(stream_name); + return -EINVAL; + } + + // Remove the stream type suffix and separator ":$DATA" + *suffix = '\0'; + *name_out = stream_name; + return 0; +} + +int set_stream_xattr(struct dentry *dentry, const char *full_path, + unsigned int xid, struct cifs_tcon *tcon, + const char *name, const void *value, size_t size, + int flags) +{ + char *stream_name; + int rc = 0; + + rc = get_stream_name(name, &stream_name); + if (rc) { + return rc; + } + + if ((value == NULL) || (size == 0)) { + rc = delete_stream(dentry, tcon, xid, full_path, stream_name); + } else { + rc = write_stream(dentry, tcon, value, size, flags, xid, + full_path, stream_name); + } + + kfree(stream_name); + + return rc; +} + +int get_stream_xattr(struct dentry *dentry, const char *full_path, + unsigned int xid, struct cifs_tcon *tcon, + const char *name, void *value, size_t size) +{ + char *stream_name; + u32 used; + int rc; + + rc = get_stream_name(name, &stream_name); + if (rc) { + return rc; + } + + rc = read_stream(dentry, tcon, (char *)value, size, xid, + full_path, stream_name, &used); + kfree(stream_name); + if (rc) { + if (rc == -ENOENT) + rc = -ENODATA; + + return rc; + } + + return used; +} + +int list_streams_xattr(struct dentry *dentry, const char *path, + unsigned int xid, struct cifs_tcon *tcon, + char *dst, size_t dstsz) +{ + int error; + struct smb2_file_stream_info *streams = NULL; + u32 slen; + + error = get_smb2_streams(dentry, path, xid, tcon, + &streams, &slen); + if (error) + return error; + + if (slen) { + error = parse_to_xat_buf(CIFS_SB(dentry->d_sb), dst, dstsz, + streams, (char *)streams + slen, + &slen); + } + kfree(streams); + if (error) + return error; + + return slen; +} diff --git a/fs/smb/client/truenas_streams.h b/fs/smb/client/truenas_streams.h new file mode 100644 index 000000000000..bcddf03330ad --- /dev/null +++ b/fs/smb/client/truenas_streams.h @@ -0,0 +1,123 @@ +/* SPDX-License-Identifier: LGPL-2.1 */ +/* + * + * Copyright (c) iXsystems, inc (2024) + * Author(s): Andrew Walker + * + */ + +/* + * SMB Protocol Background: + * ------------------------ + * Filesystems presented over the SMB protocol may support alternate data + * streams ("named streams") within a file or a directory. This support is + * designated by the filesystem attribute FILE_NAMED_STREAMS. Named streams + * are not identical to extended attributes (EAs), which may also be + * supported by the same SMB server. + * + * A named stream is a place within a file in addition to the main stream + * (normal file data) where data is stored. Named streams have different + * data than the main stream (and than each other) and may be written and + * read independently of each other. Named streams for a file are designated + * by appending a ":" colon character to the file name followed by the + * name of the alternate data stream. Stream names may be no more than 255 + * characters in length and are subject to the characteristics and + * limitations documented in MS-FSCC Section 2.1.5 Pathname and following. + * + * A list of named streams for a file can be gathered by submitting an + * SMB2_QUERY_INFO request for FILE_STREAM_INFORMATION. The expected server + * response is documented in MS-FSS Section 2.4.43 FileStreamInformation. + * + * Streams are typically smallish in size (less than 200 bytes individually), + * and are rarely used apart from MacOS SMB clients. + * + * TrueNAS / ZFS background: + * ------------------------- + * Solaris supported a similar feature set through its file-backed xattr + * capabilities and APIs. This meant that the kernel SMB server in solaris + * was able to seamlessly provide support for named streams. When ZFS was + * ported to FreeBSD and Linux the extattr and xattr OS APIs were layered + * on top of the ZFS file-backed xattrs. As time progressed and ZFS on + * Linux saw more use, it was determined that the performance and lack of + * atomicity of operations on file-backed xattrs was insufficient for + * some application requirements (this was especially the case for Samba + * shares), this eventually led to the ZFS dataset configuration parameter + * for SA-backed xattrs on Linux (which is the TrueNAS default). With this + * configuration, xattrs up to a certain size are written as SA, and larger + * xattrs are written as files. The practical result of this is that + * TrueNAS can support extended attributes that are much greater in size + * than a traditional Linux file server. Unfortunately, due to inability + * to perform partial reads and writes on extended attributes a 2 MiB + * upper bound is placed as the maximum size of a single extended attribute + * / named stream in TrueNAS. + * + * Samba background: + * ----------------- + * Samba has the ability to present extended attributes as named streams + * to SMB clients. This is achieved by prepending a special prefix + * "user.DosStream." to the extended attribute (to differentiate the streams + * xattrs from normal xattrs that are presented as EAs over the SMB protocol). + * Due to historical design decisions, the Samba module in charge of translating + * xattrs into streams appends an extra NULL byte to the xattr on writes to the + * local filesystem and strips it off when converting to a stream for SMB + * clients. + * + * Implementation details: + * ----------------------- + * This commit adds support for the Linux kernel SMB2/3 client to enumerate + * streams on a remote SMB server by including them in the output of + * listxattr with the special Samba prefix. Streams may be written to + * the remote SMB server via setxattr and read through getxattr. The + * Samba-specific behavior for appending / removing an extra byte to + * the xattr can be disabled by setting /proc/fs/cifs/stream_samba_compat + * to 0. + * + * Limitations: + * ------------ + * The Linux VFS limits the maximum size of a list of extended attribute + * names to 64 KiB (XATTR_LIST_MAX), this imposes a limit on the total number + * of named streams that may successfully enumerated per-file. In theory this + * should not be an issue since the maximum buffer size for a query-info + * response from the SMB2 server is less than 64 KiB. + * + * The Linux VFS limits the maximum length of an XATTR name to 255 + * characters. The default xattr prefix and stream type suffix both eat into + * the maximum length of name for an alternate data stream that may be + * fetch through an xattr handler to 234 characters. + * + * The TrueNAS kernel limits the maximum size of an XATTR to 2 MiB, see + * notes above on TrueNAS / ZFS background. + */ + +#ifndef _STREAMS_H +#define _STREAMS_H + +#define STREAM_SUFFIX ":$DATA" +#define DEFAULT_DATA_STREAM ":" STREAM_SUFFIX +#define DEFAULT_DATA_STREAMLEN (sizeof(DEFAULT_DATA_STREAM) - 1) + +/* This is the default Samba prefix for a named stream */ +#define STREAM_XATTR "DosStream." +#define STREAM_XATTR_LEN (sizeof(STREAM_XATTR) - 1) + +/* + * The following is equivalent to SAMBA_XATTR_DOSSTREAM_PREFIX in + * source3/include/smb.h in Samba + */ +#define STREAM_XATTR_PREFIX "user." STREAM_XATTR +#define STREAM_XATTR_PREFIXLEN (sizeof(STREAM_XATTR_PREFIX) - 1) + +int list_streams_xattr(struct dentry *dentry, const char *path, + unsigned int xid, struct cifs_tcon *tcon, + char *dst, size_t dstsz); + +int set_stream_xattr(struct dentry *dentry, const char *full_path, + unsigned int xid, struct cifs_tcon *tcon, + const char *name, const void *value, size_t size, + int flags); + +int get_stream_xattr(struct dentry *dentry, const char *full_path, + unsigned int xid, struct cifs_tcon *tcon, + const char *name, void *value, size_t size); + +#endif /* _STREAMS_H */ diff --git a/fs/smb/client/xattr.c b/fs/smb/client/xattr.c index 58a584f0b27e..348aa3da4765 100644 --- a/fs/smb/client/xattr.c +++ b/fs/smb/client/xattr.c @@ -18,6 +18,10 @@ #include "cifs_fs_sb.h" #include "cifs_unicode.h" #include "cifs_ioctl.h" +#ifdef CONFIG_TRUENAS +#include "nfs41acl_xdr.h" +#include "truenas_streams.h" +#endif #define MAX_EA_VALUE_SIZE CIFSMaxBufSize #define CIFS_XATTR_CIFS_ACL "system.cifs_acl" /* DACL only */ @@ -37,8 +41,14 @@ #define SMB3_XATTR_CREATETIME "smb3.creationtime" /* user.smb3.creationtime */ /* BB need to add server (Samba e.g) support for security and trusted prefix */ +#ifdef CONFIG_TRUENAS +#define CIFS_XATTR_ZFS_ACL NA41_NAME /* DACL only */ +enum { XATTR_USER, XATTR_CIFS_ACL, XATTR_ACL_ACCESS, XATTR_ACL_DEFAULT, + XATTR_CIFS_NTSD, XATTR_CIFS_NTSD_FULL, XATTR_ZFSACL }; +#else enum { XATTR_USER, XATTR_CIFS_ACL, XATTR_ACL_ACCESS, XATTR_ACL_DEFAULT, XATTR_CIFS_NTSD, XATTR_CIFS_NTSD_FULL }; +#endif /* CONFIG_TRUENAS */ static int cifs_attrib_set(unsigned int xid, struct cifs_tcon *pTcon, struct inode *inode, const char *full_path, @@ -122,7 +132,12 @@ static int cifs_xattr_set(const struct xattr_handler *handler, /* if proc/fs/cifs/streamstoxattr is set then search server for EAs or streams to returns as xattrs */ +#ifdef CONFIG_TRUENAS + if ((size > MAX_EA_VALUE_SIZE) && + (strncmp(name, STREAM_XATTR, STREAM_XATTR_LEN) != 0)) { +#else if (size > MAX_EA_VALUE_SIZE) { +#endif /* CONFIG_TRUENAS */ cifs_dbg(FYI, "size of EA value too large\n"); rc = -EOPNOTSUPP; goto out; @@ -150,6 +165,13 @@ static int cifs_xattr_set(const struct xattr_handler *handler, if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR) goto out; +#ifdef CONFIG_TRUENAS + if ((pTcon->ses->server->dialect >= SMB21_PROT_ID) && + (strncmp(name, STREAM_XATTR, STREAM_XATTR_LEN) == 0)) { + rc = set_stream_xattr(dentry, full_path, xid, pTcon, + name, value, size, flags); + } else +#endif /* CONFIG_TRUENAS */ if (pTcon->ses->server->ops->set_EA) { rc = pTcon->ses->server->ops->set_EA(xid, pTcon, full_path, name, value, (__u16)size, @@ -203,6 +225,44 @@ static int cifs_xattr_set(const struct xattr_handler *handler, } break; } + +#ifdef CONFIG_TRUENAS + case XATTR_ZFSACL: { + u32 final; + struct smb_ntsd *pacl = NULL; + + if (pTcon->ses->server->ops->set_acl == NULL) + goto out; /* rc already EOPNOTSUPP */ + + if ((global_zfsaclflags & MODFLAG_ALLOW_ACL_WRITE) == 0) { + cifs_dbg(VFS, "ZFSACL write support is disabled\n"); + rc = -EPERM; + goto out; + } + + /* + * Force SMB3 so that we have support for DACL control bit + */ + if (pTcon->ses->server->dialect < SMB30_PROT_ID) { + cifs_dbg(VFS, "ZFS ACL is not supported on this protocol version, " + "use 3.0 or above\n"); + goto out; /* rc already EOPNOTSUPP */ + } + + rc = zfsacl_xattr_to_ntsd((char *)value, size, inode, &pacl, &final); + if (rc == 0) { + rc = pTcon->ses->server->ops->set_acl(pacl, + final, inode, full_path, CIFS_ACL_DACL); + + if (rc == 0) /* force revalidate of the inode */ + CIFS_I(inode)->time = 0; + + kfree(pacl); + } + + break; + } +#endif /* CONFIG_TRUENAS */ } out: @@ -302,6 +362,15 @@ static int cifs_xattr_get(const struct xattr_handler *handler, if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR) goto out; +#ifdef CONFIG_TRUENAS + if ((pTcon->ses->server->dialect >= SMB21_PROT_ID) && + (strncmp(name, STREAM_XATTR, STREAM_XATTR_LEN) == 0)) { + rc = get_stream_xattr(dentry, full_path, xid, pTcon, + name, value, size); + break; + } + +#endif /* CONFIG_TRUENAS */ if (pTcon->ses->server->ops->query_all_EAs) rc = pTcon->ses->server->ops->query_all_EAs(xid, pTcon, full_path, name, value, size, cifs_sb); @@ -343,6 +412,50 @@ static int cifs_xattr_get(const struct xattr_handler *handler, } break; } +#ifdef CONFIG_TRUENAS + case XATTR_ZFSACL: { + struct smb_ntsd *pacl; + char *zfsacl; + u32 acllen; + + if (pTcon->ses->server->ops->get_acl == NULL) { + goto out; /* rc already EOPNOTSUPP */ + } + + /* + * Force SMB3 so that we have support for DACL control bit + */ + if (pTcon->ses->server->dialect < SMB30_PROT_ID) { + cifs_dbg(VFS, "ZFS ACL is not supported on this " + "protocol version, use 3.0 or above\n"); + goto out; /* rc already EOPNOTSUPP */ + } + + pacl = pTcon->ses->server->ops->get_acl(cifs_sb, + inode, full_path, &acllen, 0); + if (IS_ERR(pacl)) { + rc = PTR_ERR(pacl); + cifs_dbg(VFS, "%s: error %zd getting sec desc\n", + __func__, rc); + } else { + rc = ntsd_to_zfsacl_xattr(pacl, acllen, inode, &zfsacl); + kfree(pacl); + } + + if (rc > 0) { + // zero size means return size of buffer needed to get xattr + if (size != 0) { + if (rc > size) + rc = -ERANGE; + else + memcpy(value, zfsacl, rc); + } + + kfree(zfsacl); + } + break; + } +#endif /* CONFIG_TRUENAS */ } /* We could add an additional check for streams ie @@ -396,9 +509,46 @@ ssize_t cifs_listxattr(struct dentry *direntry, char *data, size_t buf_size) search server for EAs or streams to returns as xattrs */ - if (pTcon->ses->server->ops->query_all_EAs) + if (pTcon->ses->server->ops->query_all_EAs) { rc = pTcon->ses->server->ops->query_all_EAs(xid, pTcon, full_path, NULL, data, buf_size, cifs_sb); + if (rc < 0) goto list_ea_exit; + } + +#ifdef CONFIG_TRUENAS + if ((pTcon->ses->server->ops->get_acl) && + (pTcon->ses->server->dialect >= SMB30_PROT_ID)) { + /* + * If OS/2 style EA support is disabled we still + * want to return our special ACL xattr in the list. + */ + rc = rc > 0 ? rc : 0; + if (buf_size) { + if ((rc + sizeof(CIFS_XATTR_ZFS_ACL)) > buf_size) { + rc = -ERANGE; + goto list_ea_exit; + } + memcpy(data + rc, CIFS_XATTR_ZFS_ACL, + sizeof(CIFS_XATTR_ZFS_ACL)); + } + + rc += sizeof(CIFS_XATTR_ZFS_ACL); + } + + // For now we will limit ADS support to SMB 2.10 or greater + if (pTcon->ses->server->dialect >= SMB21_PROT_ID) { + int res; + res = list_streams_xattr(direntry, full_path, xid, pTcon, + data ? data + rc : data, + buf_size ? buf_size - rc : 0); + if (res < 0) { + rc = res; + } else { + rc += res; + } + } +#endif /* CONFIG_TRUENAS */ + list_ea_exit: free_dentry_path(page); free_xid(xid); @@ -448,6 +598,15 @@ static const struct xattr_handler cifs_cifs_ntsd_xattr_handler = { .set = cifs_xattr_set, }; +#ifdef CONFIG_TRUENAS +static const struct xattr_handler zfsacl_xattr_handler = { + .name = CIFS_XATTR_ZFS_ACL, + .flags = XATTR_ZFSACL, + .get = cifs_xattr_get, + .set = cifs_xattr_set, +}; +#endif + /* * Although this is just an alias for the above, need to move away from * confusing users and using the 20 year old term 'cifs' when it is no @@ -490,5 +649,8 @@ const struct xattr_handler * const cifs_xattr_handlers[] = { &smb3_ntsd_xattr_handler, /* alias for above since avoiding "cifs" */ &cifs_cifs_ntsd_full_xattr_handler, &smb3_ntsd_full_xattr_handler, /* alias for above since avoiding "cifs" */ +#ifdef CONFIG_TRUENAS + &zfsacl_xattr_handler, +#endif NULL }; diff --git a/fs/xattr.c b/fs/xattr.c index 05ec7e7d9e87..0e8c32c1e442 100644 --- a/fs/xattr.c +++ b/fs/xattr.c @@ -113,7 +113,11 @@ static int xattr_permission(struct mnt_idmap *idmap, struct inode *inode, const char *name, int mask) { +#if CONFIG_TRUENAS + if (mask & (MAY_WRITE | MAY_WRITE_NAMED_ATTRS)) { +#else if (mask & MAY_WRITE) { +#endif int ret; ret = may_write_xattr(idmap, inode); @@ -134,7 +138,11 @@ xattr_permission(struct mnt_idmap *idmap, struct inode *inode, */ if (!strncmp(name, XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN)) { if (!capable(CAP_SYS_ADMIN)) +#if CONFIG_TRUENAS + return (mask & (MAY_WRITE | MAY_WRITE_NAMED_ATTRS)) ? -EPERM : -ENODATA; +#else return (mask & MAY_WRITE) ? -EPERM : -ENODATA; +#endif return 0; } @@ -145,9 +153,17 @@ xattr_permission(struct mnt_idmap *idmap, struct inode *inode, */ if (!strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN)) { if (!S_ISREG(inode->i_mode) && !S_ISDIR(inode->i_mode)) +#if CONFIG_TRUENAS + return (mask & (MAY_WRITE | MAY_WRITE_NAMED_ATTRS)) ? -EPERM : -ENODATA; +#else return (mask & MAY_WRITE) ? -EPERM : -ENODATA; +#endif if (S_ISDIR(inode->i_mode) && (inode->i_mode & S_ISVTX) && +#if CONFIG_TRUENAS + (mask & (MAY_WRITE | MAY_WRITE_NAMED_ATTRS)) && +#else (mask & MAY_WRITE) && +#endif !inode_owner_or_capable(idmap, inode)) return -EPERM; } @@ -278,8 +294,20 @@ __vfs_setxattr_locked(struct mnt_idmap *idmap, struct dentry *dentry, { struct inode *inode = dentry->d_inode; int error; - +#if CONFIG_TRUENAS + if (IS_NFSV4ACL(inode)) { + error = xattr_permission(idmap, inode, name, MAY_WRITE); + if (error) { + error = xattr_permission(idmap, inode, name, + MAY_WRITE_NAMED_ATTRS); + } + } + else { + error = xattr_permission(idmap, inode, name, MAY_WRITE); + } +#else error = xattr_permission(idmap, inode, name, MAY_WRITE); +#endif if (error) return error; @@ -537,8 +565,20 @@ __vfs_removexattr_locked(struct mnt_idmap *idmap, { struct inode *inode = dentry->d_inode; int error; - +#if CONFIG_TRUENAS + if (IS_NFSV4ACL(inode)) { + error = xattr_permission(idmap, inode, name, MAY_WRITE); + if (error) { + error = xattr_permission(idmap, inode, name, + MAY_WRITE_NAMED_ATTRS); + } + } + else { + error = xattr_permission(idmap, inode, name, MAY_WRITE); + } +#else error = xattr_permission(idmap, inode, name, MAY_WRITE); +#endif if (error) return error; @@ -606,8 +646,13 @@ int setxattr_copy(const char __user *name, struct xattr_ctx *ctx) error = 0; if (ctx->size) { +#ifdef CONFIG_TRUENAS + if (ctx->size > XATTR_LARGE_SIZE_MAX) + return -E2BIG; +#else if (ctx->size > XATTR_SIZE_MAX) return -E2BIG; +#endif ctx->kvalue = vmemdup_user(ctx->cvalue, ctx->size); if (IS_ERR(ctx->kvalue)) { @@ -626,6 +671,12 @@ int do_setxattr(struct mnt_idmap *idmap, struct dentry *dentry, return do_set_acl(idmap, dentry, ctx->kname->name, ctx->kvalue, ctx->size); +#ifdef CONFIG_TRUENAS + if (ctx->size > XATTR_SIZE_MAX && + (IS_LARGE_XATTR(dentry->d_inode) == 0)) { + return -E2BIG; + } +#endif return vfs_setxattr(idmap, dentry, ctx->kname->name, ctx->kvalue, ctx->size, ctx->flags); } @@ -726,8 +777,19 @@ do_getxattr(struct mnt_idmap *idmap, struct dentry *d, char *kname = ctx->kname->name; if (ctx->size) { +#ifdef CONFIG_TRUENAS + if ((ctx->size > XATTR_LARGE_SIZE_MAX) && + IS_LARGE_XATTR(d->d_inode)) { + ctx->size = XATTR_LARGE_SIZE_MAX; + } + else if ((ctx->size > XATTR_SIZE_MAX) && + (IS_LARGE_XATTR(d->d_inode) == 0)) { + ctx->size = XATTR_SIZE_MAX; + } +#else if (ctx->size > XATTR_SIZE_MAX) ctx->size = XATTR_SIZE_MAX; +#endif ctx->kvalue = kvzalloc(ctx->size, GFP_KERNEL); if (!ctx->kvalue) return -ENOMEM; diff --git a/include/linux/ata.h b/include/linux/ata.h index 792e10a09787..ca2302a93ffb 100644 --- a/include/linux/ata.h +++ b/include/linux/ata.h @@ -255,6 +255,7 @@ enum { ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, ATA_CMD_SET_MAX = 0xF9, ATA_CMD_SET_MAX_EXT = 0x37, + ATA_CMD_MAX_ADDR_EXT = 0x78, ATA_CMD_READ_LOG_EXT = 0x2F, ATA_CMD_WRITE_LOG_EXT = 0x3F, ATA_CMD_READ_LOG_DMA_EXT = 0x47, @@ -317,6 +318,9 @@ enum { ATA_SUBCMD_ZAC_MGMT_OUT_OPEN_ZONE = 0x03, ATA_SUBCMD_ZAC_MGMT_OUT_RESET_WRITE_POINTER = 0x04, + /* Subcmds for ATA_CMD_MAX_ADDR_EXT */ + ATA_SUBCMD_MAX_ADDR_SET_EXT = 0x1, + /* READ_LOG_EXT pages */ ATA_LOG_DIRECTORY = 0x0, ATA_LOG_SATA_NCQ = 0x10, diff --git a/include/linux/enclosure.h b/include/linux/enclosure.h index 1c630e2c2756..c31e25a22cd5 100644 --- a/include/linux/enclosure.h +++ b/include/linux/enclosure.h @@ -100,6 +100,8 @@ struct enclosure_device { struct list_head node; struct device edev; struct enclosure_component_callbacks *cb; + struct task_struct *poll_task; + spinlock_t enc_lock; int components; struct enclosure_component component[]; }; diff --git a/include/linux/fs.h b/include/linux/fs.h index 3559446279c1..a4103fb16d53 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -106,6 +106,22 @@ typedef int (dio_iodone_t)(struct kiocb *iocb, loff_t offset, /* called from RCU mode, don't block */ #define MAY_NOT_BLOCK 0x00000080 +#if CONFIG_TRUENAS +/* + * Extended NFSv41 write permissions. These are used selectively + * for permissions checks where NFSv4 ACL handling is + * more nuanced than a simple POSIX permissions. + */ +#define MAY_WRITE_NAMED_ATTRS 0x00000100 +#define MAY_DELETE_CHILD 0x00000400 +#define MAY_WRITE_ATTRS 0x00001000 +#define MAY_DELETE 0x00100000 +#define MAY_WRITE_ACL 0x00400000 +#define MAY_WRITE_OWNER 0x00800000 +#define NFS41ACL_WRITE_ALL (MAY_DELETE_CHILD|MAY_WRITE_ATTRS|MAY_DELETE|\ + MAY_WRITE_ACL|MAY_WRITE_OWNER|MAY_WRITE_NAMED_ATTRS) +#endif + /* * flags in file.f_mode. Note that FMODE_READ and FMODE_WRITE must correspond * to O_WRONLY and O_RDWR via the strange trick in do_dentry_open() @@ -1196,6 +1212,12 @@ extern int send_sigurg(struct file *file); #define SB_ACTIVE BIT(30) #define SB_NOUSER BIT(31) +#ifdef CONFIG_TRUENAS +/* Thes sb flags are related to TrueNAS-specific features */ +#define SB_NFSV4ACL (1<<18) +#define SB_LARGEXATTR (1<<19) +#endif + /* These flags relate to encoding and casefolding */ #define SB_ENC_STRICT_MODE_FL (1 << 0) @@ -2309,6 +2331,11 @@ static inline bool sb_rdonly(const struct super_block *sb) { return sb->s_flags #define IS_POSIXACL(inode) 0 #endif +#ifdef CONFIG_TRUENAS +#define IS_NFSV4ACL(inode) __IS_FLG(inode, SB_NFSV4ACL) +#define IS_LARGE_XATTR(inode) __IS_FLG(inode, SB_LARGEXATTR) +#endif + #define IS_DEADDIR(inode) ((inode)->i_flags & S_DEAD) #define IS_NOCMTIME(inode) ((inode)->i_flags & S_NOCMTIME) diff --git a/include/linux/libata.h b/include/linux/libata.h index 9b4a6ff03235..1deb4b22f65a 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -372,6 +372,7 @@ enum { ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */ ATA_EHI_QUIET = (1 << 3), /* be quiet */ ATA_EHI_NO_RECOVERY = (1 << 4), /* no recovery */ + ATA_EHI_UPDATE_SECTORS = (1 << 5), /* update sector count */ ATA_EHI_DID_SOFTRESET = (1 << 16), /* already soft-reset this port */ ATA_EHI_DID_HARDRESET = (1 << 17), /* already soft-reset this port */ @@ -2147,4 +2148,6 @@ static inline u8 ata_wait_idle(struct ata_port *ap) } #endif /* CONFIG_ATA_SFF */ +extern bool scsi_is_ata(struct scsi_device *sdev); + #endif /* __LINUX_LIBATA_H__ */ diff --git a/include/linux/nfs4.h b/include/linux/nfs4.h index 8d7430d9f218..c5d9cabeab5c 100644 --- a/include/linux/nfs4.h +++ b/include/linux/nfs4.h @@ -36,7 +36,22 @@ struct nfs4_ace { }; }; +#if CONFIG_TRUENAS +/* + * Move this enum here (from nfs_xdr.h) + */ +enum nfs4_acl_type { + NFS4ACL_NONE = 0, + NFS4ACL_ACL, + NFS4ACL_DACL, + NFS4ACL_SACL, +}; +#endif /* CONFIG_TRUENAS */ + struct nfs4_acl { +#if CONFIG_TRUENAS + uint32_t flag; /* NFSv4.1 sacl/dacl mask: ACL4_AUTO_INHERIT, ACL4_PROTECTED, ACL4_DEFAULTED */ +#endif /* CONFIG_TRUENAS */ uint32_t naces; struct nfs4_ace aces[]; }; diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h index 12d8e47bc5a3..aa46d764f1f9 100644 --- a/include/linux/nfs_xdr.h +++ b/include/linux/nfs_xdr.h @@ -824,12 +824,14 @@ struct nfs_setattrargs { const struct nfs4_label *label; }; +#ifndef CONFIG_TRUENAS enum nfs4_acl_type { NFS4ACL_NONE = 0, NFS4ACL_ACL, NFS4ACL_DACL, NFS4ACL_SACL, }; +#endif /* ! CONFIG_TRUENAS */ struct nfs_setaclargs { struct nfs4_sequence_args seq_args; diff --git a/include/linux/nfsacl.h b/include/linux/nfsacl.h index 8e76a79cdc6a..6105c5c2c0ef 100644 --- a/include/linux/nfsacl.h +++ b/include/linux/nfsacl.h @@ -11,6 +11,9 @@ #include #include #include +#if CONFIG_TRUENAS +#include /* For struct nfs4_acl */ +#endif /* CONFIG_TRUENAS */ /* Maximum number of ACL entries over NFS */ #define NFS_ACL_MAX_ENTRIES 1024 @@ -45,4 +48,11 @@ extern bool nfs_stream_encode_acl(struct xdr_stream *xdr, struct inode *inode, struct posix_acl *acl, int encode_entries, int typeflag); +#if CONFIG_TRUENAS +extern int +convert_nfs41xdr_to_nfs40_acl(u32 *xdrbuf, size_t remaining, struct nfs4_acl *acl); +extern int +generate_nfs41acl_buf(u32 *xdrbuf, const struct nfs4_acl *acl, bool isdir); +#endif /* CONFIG_TRUENAS */ + #endif /* __LINUX_NFSACL_H */ diff --git a/include/linux/ntb.h b/include/linux/ntb.h index 191b524e5c0d..29b739ee42f4 100644 --- a/include/linux/ntb.h +++ b/include/linux/ntb.h @@ -432,6 +432,8 @@ struct ntb_dev { #ifdef CONFIG_NTB_MSI struct ntb_msi *msi; #endif + /* Driver name to force a match. */ + char *driver_override; }; #define dev_ntb(__dev) container_of((__dev), struct ntb_dev, dev) diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index 9c540f5468eb..2c9713fbf66c 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -240,6 +240,9 @@ struct scsi_device { unsigned ignore_media_change:1; /* Ignore MEDIA CHANGE on resume */ unsigned silence_suspend:1; /* Do not print runtime PM related messages */ unsigned no_vpd_size:1; /* No VPD size reported in header */ +#ifdef CONFIG_TRUENAS + unsigned genhd_hidden:1; /* Set GENHD_FL_HIDDEN flag when creating gendisk */ +#endif unsigned cdl_supported:1; /* Command duration limits supported */ unsigned cdl_enable:1; /* Enable/disable Command duration limits */ diff --git a/include/uapi/linux/limits.h b/include/uapi/linux/limits.h index 6bcbe3068761..a7042833b682 100644 --- a/include/uapi/linux/limits.h +++ b/include/uapi/linux/limits.h @@ -15,6 +15,7 @@ #define XATTR_NAME_MAX 255 /* # chars in an extended attribute name */ #define XATTR_SIZE_MAX 65536 /* size of an extended attribute value (64k) */ #define XATTR_LIST_MAX 65536 /* size of extended attribute namelist (64k) */ +#define XATTR_LARGE_SIZE_MAX 2097152 /* max size of extended attribute on fs supporting large xattrs */ #define RTSIG_MAX 32 diff --git a/init/Kconfig b/init/Kconfig index c521e1421ad4..08b5d473d192 100644 --- a/init/Kconfig +++ b/init/Kconfig @@ -212,6 +212,12 @@ config LOCALVERSION object and source tree, in that order. Your total string can be a maximum of 64 characters. +config TRUENAS + bool "Enable TrueNAS-specific features" + default n + help + Enables support for NFSv4 ACLs and large xattrs (up to 2 MiB). + config LOCALVERSION_AUTO bool "Automatically append version information to the version string" default y diff --git a/kernel/ksysfs.c b/kernel/ksysfs.c index 1bab21b4718f..b78fe84704b5 100644 --- a/kernel/ksysfs.c +++ b/kernel/ksysfs.c @@ -20,6 +20,7 @@ #include #include /* rcu_expedited and rcu_normal */ +#include /* wait_for_device_probe */ #if defined(__LITTLE_ENDIAN) #define CPU_BYTEORDER_STRING "little" @@ -232,6 +233,22 @@ static ssize_t rcu_normal_store(struct kobject *kobj, KERNEL_ATTR_RW(rcu_normal); #endif /* #ifndef CONFIG_TINY_RCU */ +static ssize_t wait_for_device_probe_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + return sprintf(buf, "0\n"); +} +static ssize_t wait_for_device_probe_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + wait_for_device_probe(); + + return count; +} +KERNEL_ATTR_RW(wait_for_device_probe); + /* * Make /sys/kernel/notes give the raw contents of our kernel .notes section. */ @@ -286,6 +303,7 @@ static struct attribute * kernel_attrs[] = { &rcu_expedited_attr.attr, &rcu_normal_attr.attr, #endif + &wait_for_device_probe_attr.attr, NULL }; diff --git a/scripts/package/builddeb b/scripts/package/builddeb index 441b0bb66e0d..81f3daf18c1e 100755 --- a/scripts/package/builddeb +++ b/scripts/package/builddeb @@ -73,20 +73,8 @@ install_linux_image () { mkdir -p "${pdir}${debhookdir}/${script}.d" mkdir -p "${pdir}/DEBIAN" - cat <<-EOF > "${pdir}/DEBIAN/${script}" - #!/bin/sh - - set -e - - # Pass maintainer script parameters to hook scripts - export DEB_MAINT_PARAMS="\$*" - - # Tell initramfs builder whether it's wanted - export INITRD=$(if_enabled_echo CONFIG_BLK_DEV_INITRD Yes No) - - test -d ${debhookdir}/${script}.d && run-parts --arg="${KERNELRELEASE}" --arg="/${installed_image_path}" ${debhookdir}/${script}.d - exit 0 - EOF + cp "scripts/package/truenas/$script" "${pdir}/DEBIAN/${script}" + sed -i "3i version=$KERNELRELEASE" "${pdir}/DEBIAN/${script}" chmod 755 "${pdir}/DEBIAN/${script}" done } @@ -125,8 +113,8 @@ install_kernel_headers () { CC="${DEB_HOST_GNU_TYPE}-gcc" "${srctree}/scripts/package/install-extmod-build" "${pdir}/usr/src/linux-headers-${version}" - mkdir -p $pdir/lib/modules/$version/ - ln -s /usr/src/linux-headers-$version $pdir/lib/modules/$version/build + mkdir -p $pdir/lib/modules/${KERNELRELEASE}/ + ln -s /usr/src/linux-headers-$version $pdir/lib/modules/${KERNELRELEASE}/build } install_libc_headers () { @@ -140,6 +128,18 @@ install_libc_headers () { mv "$pdir/usr/include/asm" "$pdir/usr/include/${DEB_HOST_MULTIARCH}" } +install_perf () { + tools_dir=debian/$1 + rm -rf $tools_dir + mkdir -p $tools_dir + tools_dest=`readlink -f $tools_dir` + output=$(readlink -f $objtree) + mkdir -p $output/tools/perf + output="O=$output/tools/perf" + $MAKE -C $srctree/tools/perf $output LDFLAGS= srctree=$(readlink -f $objtree) prefix=$tools_dest/usr NO_LIBTRACEEVENT=1 install + dpkg-shlibdeps $tools_dest/usr/bin/* +} + package=$1 case "${package}" in @@ -147,8 +147,12 @@ case "${package}" in install_linux_image_dbg "${package}";; linux-image-*|user-mode-linux-*) install_linux_image "${package}";; -linux-libc-dev) +linux-*-libc-dev) install_libc_headers "${package}";; linux-headers-*) install_kernel_headers "${package}";; +linux-perf-truenas) + if is_enabled CONFIG_PERF_EVENTS && echo "${KERNELRELEASE}" | grep -q "production"; then + install_perf "${package}" + fi;; esac diff --git a/scripts/package/debian-uefi-certs.pem b/scripts/package/debian-uefi-certs.pem new file mode 100644 index 000000000000..9834ea47126d --- /dev/null +++ b/scripts/package/debian-uefi-certs.pem @@ -0,0 +1,41 @@ +-----BEGIN CERTIFICATE----- +MIIDnjCCAoagAwIBAgIRAO1UodWvh0iUjZ+JMu6cfDQwDQYJKoZIhvcNAQELBQAw +IDEeMBwGA1UEAxMVRGViaWFuIFNlY3VyZSBCb290IENBMB4XDTE2MDgxNjE4MDkx +OFoXDTQ2MDgwOTE4MDkxOFowIDEeMBwGA1UEAxMVRGViaWFuIFNlY3VyZSBCb290 +IENBMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAnZXUi5vaEKwuyoI3 +waTLSsMbQpPCeinTbt1kr4Cv6maiG2GcgwzFa7k1Jf/F++gpQ97OSz3GEk2x7yZD +lWjNBBH+wiSb3hTYhlHoOEO9sZoV5Qhr+FRQi7NLX/wU5DVQfAux4gOEqDZI5IDo +6p/6v8UYe17OHL4sgHhJNRXAIc/vZtWKlggrZi9IF7Hn7IKPB+bK4F9xJDlQCo7R +cihQpZ0h9ONhugkDZsjfTiY2CxUPYx8rr6vEKKJWZIWNplVBrjyIld3Qbdkp29jE +aLX89FeJaxTb4O/uQA1iH+pY1KPYugOmly7FaxOkkXemta0jp+sKSRRGfHbpnjK0 +ia9XeQIDAQABo4HSMIHPMEEGCCsGAQUFBwEBBDUwMzAxBggrBgEFBQcwAoYlaHR0 +cHM6Ly9kc2EuZGViaWFuLm9yZy9zZWN1cmUtYm9vdC1jYTAfBgNVHSMEGDAWgBRs +zs5+TGwNH2FJ890n38xcu0GeoTAUBglghkgBhvhCAQEBAf8EBAMCAPcwEwYDVR0l +BAwwCgYIKwYBBQUHAwMwDgYDVR0PAQH/BAQDAgGGMA8GA1UdEwEB/wQFMAMBAf8w +HQYDVR0OBBYEFGzOzn5MbA0fYUnz3SffzFy7QZ6hMA0GCSqGSIb3DQEBCwUAA4IB +AQB3lj5Hyc4Jz4uJzlntJg4mC7mtqSu9oeuIeQL/Md7+9WoH72ETEXAev5xOZmzh +YhKXAVdlR91Kxvf03qjxE2LMg1esPKaRFa9VJnJpLhTN3U2z0WAkLTJPGWwRXvKj +8qFfYg8wrq3xSGZkfTZEDQY0PS6vjp3DrcKR2Dfg7npfgjtnjgCKxKTfNRbCcitM +UdeTk566CA1Zl/LiKaBETeru+D4CYMoVz06aJZGEP7dax+68a4Cj2f2ybXoeYxTr +7/GwQCXV6A6B62v3y//lIQAiLC6aNWASS1tfOEaEDAacz3KTYhjuXJjWs30GJTmV +305gdrAGewiwbuNknyFWrTkP +-----END CERTIFICATE----- +-----BEGIN CERTIFICATE----- +MIIDATCCAemgAwIBAgIFALVes7kwDQYJKoZIhvcNAQELBQAwIDEeMBwGA1UEAxMV +RGViaWFuIFNlY3VyZSBCb290IENBMB4XDTIwMDcyMTE1NTI1NFoXDTMwMDcyMTE1 +NTI1NFowKTEnMCUGA1UEAxMeRGViaWFuIFNlY3VyZSBCb290IFNpZ25lciAyMDIw +MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAzZTMfLXsQ7y5hYyNaA7R +0PFJ1xqStP93srUShRG1hT9FKMXk8Ylf8lgzuQzKfqiYIw3JTok6lgsWVKGIYrQO +oXGB3LcUB641onF6xzpdDDhqmupbhXoSYNTEnwg/3cHuoFwIbvpGEUKcbTANZ85e +kJUIgjILeyQ8Ks1seyyHyo0BH8jsM53N8NpZLf9L4nYSi5uFcvY11Zkc7mOrltE+ +b0r8NX1scHnxRUy7KUqrmhWN+XBYRD6p97CJ2j+idfJqcq5RUXa8g3CorMv9N+Rt +EKewpevMKc/O1SWdXH6h7LbJ7LlUerCoU4LFuiJx5RcSh7PhHbsnGc/3hT5JyKSr +PQIDAQABozkwNzARBglghkgBhvhCAQEEBAMCBBAwFQYDVR0lBA4wDAYKKwYBBAGC +NwoDATALBgNVHQ8EBAMCB4AwDQYJKoZIhvcNAQELBQADggEBAGsgHaFyCmfhQyGk ++bCfcmTx2JpPOKD49DBOHOPeZJ5pmym9ouCyY5q4v2fIcB0twFKAZZtD/LLmxsbD +xUZXIIWU06cn3+zURPeRSGQltJupnE6cm3IB+iFTEmZUBUHREEUlEwRE/n9le6GL +s0Z3P0bK4dD/mTy9mLKs1sFSplXvFSJd9gpM0tboMvCJa6G1cC/52MsA4SeKAIDY +/oFT+d/Lq36rBjtvCS1IGP2qq2W/Q2q7xDImnISXonlHWcHxaMgNK8j0QsZEsWvW +3mC4oonxYCH5pBTacuUpcLPtv5HYOdcbR3ENYZ0Ut41HSVhmzf+oJg+fz+HSlkvG +/GOXjcs= +-----END CERTIFICATE----- diff --git a/scripts/package/debian/rules b/scripts/package/debian/rules index ca07243bd5cd..ea806041234e 100755 --- a/scripts/package/debian/rules +++ b/scripts/package/debian/rules @@ -25,13 +25,14 @@ revision = $(lastword $(subst -, ,$(shell dpkg-parsechangelog -S Version))) CROSS_COMPILE ?= $(filter-out $(DEB_BUILD_GNU_TYPE)-, $(DEB_HOST_GNU_TYPE)-) make-opts = ARCH=$(ARCH) KERNELRELEASE=$(KERNELRELEASE) KBUILD_BUILD_VERSION=$(revision) $(addprefix CROSS_COMPILE=,$(CROSS_COMPILE)) -binary-targets := $(addprefix binary-, image image-dbg headers libc-dev) +binary-targets := $(addprefix binary-, image image-dbg headers libc-dev perf) all-packages = $(shell dh_listpackages) image-package = $(filter linux-image-% user-%, $(filter-out %-dbg, $(all-packages))) image-dbg-package = $(filter %-dbg, $(all-packages)) -libc-dev-package = $(filter linux-libc-dev, $(all-packages)) +libc-dev-package = $(filter %-libc-dev, $(all-packages)) headers-package = $(filter linux-headers-%, $(all-packages)) +perf-package = $(filter linux-perf-%, $(all-packages)) mk-files = $(patsubst binary-%,debian/%.files,$1) package = $($(@:binary-%=%-package)) diff --git a/scripts/package/mkdebian b/scripts/package/mkdebian index fc3b7fa709fc..37109baaaefd 100755 --- a/scripts/package/mkdebian +++ b/scripts/package/mkdebian @@ -4,7 +4,14 @@ # # Simple script to generate a debian/ directory for a Linux kernel. -set -eu +set -e + +KERNELRELEASE="${KERNELRELEASE:=$(cat include/config/kernel.release)}" +KDEB_SOURCENAME="${KDEB_SOURCENAME:="linux-$KERNELRELEASE"}" +UTS_MACHINE="${UTS_MACHINE:="x86_64"}" +MAINTAINER="Debian Packages List " +MAKE="${MAKE:="/usr/bin/make"}" +ARCH="${ARCH:="x86"}" is_enabled() { grep -q "^$1=y" include/config/auto.conf @@ -125,15 +132,7 @@ gen_source () rm -rf debian mkdir debian -user=${KBUILD_BUILD_USER:-$(id -nu)} -name=${DEBFULLNAME:-${user}} -if [ "${DEBEMAIL:+set}" ]; then - email=${DEBEMAIL} -else - buildhost=${KBUILD_BUILD_HOST:-$(hostname -f 2>/dev/null || hostname)} - email="${user}@${buildhost}" -fi -maintainer="${name} <${email}>" +maintainer=$MAINTAINER while [ $# -gt 0 ]; do case "$1" in @@ -149,17 +148,25 @@ done # Some variables and settings used throughout the script version=$KERNELRELEASE +echo "XXX: Kernel_release: ${version}" +if echo "$version" | grep -q "debug"; then + exversion="debug" +else + exversion="production" +fi +echo "XXX: Extra version: ${exversion}" if [ "${KDEB_PKGVERSION:+set}" ]; then packageversion=$KDEB_PKGVERSION else + srctree=. packageversion=$(${srctree}/scripts/setlocalversion --no-local ${srctree})-$($srctree/scripts/build-version) fi -sourcename=${KDEB_SOURCENAME:-linux-upstream} +sourcename=${KDEB_SOURCENAME:-linux-$KERNELRELEASE} if [ "$ARCH" = "um" ] ; then packagename=user-mode-linux else - packagename=linux-image + packagename=linux-image-truenas-$exversion-amd64 fi debarch= @@ -181,15 +188,6 @@ echo $debarch > debian/arch host_gnu=$(dpkg-architecture -a "${debarch}" -q DEB_HOST_GNU_TYPE | sed 's/_/-/g') -# Generate a simple changelog template -cat < debian/changelog -$sourcename ($packageversion) $distribution; urgency=low - - * Custom built Linux kernel. - - -- $maintainer $(date -R) -EOF - # Generate a control file cat < debian/control Source: $sourcename @@ -205,8 +203,10 @@ Build-Depends-Arch: bc, bison, cpio, flex, rsync Homepage: https://www.kernel.org/ -Package: $packagename-$version +Package: $packagename Architecture: $debarch +Provides: $packagename, linux-image-$KERNELRELEASE, linux-image-generic +Depends: kmod, linux-base (>= 4.3~), initramfs-tools (>= 0.120+deb8u2) | linux-initramfs-tools Description: Linux kernel, version $version This package contains the Linux kernel, modules and corresponding other files, version: $version. @@ -215,9 +215,10 @@ EOF if [ "${SRCARCH}" != um ]; then cat <> debian/control -Package: linux-libc-dev +Package: linux-truenas-$exversion-libc-dev Section: devel -Provides: linux-kernel-headers +Provides: linux-kernel-headers, linux-libc-dev +Conflicts: linux-libc-dev Architecture: $debarch Description: Linux support headers for userspace development This package provides userspaces headers from the Linux kernel. These headers @@ -228,8 +229,9 @@ EOF if is_enabled CONFIG_MODULES; then cat <> debian/control -Package: linux-headers-$version +Package: linux-headers-truenas-$exversion-$debarch Architecture: $debarch +Provides: linux-headers-$debarch Build-Profiles: Description: Linux kernel headers for $version on $debarch This package provides kernel header files for $version on $debarch @@ -242,7 +244,8 @@ fi if is_enabled CONFIG_DEBUG_INFO; then cat <> debian/control -Package: linux-image-$version-dbg +Package: $packagename-dbg +Provides: linux-image-$debarch-dbg Section: debug Architecture: $debarch Build-Profiles: @@ -252,12 +255,35 @@ Description: Linux kernel debugging symbols for $version EOF fi +if is_enabled CONFIG_PERF_EVENTS && [ "$exversion" = "production" ]; then +cat <> debian/control + +Package: linux-perf-truenas +Architecture: $debarch +Replaces: linux-base, linux-tools-common, linux-perf +Depends: \${shlibs:Depends} +Description: Performance analysis tools for Linux $version + This package contains the 'perf' performance analysis tools for Linux + kernel version $version . +EOF +fi + +if [ ! -f debian/changelog ]; then + dch --no-conf -b --package $sourcename --newversion $version-1 \ + --distribution sid --urgency low \ + --changelog scripts/package/truenas/changelog \ + --controlmaint Build TrueNAS $exverison kernel +fi + cat < debian/rules.vars ARCH := ${ARCH} KERNELRELEASE := ${KERNELRELEASE} EOF -cp "${srctree}/scripts/package/debian/copyright" debian/ cp "${srctree}/scripts/package/debian/rules" debian/ +mkdir -p debian/certs +cp scripts/package/truenas/debian-uefi-certs.pem debian/certs +cp scripts/package/truenas/changelog debian/changelog +cp scripts/package/truenas/copyright debian/copyright exit 0 diff --git a/scripts/package/truenas/changelog b/scripts/package/truenas/changelog new file mode 100644 index 000000000000..fd2322f223fa --- /dev/null +++ b/scripts/package/truenas/changelog @@ -0,0 +1,185 @@ +linux-6.12.0+truenas (6.12.0+truenas-1) sid; urgency=low + + * Import upstream Linux 6.12 branch. + + -- Debian Packages List Mon, 18 Nov 2024 15:00:00 +0500 + +linux-6.6.44+truenas (6.6.44+truenas-1) sid; urgency=low + + * Merge upstream v6.6.44 release. + + -- Debian Packages List Mon, 5 Aug 2024 17:00:00 +0500 + +linux-6.6.40+truenas (6.6.40+truenas-1) sid; urgency=low + + * Merge upstream v6.6.40 release. + + -- Debian Packages List Tue, 16 Jul 2024 17:00:00 +0500 + +linux-6.6.32+truenas (6.6.32+truenas-1) sid; urgency=low + + * Merge upstream v6.6.32 release. + + -- Debian Packages List Thu, 6 Jun 2024 11:00:00 +0500 + +linux-6.6.29+truenas (6.6.29+truenas-1) sid; urgency=low + + * Merge upstream v6.6.29 release. + + -- Debian Packages List Wed, 1 May 2024 22:00:00 +0500 + +linux-6.6.20+truenas (6.6.20+truenas-1) sid; urgency=low + + * Merge upstream v6.6.20 release. + + -- Debian Packages List Mon, 4 Mar 2024 09:00:00 +0500 + +linux-6.6.16+truenas (6.6.16+truenas-1) sid; urgency=low + + * Merge upstream v6.6.16 release. + + -- Debian Packages List Wed, 7 Feb 2024 19:00:00 +0500 + +linux-6.6.10+truenas (6.6.10+truenas-1) sid; urgency=low + + * Merge upstream v6.6.10 release. + + -- Debian Packages List Wed, 10 Jan 2024 19:00:00 +0500 + +linux-6.6.2+truenas (6.6.2+truenas-1) sid; urgency=low + + * Rebase to upstream v6.6.2 release + + -- Debian Packages List Mon, 20 Nov 2023 19:00:00 +0500 + +linux-6.6.1+truenas (6.6.1+truenas-1) sid; urgency=low + + * Merge upstream v6.6.1 release + + -- Debian Packages List Mon, 13 Nov 2023 12:00:00 +0500 + +linux-6.1.55+truenas (6.1.55+truenas-1) sid; urgency=low + + * Merge upstream v6.1.55 release + + -- iXsystems engineering team Mon, 02 Oct 2023 18:00:00 +0500 + +linux-6.1.50+truenas (6.1.50+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v6.1.50 + + -- iXsystems engineering team Thu, 14 Sep 2023 18:00:00 +0500 + +linux-6.1.49+truenas (6.1.49+truenas-1) sid; urgency=low + + * ntb_hw_amd: Simulate link flap after unclean reboot + + -- iXsystems engineering team Web, 13 Sep 2023 14:00:00 +0500 + +linux-6.1.49+truenas (6.1.49+truenas-1) sid; urgency=low + + * ntb_hw_amd: Simulate link flap after unclean reboot + + -- iXsystems engineering team Web, 13 Sep 2023 14:00:00 +0500 + +linux-6.1.49+truenas (6.1.49+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v6.1.49 + + -- iXsystems engineering team Tue, 29 Aug 2023 11:00:00 +0500 + +linux-6.1.42+truenas (6.1.42+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v6.1.42 + + -- iXsystems engineering team Mon, 31 Jul 2023 20:00:00 +0500 + +linux-6.1.40+truenas (6.1.40+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v6.1.40 + + -- iXsystems engineering team Tue, 25 Jul 2023 17:00:00 +0500 + +linux-6.1.24+truenas (6.1.24+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v6.1.24 + + -- iXsystems engineering team Thu, 19 Apr 2023 12:00:00 -0500 + +linux-5.15.79+truenas (5.15.79+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v5.15.79 + + -- iXsystems engineering team Fri, 18 Nov 2022 12:00:00 -0500 + +linux-5.15.62+truenas (5.15.62+truenas-2) sid; urgency=low + + * Change target SATA mobile link power management policy to max_performance + + -- iXsystems engineering team Tue, 1 Nov 2022 12:00:00 -0500 + +linux-5.15.62+truenas (5.15.62+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v5.15.62 + + -- iXsystems engineering team Tue, 23 Aug 2022 12:00:00 -0500 + +linux-5.15.45+truenas (5.15.45+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v5.15.45 + + -- iXsystems engineering team Tue, 7 Jun 2022 12:00:00 -0500 + +linux-5.15.44+truenas (5.15.44+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v5.15.44 + + -- iXsystems engineering team Tue, 2 Jun 2022 12:00:00 -0500 + +linux-5.15.34+truenas (5.15.34+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v5.15.34 + + -- iXsystems engineering team Tue, 19 Apr 2022 12:00:00 -0500 + +linux-5.15.32+truenas (5.15.32+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v5.15.32 + + -- iXsystems engineering team Mon, 28 Mar 2022 12:00:00 -0500 + +linux-5.15.26+truenas (5.15.26+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v5.15.26 + + -- iXsystems engineering team Tue, 8 Mar 2022 12:00:00 -0500 + +linux-5.14.8+truenas (5.14.8+truenas-1) sid; urgency=low + + * Rebase local commits onto upstream v5.14.8 + + -- iXsystems engineering team Tue, 6 Aug 2021 12:00:00 -0500 + +linux-5.10.58+truenas (5.10.58+truenas-1) sid; urgency=low + + * Merge upstream v5.10.58 + + -- iXsystems engineering team Tue, 17 Aug 2021 12:00:00 -0500 + +linux-5.10.42+truenas (5.10.42+truenas-3) sid; urgency=low + + * Merge upstream v5.10.42 + + -- iXsystems engineering team Mon, 14 Jun 2021 16:21:00 -0500 + +linux-5.10.18+truenas (5.10.18+truenas-2) sid; urgency=low + + * Implement NFS4 ACL support + + -- iXsystems engineering team Tue, 27 Apr 2021 10:21:00 -0500 + +linux-5.10.18+truenas (5.10.18+truenas-1) sid; urgency=low + + * Import upstream Linux 5.10 branch. + + -- iXsystems engineering team Wed, 10 Feb 2021 07:58:44 -0500 diff --git a/scripts/package/truenas/copyright b/scripts/package/truenas/copyright new file mode 100644 index 000000000000..7b7c51ffdc65 --- /dev/null +++ b/scripts/package/truenas/copyright @@ -0,0 +1,16 @@ +This is a packacked upstream version of the Linux kernel. + +The sources may be found at most Linux archive sites, including: +https://www.kernel.org/pub/linux/kernel + +Copyright: 1991 - 2018 Linus Torvalds and others. + +The git repository for mainline kernel development is at: +git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; version 2 dated June, 1991. + +On Debian GNU/Linux systems, the complete text of the GNU General Public +License version 2 can be found in `/usr/share/common-licenses/GPL-2'. diff --git a/scripts/package/truenas/debian-uefi-certs.pem b/scripts/package/truenas/debian-uefi-certs.pem new file mode 100644 index 000000000000..9834ea47126d --- /dev/null +++ b/scripts/package/truenas/debian-uefi-certs.pem @@ -0,0 +1,41 @@ +-----BEGIN CERTIFICATE----- +MIIDnjCCAoagAwIBAgIRAO1UodWvh0iUjZ+JMu6cfDQwDQYJKoZIhvcNAQELBQAw +IDEeMBwGA1UEAxMVRGViaWFuIFNlY3VyZSBCb290IENBMB4XDTE2MDgxNjE4MDkx +OFoXDTQ2MDgwOTE4MDkxOFowIDEeMBwGA1UEAxMVRGViaWFuIFNlY3VyZSBCb290 +IENBMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAnZXUi5vaEKwuyoI3 +waTLSsMbQpPCeinTbt1kr4Cv6maiG2GcgwzFa7k1Jf/F++gpQ97OSz3GEk2x7yZD +lWjNBBH+wiSb3hTYhlHoOEO9sZoV5Qhr+FRQi7NLX/wU5DVQfAux4gOEqDZI5IDo +6p/6v8UYe17OHL4sgHhJNRXAIc/vZtWKlggrZi9IF7Hn7IKPB+bK4F9xJDlQCo7R +cihQpZ0h9ONhugkDZsjfTiY2CxUPYx8rr6vEKKJWZIWNplVBrjyIld3Qbdkp29jE +aLX89FeJaxTb4O/uQA1iH+pY1KPYugOmly7FaxOkkXemta0jp+sKSRRGfHbpnjK0 +ia9XeQIDAQABo4HSMIHPMEEGCCsGAQUFBwEBBDUwMzAxBggrBgEFBQcwAoYlaHR0 +cHM6Ly9kc2EuZGViaWFuLm9yZy9zZWN1cmUtYm9vdC1jYTAfBgNVHSMEGDAWgBRs +zs5+TGwNH2FJ890n38xcu0GeoTAUBglghkgBhvhCAQEBAf8EBAMCAPcwEwYDVR0l +BAwwCgYIKwYBBQUHAwMwDgYDVR0PAQH/BAQDAgGGMA8GA1UdEwEB/wQFMAMBAf8w +HQYDVR0OBBYEFGzOzn5MbA0fYUnz3SffzFy7QZ6hMA0GCSqGSIb3DQEBCwUAA4IB +AQB3lj5Hyc4Jz4uJzlntJg4mC7mtqSu9oeuIeQL/Md7+9WoH72ETEXAev5xOZmzh +YhKXAVdlR91Kxvf03qjxE2LMg1esPKaRFa9VJnJpLhTN3U2z0WAkLTJPGWwRXvKj +8qFfYg8wrq3xSGZkfTZEDQY0PS6vjp3DrcKR2Dfg7npfgjtnjgCKxKTfNRbCcitM +UdeTk566CA1Zl/LiKaBETeru+D4CYMoVz06aJZGEP7dax+68a4Cj2f2ybXoeYxTr +7/GwQCXV6A6B62v3y//lIQAiLC6aNWASS1tfOEaEDAacz3KTYhjuXJjWs30GJTmV +305gdrAGewiwbuNknyFWrTkP +-----END CERTIFICATE----- +-----BEGIN CERTIFICATE----- +MIIDATCCAemgAwIBAgIFALVes7kwDQYJKoZIhvcNAQELBQAwIDEeMBwGA1UEAxMV +RGViaWFuIFNlY3VyZSBCb290IENBMB4XDTIwMDcyMTE1NTI1NFoXDTMwMDcyMTE1 +NTI1NFowKTEnMCUGA1UEAxMeRGViaWFuIFNlY3VyZSBCb290IFNpZ25lciAyMDIw +MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAzZTMfLXsQ7y5hYyNaA7R +0PFJ1xqStP93srUShRG1hT9FKMXk8Ylf8lgzuQzKfqiYIw3JTok6lgsWVKGIYrQO +oXGB3LcUB641onF6xzpdDDhqmupbhXoSYNTEnwg/3cHuoFwIbvpGEUKcbTANZ85e +kJUIgjILeyQ8Ks1seyyHyo0BH8jsM53N8NpZLf9L4nYSi5uFcvY11Zkc7mOrltE+ +b0r8NX1scHnxRUy7KUqrmhWN+XBYRD6p97CJ2j+idfJqcq5RUXa8g3CorMv9N+Rt +EKewpevMKc/O1SWdXH6h7LbJ7LlUerCoU4LFuiJx5RcSh7PhHbsnGc/3hT5JyKSr +PQIDAQABozkwNzARBglghkgBhvhCAQEEBAMCBBAwFQYDVR0lBA4wDAYKKwYBBAGC +NwoDATALBgNVHQ8EBAMCB4AwDQYJKoZIhvcNAQELBQADggEBAGsgHaFyCmfhQyGk ++bCfcmTx2JpPOKD49DBOHOPeZJ5pmym9ouCyY5q4v2fIcB0twFKAZZtD/LLmxsbD +xUZXIIWU06cn3+zURPeRSGQltJupnE6cm3IB+iFTEmZUBUHREEUlEwRE/n9le6GL +s0Z3P0bK4dD/mTy9mLKs1sFSplXvFSJd9gpM0tboMvCJa6G1cC/52MsA4SeKAIDY +/oFT+d/Lq36rBjtvCS1IGP2qq2W/Q2q7xDImnISXonlHWcHxaMgNK8j0QsZEsWvW +3mC4oonxYCH5pBTacuUpcLPtv5HYOdcbR3ENYZ0Ut41HSVhmzf+oJg+fz+HSlkvG +/GOXjcs= +-----END CERTIFICATE----- diff --git a/scripts/package/truenas/debian_amd64.config b/scripts/package/truenas/debian_amd64.config new file mode 100644 index 000000000000..41c6c37b5c60 --- /dev/null +++ b/scripts/package/truenas/debian_amd64.config @@ -0,0 +1,11004 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/x86 6.6.15 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="gcc-13 (Debian 13.2.0-13) 13.2.0" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=130200 +CONFIG_CLANG_VERSION=0 +CONFIG_AS_IS_GNU=y +CONFIG_AS_VERSION=24200 +CONFIG_LD_IS_BFD=y +CONFIG_LD_VERSION=24200 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y +CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y +CONFIG_TOOLS_SUPPORT_RELR=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_PAHOLE_VERSION=124 +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +# CONFIG_WERROR is not set +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_ZSTD=y +# CONFIG_KERNEL_GZIP is not set +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +CONFIG_KERNEL_XZ=y +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +# CONFIG_KERNEL_ZSTD is not set +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_USELIB=y +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_INJECTION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y +CONFIG_GENERIC_IRQ_RESERVATION_MODE=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_ARCH_CLOCKSOURCE_INIT=y +CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +# CONFIG_NO_HZ_IDLE is not set +CONFIG_NO_HZ_FULL=y +CONFIG_CONTEXT_TRACKING_USER=y +# CONFIG_CONTEXT_TRACKING_USER_FORCE is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=125 +# end of Timers subsystem + +CONFIG_BPF=y +CONFIG_HAVE_EBPF_JIT=y +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y + +# +# BPF subsystem +# +CONFIG_BPF_SYSCALL=y +CONFIG_BPF_JIT=y +# CONFIG_BPF_JIT_ALWAYS_ON is not set +CONFIG_BPF_JIT_DEFAULT_ON=y +CONFIG_BPF_UNPRIV_DEFAULT_OFF=y +# CONFIG_BPF_PRELOAD is not set +CONFIG_BPF_LSM=y +# end of BPF subsystem + +CONFIG_PREEMPT_BUILD=y +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +CONFIG_PREEMPT_COUNT=y +CONFIG_PREEMPTION=y +CONFIG_PREEMPT_DYNAMIC=y +# CONFIG_SCHED_CORE is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_VIRT_CPU_ACCOUNTING=y +CONFIG_VIRT_CPU_ACCOUNTING_GEN=y +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_PSI=y +# CONFIG_PSI_DEFAULT_DISABLED is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_RCU=y +CONFIG_TASKS_RUDE_RCU=y +CONFIG_TASKS_TRACE_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_NOCB_CPU=y +# CONFIG_RCU_NOCB_CPU_DEFAULT_ALL is not set +# CONFIG_RCU_LAZY is not set +# end of RCU Subsystem + +# CONFIG_IKCONFIG is not set +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +# CONFIG_PRINTK_INDEX is not set +CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y +CONFIG_CC_HAS_INT128=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_NUMA_BALANCING=y +CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +# CONFIG_CGROUP_FAVOR_DYNMODS is not set +CONFIG_MEMCG=y +CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_SCHED_MM_CID=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_RDMA=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_MISC=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_SOCK_CGROUP_DATA=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +# CONFIG_BOOT_CONFIG is not set +CONFIG_INITRAMFS_PRESERVE_MTIME=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y +CONFIG_LD_ORPHAN_WARN_LEVEL="warn" +CONFIG_SYSCTL=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_HAVE_PCSPKR_PLATFORM=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +CONFIG_SGETMASK_SYSCALL=y +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_GUEST_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_SYSTEM_DATA_VERIFICATION=y +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y + +# +# Kexec and crash features +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +CONFIG_HAVE_IMA_KEXEC=y +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +CONFIG_KEXEC_SIG=y +# CONFIG_KEXEC_SIG_FORCE is not set +CONFIG_KEXEC_BZIMAGE_VERIFY_SIG=y +# CONFIG_KEXEC_JUMP is not set +CONFIG_CRASH_DUMP=y +CONFIG_CRASH_HOTPLUG=y +CONFIG_CRASH_MAX_MEMORY_RANGES=8192 +# end of Kexec and crash features +# end of General setup + +CONFIG_64BIT=y +CONFIG_X86_64=y +CONFIG_X86=y +CONFIG_INSTRUCTION_DECODER=y +CONFIG_OUTPUT_FORMAT="elf64-x86-64" +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_MMU=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=28 +CONFIG_ARCH_MMAP_RND_BITS_MAX=32 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_HAS_CPU_RELAX=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_AUDIT_ARCH=y +CONFIG_HAVE_INTEL_TXT=y +CONFIG_X86_64_SMP=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_DYNAMIC_PHYSICAL_MASK=y +CONFIG_PGTABLE_LEVELS=5 +CONFIG_CC_HAS_SANE_STACKPROTECTOR=y + +# +# Processor type and features +# +CONFIG_SMP=y +CONFIG_X86_X2APIC=y +CONFIG_X86_MPPARSE=y +# CONFIG_GOLDFISH is not set +CONFIG_X86_CPU_RESCTRL=y +# CONFIG_X86_EXTENDED_PLATFORM is not set +CONFIG_X86_INTEL_LPSS=y +CONFIG_X86_AMD_PLATFORM_DEVICE=y +CONFIG_IOSF_MBI=y +# CONFIG_IOSF_MBI_DEBUG is not set +CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_HYPERVISOR_GUEST=y +CONFIG_PARAVIRT=y +CONFIG_PARAVIRT_XXL=y +# CONFIG_PARAVIRT_DEBUG is not set +CONFIG_PARAVIRT_SPINLOCKS=y +CONFIG_X86_HV_CALLBACK_VECTOR=y +CONFIG_XEN=y +CONFIG_XEN_PV=y +CONFIG_XEN_512GB=y +CONFIG_XEN_PV_SMP=y +CONFIG_XEN_PV_DOM0=y +CONFIG_XEN_PVHVM=y +CONFIG_XEN_PVHVM_SMP=y +CONFIG_XEN_PVHVM_GUEST=y +CONFIG_XEN_SAVE_RESTORE=y +# CONFIG_XEN_DEBUG_FS is not set +CONFIG_XEN_PVH=y +CONFIG_XEN_DOM0=y +CONFIG_XEN_PV_MSR_SAFE=y +CONFIG_KVM_GUEST=y +CONFIG_ARCH_CPUIDLE_HALTPOLL=y +CONFIG_PVH=y +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_PARAVIRT_CLOCK=y +# CONFIG_JAILHOUSE_GUEST is not set +# CONFIG_ACRN_GUEST is not set +CONFIG_INTEL_TDX_GUEST=y +# CONFIG_MK8 is not set +# CONFIG_MPSC is not set +# CONFIG_MCORE2 is not set +# CONFIG_MATOM is not set +CONFIG_GENERIC_CPU=y +CONFIG_X86_INTERNODE_CACHE_SHIFT=6 +CONFIG_X86_L1_CACHE_SHIFT=6 +CONFIG_X86_TSC=y +CONFIG_X86_CMPXCHG64=y +CONFIG_X86_CMOV=y +CONFIG_X86_MINIMUM_CPU_FAMILY=64 +CONFIG_X86_DEBUGCTLMSR=y +CONFIG_IA32_FEAT_CTL=y +CONFIG_X86_VMX_FEATURE_NAMES=y +# CONFIG_PROCESSOR_SELECT is not set +CONFIG_CPU_SUP_INTEL=y +CONFIG_CPU_SUP_AMD=y +CONFIG_CPU_SUP_HYGON=y +CONFIG_CPU_SUP_CENTAUR=y +CONFIG_CPU_SUP_ZHAOXIN=y +CONFIG_HPET_TIMER=y +CONFIG_HPET_EMULATE_RTC=y +CONFIG_DMI=y +CONFIG_GART_IOMMU=y +CONFIG_BOOT_VESA_SUPPORT=y +CONFIG_MAXSMP=y +CONFIG_NR_CPUS_RANGE_BEGIN=8192 +CONFIG_NR_CPUS_RANGE_END=8192 +CONFIG_NR_CPUS_DEFAULT=8192 +CONFIG_NR_CPUS=8192 +CONFIG_SCHED_CLUSTER=y +CONFIG_SCHED_SMT=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_MC_PRIO=y +CONFIG_X86_LOCAL_APIC=y +CONFIG_X86_IO_APIC=y +CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y +CONFIG_X86_MCE=y +# CONFIG_X86_MCELOG_LEGACY is not set +CONFIG_X86_MCE_INTEL=y +CONFIG_X86_MCE_AMD=y +CONFIG_X86_MCE_THRESHOLD=y +CONFIG_X86_MCE_INJECT=m + +# +# Performance monitoring +# +CONFIG_PERF_EVENTS_INTEL_UNCORE=m +CONFIG_PERF_EVENTS_INTEL_RAPL=m +CONFIG_PERF_EVENTS_INTEL_CSTATE=m +CONFIG_PERF_EVENTS_AMD_POWER=m +CONFIG_PERF_EVENTS_AMD_UNCORE=y +# CONFIG_PERF_EVENTS_AMD_BRS is not set +# end of Performance monitoring + +CONFIG_X86_16BIT=y +CONFIG_X86_ESPFIX64=y +CONFIG_X86_VSYSCALL_EMULATION=y +CONFIG_X86_IOPL_IOPERM=y +CONFIG_MICROCODE=y +# CONFIG_MICROCODE_LATE_LOADING is not set +CONFIG_X86_MSR=m +CONFIG_X86_CPUID=m +CONFIG_X86_5LEVEL=y +CONFIG_X86_DIRECT_GBPAGES=y +# CONFIG_X86_CPA_STATISTICS is not set +CONFIG_X86_MEM_ENCRYPT=y +CONFIG_AMD_MEM_ENCRYPT=y +# CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set +CONFIG_NUMA=y +CONFIG_AMD_NUMA=y +CONFIG_X86_64_ACPI_NUMA=y +CONFIG_NUMA_EMU=y +CONFIG_NODES_SHIFT=10 +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +# CONFIG_ARCH_MEMORY_PROBE is not set +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_X86_PMEM_LEGACY_DEVICE=y +CONFIG_X86_PMEM_LEGACY=m +# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set +CONFIG_MTRR=y +CONFIG_MTRR_SANITIZER=y +CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0 +CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 +CONFIG_X86_PAT=y +CONFIG_ARCH_USES_PG_UNCACHED=y +CONFIG_X86_UMIP=y +CONFIG_CC_HAS_IBT=y +CONFIG_X86_CET=y +CONFIG_X86_KERNEL_IBT=y +CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y +CONFIG_X86_INTEL_TSX_MODE_OFF=y +# CONFIG_X86_INTEL_TSX_MODE_ON is not set +# CONFIG_X86_INTEL_TSX_MODE_AUTO is not set +CONFIG_X86_SGX=y +# CONFIG_X86_USER_SHADOW_STACK is not set +CONFIG_EFI=y +CONFIG_EFI_STUB=y +CONFIG_EFI_HANDOVER_PROTOCOL=y +CONFIG_EFI_MIXED=y +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_RUNTIME_MAP=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_KEXEC=y +CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y +CONFIG_ARCH_SELECTS_KEXEC_FILE=y +CONFIG_ARCH_SUPPORTS_KEXEC_PURGATORY=y +CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y +CONFIG_ARCH_SUPPORTS_KEXEC_SIG_FORCE=y +CONFIG_ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG=y +CONFIG_ARCH_SUPPORTS_KEXEC_JUMP=y +CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_SUPPORTS_CRASH_HOTPLUG=y +CONFIG_PHYSICAL_START=0x1000000 +CONFIG_RELOCATABLE=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_X86_NEED_RELOCS=y +CONFIG_PHYSICAL_ALIGN=0x200000 +CONFIG_DYNAMIC_MEMORY_LAYOUT=y +CONFIG_RANDOMIZE_MEMORY=y +CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0xa +# CONFIG_ADDRESS_MASKING is not set +CONFIG_HOTPLUG_CPU=y +# CONFIG_COMPAT_VDSO is not set +# CONFIG_LEGACY_VSYSCALL_XONLY is not set +CONFIG_LEGACY_VSYSCALL_NONE=y +# CONFIG_CMDLINE_BOOL is not set +CONFIG_MODIFY_LDT_SYSCALL=y +# CONFIG_STRICT_SIGALTSTACK_SIZE is not set +CONFIG_HAVE_LIVEPATCH=y +CONFIG_LIVEPATCH=y +# end of Processor type and features + +CONFIG_CC_HAS_SLS=y +CONFIG_CC_HAS_RETURN_THUNK=y +CONFIG_CC_HAS_ENTRY_PADDING=y +CONFIG_FUNCTION_PADDING_CFI=11 +CONFIG_FUNCTION_PADDING_BYTES=16 +CONFIG_CALL_PADDING=y +CONFIG_HAVE_CALL_THUNKS=y +CONFIG_CALL_THUNKS=y +CONFIG_PREFIX_SYMBOLS=y +CONFIG_SPECULATION_MITIGATIONS=y +CONFIG_PAGE_TABLE_ISOLATION=y +CONFIG_RETPOLINE=y +CONFIG_RETHUNK=y +CONFIG_CPU_UNRET_ENTRY=y +CONFIG_CALL_DEPTH_TRACKING=y +# CONFIG_CALL_THUNKS_DEBUG is not set +CONFIG_CPU_IBPB_ENTRY=y +CONFIG_CPU_IBRS_ENTRY=y +CONFIG_CPU_SRSO=y +CONFIG_SLS=y +# CONFIG_GDS_FORCE_MITIGATION is not set +CONFIG_ARCH_HAS_ADD_PAGES=y + +# +# Power management and ACPI options +# +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_USERSPACE_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_DPM_WATCHDOG is not set +# CONFIG_PM_TRACE_RTC is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_ENERGY_MODEL=y +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y +CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y +CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +CONFIG_ACPI_TABLE_LIB=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_FPDT is not set +CONFIG_ACPI_LPIT=y +CONFIG_ACPI_SLEEP=y +CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_AC=m +CONFIG_ACPI_BATTERY=m +CONFIG_ACPI_BUTTON=m +# CONFIG_ACPI_TINY_POWER_BUTTON is not set +CONFIG_ACPI_VIDEO=m +CONFIG_ACPI_FAN=m +CONFIG_ACPI_TAD=m +CONFIG_ACPI_DOCK=y +CONFIG_ACPI_CPU_FREQ_PSS=y +CONFIG_ACPI_PROCESSOR_CSTATE=y +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_CPPC_LIB=y +CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_IPMI=m +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_PROCESSOR_AGGREGATOR=m +CONFIG_ACPI_THERMAL=y +CONFIG_ACPI_PLATFORM_PROFILE=m +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +CONFIG_ACPI_PCI_SLOT=y +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_HOTPLUG_MEMORY=y +CONFIG_ACPI_HOTPLUG_IOAPIC=y +CONFIG_ACPI_SBS=m +CONFIG_ACPI_HED=y +# CONFIG_ACPI_CUSTOM_METHOD is not set +CONFIG_ACPI_BGRT=y +# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set +CONFIG_ACPI_NFIT=m +# CONFIG_NFIT_SECURITY_DEBUG is not set +CONFIG_ACPI_NUMA=y +CONFIG_ACPI_HMAT=y +CONFIG_HAVE_ACPI_APEI=y +CONFIG_HAVE_ACPI_APEI_NMI=y +CONFIG_ACPI_APEI=y +CONFIG_ACPI_APEI_GHES=y +CONFIG_ACPI_APEI_PCIEAER=y +CONFIG_ACPI_APEI_MEMORY_FAILURE=y +CONFIG_ACPI_APEI_EINJ=m +# CONFIG_ACPI_APEI_ERST_DEBUG is not set +# CONFIG_ACPI_DPTF is not set +CONFIG_ACPI_WATCHDOG=y +CONFIG_ACPI_EXTLOG=y +CONFIG_ACPI_ADXL=y +# CONFIG_ACPI_CONFIGFS is not set +# CONFIG_ACPI_PFRUT is not set +CONFIG_ACPI_PCC=y +# CONFIG_ACPI_FFH is not set +CONFIG_PMIC_OPREGION=y +CONFIG_BYTCRC_PMIC_OPREGION=y +CONFIG_CHTCRC_PMIC_OPREGION=y +CONFIG_XPOWER_PMIC_OPREGION=y +CONFIG_BXT_WC_PMIC_OPREGION=y +CONFIG_CHT_WC_PMIC_OPREGION=y +CONFIG_CHT_DC_TI_PMIC_OPREGION=y +# CONFIG_TPS68470_PMIC_OPREGION is not set +CONFIG_ACPI_PRMT=y +CONFIG_X86_PM_TIMER=y + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=m +CONFIG_CPU_FREQ_GOV_ONDEMAND=m +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_X86_INTEL_PSTATE=y +CONFIG_X86_PCC_CPUFREQ=m +CONFIG_X86_AMD_PSTATE=y +CONFIG_X86_AMD_PSTATE_DEFAULT_MODE=3 +# CONFIG_X86_AMD_PSTATE_UT is not set +CONFIG_X86_ACPI_CPUFREQ=m +CONFIG_X86_ACPI_CPUFREQ_CPB=y +CONFIG_X86_POWERNOW_K8=m +CONFIG_X86_AMD_FREQ_SENSITIVITY=m +CONFIG_X86_SPEEDSTEP_CENTRINO=m +CONFIG_X86_P4_CLOCKMOD=m + +# +# shared options +# +CONFIG_X86_SPEEDSTEP_LIB=m +# end of CPU Frequency scaling + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +CONFIG_CPU_IDLE_GOV_HALTPOLL=y +CONFIG_HALTPOLL_CPUIDLE=y +# end of CPU Idle + +CONFIG_INTEL_IDLE=y +# end of Power management and ACPI options + +# +# Bus options (PCI etc.) +# +CONFIG_PCI_DIRECT=y +CONFIG_PCI_MMCONFIG=y +CONFIG_PCI_XEN=y +CONFIG_MMCONF_FAM10H=y +# CONFIG_PCI_CNB20LE_QUIRK is not set +# CONFIG_ISA_BUS is not set +CONFIG_ISA_DMA_API=y +CONFIG_AMD_NB=y +# end of Bus options (PCI etc.) + +# +# Binary Emulations +# +CONFIG_IA32_EMULATION=y +CONFIG_X86_X32_ABI=y +CONFIG_COMPAT_32=y +CONFIG_X86_X32_DISABLED=y +CONFIG_COMPAT=y +CONFIG_COMPAT_FOR_U64_ALIGNMENT=y +# end of Binary Emulations + +CONFIG_HAVE_KVM=y +CONFIG_HAVE_KVM_PFNCACHE=y +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_KVM_IRQFD=y +CONFIG_HAVE_KVM_IRQ_ROUTING=y +CONFIG_HAVE_KVM_DIRTY_RING=y +CONFIG_HAVE_KVM_DIRTY_RING_TSO=y +CONFIG_HAVE_KVM_DIRTY_RING_ACQ_REL=y +CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_KVM_MMIO=y +CONFIG_KVM_ASYNC_PF=y +CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y +CONFIG_KVM_VFIO=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_KVM_COMPAT=y +CONFIG_HAVE_KVM_IRQ_BYPASS=y +CONFIG_HAVE_KVM_NO_POLL=y +CONFIG_KVM_XFER_TO_GUEST_WORK=y +CONFIG_HAVE_KVM_PM_NOTIFIER=y +CONFIG_KVM_GENERIC_HARDWARE_ENABLING=y +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=m +CONFIG_KVM_WERROR=y +CONFIG_KVM_INTEL=m +CONFIG_X86_SGX_KVM=y +CONFIG_KVM_AMD=m +CONFIG_KVM_AMD_SEV=y +CONFIG_KVM_SMM=y +# CONFIG_KVM_XEN is not set +# CONFIG_KVM_PROVE_MMU is not set +CONFIG_KVM_EXTERNAL_WRITE_TRACKING=y +CONFIG_AS_AVX512=y +CONFIG_AS_SHA1_NI=y +CONFIG_AS_SHA256_NI=y +CONFIG_AS_TPAUSE=y +CONFIG_AS_GFNI=y +CONFIG_AS_WRUSS=y + +# +# General architecture-dependent options +# +CONFIG_HOTPLUG_SMT=y +CONFIG_HOTPLUG_CORE_SYNC=y +CONFIG_HOTPLUG_CORE_SYNC_DEAD=y +CONFIG_HOTPLUG_CORE_SYNC_FULL=y +CONFIG_HOTPLUG_SPLIT_STARTUP=y +CONFIG_HOTPLUG_PARALLEL=y +CONFIG_GENERIC_ENTRY=y +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +# CONFIG_STATIC_CALL_SELFTEST is not set +CONFIG_OPTPROBES=y +CONFIG_KPROBES_ON_FTRACE=y +CONFIG_UPROBES=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_KRETPROBES=y +CONFIG_KRETPROBE_ON_RETHOOK=y +CONFIG_USER_RETURN_NOTIFIER=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_KPROBES_ON_FTRACE=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_ARCH_HAS_CPU_FINALIZE_INIT=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y +CONFIG_HAVE_USER_RETURN_NOTIFIER=y +CONFIG_HAVE_PERF_EVENTS_NMI=y +CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_MMU_GATHER_MERGE_VMAS=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y +CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y +CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y +CONFIG_HAVE_CONTEXT_TRACKING_USER=y +CONFIG_HAVE_CONTEXT_TRACKING_USER_OFFSTACK=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_WANT_PMD_MKWRITE=y +CONFIG_HAVE_ARCH_SOFT_DIRTY=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_HAVE_EXIT_THREAD=y +CONFIG_ARCH_MMAP_RND_BITS=28 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 +CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_HAVE_OBJTOOL=y +CONFIG_HAVE_JUMP_LABEL_HACK=y +CONFIG_HAVE_NOINSTR_HACK=y +CONFIG_HAVE_NOINSTR_VALIDATION=y +CONFIG_HAVE_UACCESS_VALIDATION=y +CONFIG_HAVE_STACK_VALIDATION=y +CONFIG_HAVE_RELIABLE_STACKTRACE=y +CONFIG_ISA_BUS_API=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_ARCH_HAS_CC_PLATFORM=y +CONFIG_HAVE_STATIC_CALL=y +CONFIG_HAVE_STATIC_CALL_INLINE=y +CONFIG_HAVE_PREEMPT_DYNAMIC=y +CONFIG_HAVE_PREEMPT_DYNAMIC_CALL=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y +CONFIG_ARCH_HAS_ELFCORE_COMPAT=y +CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y +CONFIG_DYNAMIC_SIGFRAME=y +CONFIG_HAVE_ARCH_NODE_DEV_GROUP=y +CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_FUNCTION_ALIGNMENT_4B=y +CONFIG_FUNCTION_ALIGNMENT_16B=y +CONFIG_FUNCTION_ALIGNMENT=16 +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULE_SIG_FORMAT=y +CONFIG_MODULES=y +# CONFIG_MODULE_DEBUG is not set +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set +CONFIG_MODVERSIONS=y +CONFIG_ASM_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_MODULE_SIG=y +# CONFIG_MODULE_SIG_FORCE is not set +# CONFIG_MODULE_SIG_SHA1 is not set +# CONFIG_MODULE_SIG_SHA224 is not set +CONFIG_MODULE_SIG_SHA256=y +# CONFIG_MODULE_SIG_SHA384 is not set +# CONFIG_MODULE_SIG_SHA512 is not set +CONFIG_MODULE_SIG_HASH="sha256" +# CONFIG_MODULE_COMPRESS_NONE is not set +# CONFIG_MODULE_COMPRESS_GZIP is not set +CONFIG_MODULE_COMPRESS_XZ=y +# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_DECOMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +CONFIG_MODPROBE_PATH="/sbin/modprobe" +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLOCK_LEGACY_AUTOLOAD=y +CONFIG_BLK_RQ_ALLOC_TIME=y +CONFIG_BLK_CGROUP_RWSTAT=y +CONFIG_BLK_CGROUP_PUNT_BIO=y +CONFIG_BLK_DEV_BSG_COMMON=y +CONFIG_BLK_ICQ=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=m +CONFIG_BLK_DEV_ZONED=y +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_DEV_THROTTLING_LOW is not set +CONFIG_BLK_WBT=y +CONFIG_BLK_WBT_MQ=y +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_FC_APPID is not set +CONFIG_BLK_CGROUP_IOCOST=y +# CONFIG_BLK_CGROUP_IOPRIO is not set +CONFIG_BLK_DEBUG_FS=y +CONFIG_BLK_DEBUG_FS_ZONED=y +CONFIG_BLK_SED_OPAL=y +# CONFIG_BLK_INLINE_ENCRYPTION is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +CONFIG_ACORN_PARTITION=y +# CONFIG_ACORN_PARTITION_CUMANA is not set +# CONFIG_ACORN_PARTITION_EESOX is not set +CONFIG_ACORN_PARTITION_ICS=y +# CONFIG_ACORN_PARTITION_ADFS is not set +# CONFIG_ACORN_PARTITION_POWERTEC is not set +CONFIG_ACORN_PARTITION_RISCIX=y +# CONFIG_AIX_PARTITION is not set +CONFIG_OSF_PARTITION=y +CONFIG_AMIGA_PARTITION=y +CONFIG_ATARI_PARTITION=y +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +# CONFIG_LDM_DEBUG is not set +CONFIG_SGI_PARTITION=y +CONFIG_ULTRIX_PARTITION=y +CONFIG_SUN_PARTITION=y +CONFIG_KARMA_PARTITION=y +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y +CONFIG_BLOCK_HOLDER_DEPRECATED=y +CONFIG_BLK_MQ_STACKING=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=m +CONFIG_IOSCHED_BFQ=m +CONFIG_BFQ_GROUP_IOSCHED=y +# CONFIG_BFQ_CGROUP_DEBUG is not set +# end of IO Schedulers + +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_PADATA=y +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +CONFIG_BINFMT_MISC=m +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_ZPOOL=y +CONFIG_SWAP=y +CONFIG_ZSWAP=y +# CONFIG_ZSWAP_DEFAULT_ON is not set +# CONFIG_ZSWAP_EXCLUSIVE_LOADS_DEFAULT_ON is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set +CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set +CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo" +CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y +# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set +# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set +CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" +CONFIG_ZBUD=y +CONFIG_Z3FOLD=m +CONFIG_ZSMALLOC=m +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_ZSMALLOC_CHAIN_SIZE=8 + +# +# SLAB allocator options +# +# CONFIG_SLAB_DEPRECATED is not set +CONFIG_SLUB=y +# CONFIG_SLUB_TINY is not set +CONFIG_SLAB_MERGE_DEFAULT=y +CONFIG_SLAB_FREELIST_RANDOM=y +CONFIG_SLAB_FREELIST_HARDENED=y +# CONFIG_SLUB_STATS is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_RANDOM_KMALLOC_CACHES is not set +# end of SLAB allocator options + +CONFIG_SHUFFLE_PAGE_ALLOCATOR=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_ARCH_WANT_OPTIMIZE_DAX_VMEMMAP=y +CONFIG_ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_NUMA_KEEP_MEMINFO=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_HAVE_BOOTMEM_INFO_NODE=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_MEMORY_HOTPLUG=y +CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y +CONFIG_MEMORY_HOTREMOVE=y +CONFIG_MHP_MEMMAP_ON_MEMORY=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +CONFIG_DEVICE_MIGRATION=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y +CONFIG_ARCH_ENABLE_THP_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +CONFIG_HWPOISON_INJECT=m +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +CONFIG_THP_SWAP=y +# CONFIG_READ_ONLY_THP_FOR_FS is not set +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +# CONFIG_CMA is not set +CONFIG_MEM_SOFT_DIRTY=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_DEFERRED_STRUCT_PAGE_INIT=y +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_ARCH_HAS_ZONE_DMA_SET=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ZONE_DEVICE=y +CONFIG_HMM_MIRROR=y +CONFIG_GET_FREE_REGION=y +# CONFIG_DEVICE_PRIVATE is not set +CONFIG_VMAP_PFN=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +CONFIG_ARCH_HAS_PKEYS=y +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_TEST is not set +# CONFIG_DMAPOOL_TEST is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_MAPPING_DIRTY_HELPERS=y +CONFIG_MEMFD_CREATE=y +CONFIG_SECRETMEM=y +# CONFIG_ANON_VMA_NAME is not set +CONFIG_USERFAULTFD=y +CONFIG_HAVE_ARCH_USERFAULTFD_WP=y +CONFIG_HAVE_ARCH_USERFAULTFD_MINOR=y +CONFIG_PTE_MARKER_UFFD_WP=y +CONFIG_LRU_GEN=y +CONFIG_LRU_GEN_ENABLED=y +# CONFIG_LRU_GEN_STATS is not set +CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y +CONFIG_PER_VMA_LOCK=y +CONFIG_LOCK_MM_AND_FIND_VMA=y + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y +CONFIG_NET_XGRESS=y +CONFIG_NET_REDIRECT=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=m +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +CONFIG_AF_UNIX_OOB=y +CONFIG_UNIX_DIAG=m +CONFIG_TLS=m +CONFIG_TLS_DEVICE=y +# CONFIG_TLS_TOE is not set +CONFIG_XFRM=y +CONFIG_XFRM_OFFLOAD=y +CONFIG_XFRM_ALGO=m +CONFIG_XFRM_USER=m +# CONFIG_XFRM_USER_COMPAT is not set +CONFIG_XFRM_INTERFACE=m +CONFIG_XFRM_SUB_POLICY=y +CONFIG_XFRM_MIGRATE=y +CONFIG_XFRM_STATISTICS=y +CONFIG_XFRM_AH=m +CONFIG_XFRM_ESP=m +CONFIG_XFRM_IPCOMP=m +CONFIG_NET_KEY=m +CONFIG_NET_KEY_MIGRATE=y +CONFIG_SMC=m +CONFIG_SMC_DIAG=m +CONFIG_XDP_SOCKETS=y +CONFIG_XDP_SOCKETS_DIAG=m +CONFIG_NET_HANDSHAKE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_FIB_TRIE_STATS=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_ROUTE_CLASSID=y +# CONFIG_IP_PNP is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE_DEMUX=m +CONFIG_NET_IP_TUNNEL=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_MULTIPLE_TABLES=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_SYN_COOKIES=y +CONFIG_NET_IPVTI=m +CONFIG_NET_UDP_TUNNEL=m +CONFIG_NET_FOU=m +CONFIG_NET_FOU_IP_TUNNELS=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_ESP_OFFLOAD=m +# CONFIG_INET_ESPINTCP is not set +CONFIG_INET_IPCOMP=m +CONFIG_INET_TABLE_PERTURB_ORDER=16 +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=m +CONFIG_INET_TCP_DIAG=m +CONFIG_INET_UDP_DIAG=m +CONFIG_INET_RAW_DIAG=m +CONFIG_INET_DIAG_DESTROY=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_NV=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_TCP_CONG_DCTCP=m +CONFIG_TCP_CONG_CDG=m +CONFIG_TCP_CONG_BBR=m +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_MD5SIG=y +CONFIG_IPV6=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_ESP_OFFLOAD=m +# CONFIG_INET6_ESPINTCP is not set +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_ILA=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_IPV6_VTI=m +CONFIG_IPV6_SIT=m +CONFIG_IPV6_SIT_6RD=y +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_GRE=m +CONFIG_IPV6_FOU=m +CONFIG_IPV6_FOU_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y +CONFIG_IPV6_PIMSM_V2=y +CONFIG_IPV6_SEG6_LWTUNNEL=y +CONFIG_IPV6_SEG6_HMAC=y +CONFIG_IPV6_SEG6_BPF=y +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_IPV6_IOAM6_LWTUNNEL is not set +CONFIG_NETLABEL=y +CONFIG_MPTCP=y +CONFIG_INET_MPTCP_DIAG=m +CONFIG_MPTCP_IPV6=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NETWORK_PHY_TIMESTAMPING=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_EGRESS=y +CONFIG_NETFILTER_SKIP_EGRESS=y +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_FAMILY_BRIDGE=y +CONFIG_NETFILTER_FAMILY_ARP=y +CONFIG_NETFILTER_BPF_LINK=y +# CONFIG_NETFILTER_NETLINK_HOOK is not set +CONFIG_NETFILTER_NETLINK_ACCT=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_OSF=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_SYSLOG=m +CONFIG_NETFILTER_CONNCOUNT=m +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_ZONES=y +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_TIMEOUT=y +CONFIG_NF_CONNTRACK_TIMESTAMP=y +CONFIG_NF_CONNTRACK_LABELS=y +CONFIG_NF_CONNTRACK_OVS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_GRE=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_BROADCAST=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_SNMP=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NF_CT_NETLINK_TIMEOUT=m +CONFIG_NF_CT_NETLINK_HELPER=m +CONFIG_NETFILTER_NETLINK_GLUE_CT=y +CONFIG_NF_NAT=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_SIP=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NF_NAT_OVS=y +CONFIG_NETFILTER_SYNPROXY=m +CONFIG_NF_TABLES=m +CONFIG_NF_TABLES_INET=y +CONFIG_NF_TABLES_NETDEV=y +CONFIG_NFT_NUMGEN=m +CONFIG_NFT_CT=m +CONFIG_NFT_FLOW_OFFLOAD=m +CONFIG_NFT_CONNLIMIT=m +CONFIG_NFT_LOG=m +CONFIG_NFT_LIMIT=m +CONFIG_NFT_MASQ=m +CONFIG_NFT_REDIR=m +CONFIG_NFT_NAT=m +CONFIG_NFT_TUNNEL=m +CONFIG_NFT_QUEUE=m +CONFIG_NFT_QUOTA=m +CONFIG_NFT_REJECT=m +CONFIG_NFT_REJECT_INET=m +CONFIG_NFT_COMPAT=m +CONFIG_NFT_HASH=m +CONFIG_NFT_FIB=m +CONFIG_NFT_FIB_INET=m +CONFIG_NFT_XFRM=m +CONFIG_NFT_SOCKET=m +CONFIG_NFT_OSF=m +CONFIG_NFT_TPROXY=m +CONFIG_NFT_SYNPROXY=m +CONFIG_NF_DUP_NETDEV=m +CONFIG_NFT_DUP_NETDEV=m +CONFIG_NFT_FWD_NETDEV=m +CONFIG_NFT_FIB_NETDEV=m +# CONFIG_NFT_REJECT_NETDEV is not set +CONFIG_NF_FLOW_TABLE_INET=m +CONFIG_NF_FLOW_TABLE=m +# CONFIG_NF_FLOW_TABLE_PROCFS is not set +CONFIG_NETFILTER_XTABLES=m +# CONFIG_NETFILTER_XTABLES_COMPAT is not set + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_CONNMARK=m +CONFIG_NETFILTER_XT_SET=m + +# +# Xtables targets +# +CONFIG_NETFILTER_XT_TARGET_AUDIT=m +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +CONFIG_NETFILTER_XT_TARGET_CT=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +CONFIG_NETFILTER_XT_TARGET_HMARK=m +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_NAT=m +CONFIG_NETFILTER_XT_TARGET_NETMAP=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +CONFIG_NETFILTER_XT_TARGET_REDIRECT=m +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +CONFIG_NETFILTER_XT_TARGET_TEE=m +CONFIG_NETFILTER_XT_TARGET_TPROXY=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_BPF=m +CONFIG_NETFILTER_XT_MATCH_CGROUP=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ECN=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +CONFIG_NETFILTER_XT_MATCH_IPCOMP=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_NETFILTER_XT_MATCH_L2TP=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_NFACCT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +# end of Core Netfilter Configuration + +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +CONFIG_IP_SET_BITMAP_IP=m +CONFIG_IP_SET_BITMAP_IPMAC=m +CONFIG_IP_SET_BITMAP_PORT=m +CONFIG_IP_SET_HASH_IP=m +CONFIG_IP_SET_HASH_IPMARK=m +CONFIG_IP_SET_HASH_IPPORT=m +CONFIG_IP_SET_HASH_IPPORTIP=m +CONFIG_IP_SET_HASH_IPPORTNET=m +CONFIG_IP_SET_HASH_IPMAC=m +CONFIG_IP_SET_HASH_MAC=m +CONFIG_IP_SET_HASH_NETPORTNET=m +CONFIG_IP_SET_HASH_NET=m +CONFIG_IP_SET_HASH_NETNET=m +CONFIG_IP_SET_HASH_NETPORT=m +CONFIG_IP_SET_HASH_NETIFACE=m +CONFIG_IP_SET_LIST_SET=m +CONFIG_IP_VS=m +CONFIG_IP_VS_IPV6=y +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y +CONFIG_IP_VS_PROTO_SCTP=y + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_FO=m +CONFIG_IP_VS_OVF=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_MH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m +# CONFIG_IP_VS_TWOS is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m +CONFIG_IP_VS_NFCT=y +CONFIG_IP_VS_PE_SIP=m + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_SOCKET_IPV4=m +CONFIG_NF_TPROXY_IPV4=m +CONFIG_NF_TABLES_IPV4=y +CONFIG_NFT_REJECT_IPV4=m +CONFIG_NFT_DUP_IPV4=m +CONFIG_NFT_FIB_IPV4=m +CONFIG_NF_TABLES_ARP=y +CONFIG_NF_DUP_IPV4=m +CONFIG_NF_LOG_ARP=m +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_RPFILTER=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_SYNPROXY=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_SECURITY=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_SOCKET_IPV6=m +CONFIG_NF_TPROXY_IPV6=m +CONFIG_NF_TABLES_IPV6=y +CONFIG_NFT_REJECT_IPV6=m +CONFIG_NFT_DUP_IPV6=m +CONFIG_NFT_FIB_IPV6=m +CONFIG_NF_DUP_IPV6=m +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RPFILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_SRH=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_TARGET_SYNPROXY=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_IP6_NF_TARGET_NPT=m +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_NF_TABLES_BRIDGE=m +CONFIG_NFT_BRIDGE_META=m +CONFIG_NFT_BRIDGE_REJECT=m +CONFIG_NF_CONNTRACK_BRIDGE=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_NFLOG=m +# CONFIG_BPFILTER is not set +CONFIG_IP_DCCP=m +CONFIG_INET_DCCP_DIAG=m + +# +# DCCP CCIDs Configuration +# +# CONFIG_IP_DCCP_CCID2_DEBUG is not set +CONFIG_IP_DCCP_CCID3=y +# CONFIG_IP_DCCP_CCID3_DEBUG is not set +CONFIG_IP_DCCP_TFRC_LIB=y +# end of DCCP CCIDs Configuration + +# +# DCCP Kernel Hacking +# +# CONFIG_IP_DCCP_DEBUG is not set +# end of DCCP Kernel Hacking + +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_OBJCNT is not set +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5 is not set +CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1=y +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set +CONFIG_SCTP_COOKIE_HMAC_MD5=y +CONFIG_SCTP_COOKIE_HMAC_SHA1=y +CONFIG_INET_SCTP_DIAG=m +CONFIG_RDS=m +CONFIG_RDS_RDMA=m +CONFIG_RDS_TCP=m +# CONFIG_RDS_DEBUG is not set +CONFIG_TIPC=m +CONFIG_TIPC_MEDIA_IB=y +CONFIG_TIPC_MEDIA_UDP=y +CONFIG_TIPC_CRYPTO=y +CONFIG_TIPC_DIAG=m +CONFIG_ATM=m +CONFIG_ATM_CLIP=m +# CONFIG_ATM_CLIP_NO_ICMP is not set +CONFIG_ATM_LANE=m +CONFIG_ATM_MPOA=m +CONFIG_ATM_BR2684=m +# CONFIG_ATM_BR2684_IPFILTER is not set +CONFIG_L2TP=m +CONFIG_L2TP_DEBUGFS=m +CONFIG_L2TP_V3=y +CONFIG_L2TP_IP=m +CONFIG_L2TP_ETH=m +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +# CONFIG_BRIDGE_MRP is not set +# CONFIG_BRIDGE_CFM is not set +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +CONFIG_LLC=m +CONFIG_LLC2=m +CONFIG_ATALK=m +CONFIG_DEV_APPLETALK=m +CONFIG_IPDDP=m +CONFIG_IPDDP_ENCAP=y +# CONFIG_X25 is not set +CONFIG_LAPB=m +CONFIG_PHONET=m +CONFIG_6LOWPAN=m +# CONFIG_6LOWPAN_DEBUGFS is not set +CONFIG_6LOWPAN_NHC=m +CONFIG_6LOWPAN_NHC_DEST=m +CONFIG_6LOWPAN_NHC_FRAGMENT=m +CONFIG_6LOWPAN_NHC_HOP=m +CONFIG_6LOWPAN_NHC_IPV6=m +CONFIG_6LOWPAN_NHC_MOBILITY=m +CONFIG_6LOWPAN_NHC_ROUTING=m +CONFIG_6LOWPAN_NHC_UDP=m +CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m +CONFIG_6LOWPAN_GHC_UDP=m +CONFIG_6LOWPAN_GHC_ICMPV6=m +CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m +CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m +CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m +CONFIG_IEEE802154=m +# CONFIG_IEEE802154_NL802154_EXPERIMENTAL is not set +CONFIG_IEEE802154_SOCKET=m +CONFIG_IEEE802154_6LOWPAN=m +CONFIG_MAC802154=m +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFB=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_CBS=m +CONFIG_NET_SCH_ETF=m +CONFIG_NET_SCH_MQPRIO_LIB=m +CONFIG_NET_SCH_TAPRIO=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_MQPRIO=m +CONFIG_NET_SCH_SKBPRIO=m +CONFIG_NET_SCH_CHOKE=m +CONFIG_NET_SCH_QFQ=m +CONFIG_NET_SCH_CODEL=m +CONFIG_NET_SCH_FQ_CODEL=y +CONFIG_NET_SCH_CAKE=m +CONFIG_NET_SCH_FQ=m +CONFIG_NET_SCH_HHF=m +CONFIG_NET_SCH_PIE=m +CONFIG_NET_SCH_FQ_PIE=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_SCH_PLUG=m +CONFIG_NET_SCH_ETS=m +CONFIG_NET_SCH_DEFAULT=y +# CONFIG_DEFAULT_FQ is not set +# CONFIG_DEFAULT_CODEL is not set +CONFIG_DEFAULT_FQ_CODEL=y +# CONFIG_DEFAULT_FQ_PIE is not set +# CONFIG_DEFAULT_SFQ is not set +# CONFIG_DEFAULT_PFIFO_FAST is not set +CONFIG_DEFAULT_NET_SCH="fq_codel" + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_CLS_U32_PERF=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_CLS_CGROUP=m +CONFIG_NET_CLS_BPF=m +CONFIG_NET_CLS_FLOWER=m +CONFIG_NET_CLS_MATCHALL=m +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_TEXT=m +CONFIG_NET_EMATCH_CANID=m +CONFIG_NET_EMATCH_IPSET=m +CONFIG_NET_EMATCH_IPT=m +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_GACT=m +CONFIG_GACT_PROB=y +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_SAMPLE=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +CONFIG_NET_ACT_CSUM=m +CONFIG_NET_ACT_MPLS=m +CONFIG_NET_ACT_VLAN=m +CONFIG_NET_ACT_BPF=m +CONFIG_NET_ACT_CONNMARK=m +CONFIG_NET_ACT_CTINFO=m +CONFIG_NET_ACT_SKBMOD=m +CONFIG_NET_ACT_IFE=m +CONFIG_NET_ACT_TUNNEL_KEY=m +CONFIG_NET_ACT_CT=m +CONFIG_NET_ACT_GATE=m +CONFIG_NET_IFE_SKBMARK=m +CONFIG_NET_IFE_SKBPRIO=m +CONFIG_NET_IFE_SKBTCINDEX=m +# CONFIG_NET_TC_SKB_EXT is not set +CONFIG_NET_SCH_FIFO=y +CONFIG_DCB=y +CONFIG_DNS_RESOLVER=m +CONFIG_BATMAN_ADV=m +CONFIG_BATMAN_ADV_BATMAN_V=y +CONFIG_BATMAN_ADV_BLA=y +CONFIG_BATMAN_ADV_DAT=y +CONFIG_BATMAN_ADV_NC=y +CONFIG_BATMAN_ADV_MCAST=y +# CONFIG_BATMAN_ADV_DEBUG is not set +# CONFIG_BATMAN_ADV_TRACING is not set +CONFIG_OPENVSWITCH=m +CONFIG_OPENVSWITCH_GRE=m +CONFIG_OPENVSWITCH_VXLAN=m +CONFIG_OPENVSWITCH_GENEVE=m +CONFIG_VSOCKETS=m +CONFIG_VSOCKETS_DIAG=m +CONFIG_VSOCKETS_LOOPBACK=m +CONFIG_VMWARE_VMCI_VSOCKETS=m +CONFIG_VIRTIO_VSOCKETS=m +CONFIG_VIRTIO_VSOCKETS_COMMON=m +CONFIG_HYPERV_VSOCKETS=m +CONFIG_NETLINK_DIAG=m +CONFIG_MPLS=y +CONFIG_NET_MPLS_GSO=y +CONFIG_MPLS_ROUTING=m +CONFIG_MPLS_IPTUNNEL=m +CONFIG_NET_NSH=m +CONFIG_HSR=m +CONFIG_NET_SWITCHDEV=y +CONFIG_NET_L3_MASTER_DEV=y +CONFIG_QRTR=m +# CONFIG_QRTR_TUN is not set +CONFIG_QRTR_MHI=m +# CONFIG_NET_NCSI is not set +CONFIG_PCPU_DEV_REFCNT=y +CONFIG_MAX_SKB_FRAGS=17 +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_XPS=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CGROUP_NET_CLASSID=y +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_STREAM_PARSER=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +CONFIG_NET_DROP_MONITOR=m +# end of Network testing +# end of Networking options + +CONFIG_HAMRADIO=y + +# +# Packet Radio protocols +# +CONFIG_AX25=m +CONFIG_AX25_DAMA_SLAVE=y +CONFIG_NETROM=m +CONFIG_ROSE=m + +# +# AX.25 network device drivers +# +CONFIG_MKISS=m +CONFIG_6PACK=m +CONFIG_BPQETHER=m +CONFIG_BAYCOM_SER_FDX=m +CONFIG_BAYCOM_SER_HDX=m +CONFIG_BAYCOM_PAR=m +CONFIG_YAM=m +# end of AX.25 network device drivers + +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m +CONFIG_CAN_J1939=m +CONFIG_CAN_ISOTP=m +CONFIG_BT=m +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_CMTP=m +CONFIG_BT_HIDP=m +CONFIG_BT_HS=y +CONFIG_BT_LE=y +CONFIG_BT_LE_L2CAP_ECRED=y +CONFIG_BT_6LOWPAN=m +CONFIG_BT_LEDS=y +# CONFIG_BT_MSFTEXT is not set +# CONFIG_BT_AOSPEXT is not set +CONFIG_BT_DEBUGFS=y +# CONFIG_BT_SELFTEST is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m +CONFIG_BT_BCM=m +CONFIG_BT_RTL=m +CONFIG_BT_QCA=m +CONFIG_BT_MTK=m +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTUSB_AUTOSUSPEND=y +CONFIG_BT_HCIBTUSB_POLL_SYNC=y +CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_MTK=y +CONFIG_BT_HCIBTUSB_RTL=y +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_SERDEV=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_NOKIA=m +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIUART_3WIRE=y +CONFIG_BT_HCIUART_INTEL=y +CONFIG_BT_HCIUART_BCM=y +CONFIG_BT_HCIUART_RTL=y +CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_HCIUART_AG6XX=y +CONFIG_BT_HCIUART_MRVL=y +CONFIG_BT_HCIBCM203X=m +# CONFIG_BT_HCIBCM4377 is not set +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIDTL1=m +CONFIG_BT_HCIBT3C=m +CONFIG_BT_HCIBLUECARD=m +CONFIG_BT_HCIVHCI=m +CONFIG_BT_MRVL=m +CONFIG_BT_MRVL_SDIO=m +CONFIG_BT_ATH3K=m +# CONFIG_BT_MTKSDIO is not set +CONFIG_BT_MTKUART=m +CONFIG_BT_HCIRSI=m +# CONFIG_BT_VIRTIO is not set +# CONFIG_BT_NXPUART is not set +# end of Bluetooth device drivers + +CONFIG_AF_RXRPC=m +CONFIG_AF_RXRPC_IPV6=y +# CONFIG_AF_RXRPC_INJECT_LOSS is not set +# CONFIG_AF_RXRPC_INJECT_RX_DELAY is not set +# CONFIG_AF_RXRPC_DEBUG is not set +CONFIG_RXKAD=y +# CONFIG_RXPERF is not set +CONFIG_AF_KCM=m +CONFIG_STREAM_PARSER=y +# CONFIG_MCTP is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_CFG80211_WEXT_EXPORT=y +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_WEP=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +# CONFIG_LIB80211_DEBUG is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +CONFIG_MAC80211_MESH=y +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=m +CONFIG_NET_9P_FD=m +CONFIG_NET_9P_VIRTIO=m +CONFIG_NET_9P_XEN=m +CONFIG_NET_9P_RDMA=m +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +CONFIG_CEPH_LIB=m +# CONFIG_CEPH_LIB_PRETTYDEBUG is not set +# CONFIG_CEPH_LIB_USE_DNS_RESOLVER is not set +CONFIG_NFC=m +CONFIG_NFC_DIGITAL=m +CONFIG_NFC_NCI=m +# CONFIG_NFC_NCI_SPI is not set +# CONFIG_NFC_NCI_UART is not set +CONFIG_NFC_HCI=m +# CONFIG_NFC_SHDLC is not set + +# +# Near Field Communication (NFC) devices +# +# CONFIG_NFC_TRF7970A is not set +CONFIG_NFC_MEI_PHY=m +CONFIG_NFC_SIM=m +CONFIG_NFC_PORT100=m +# CONFIG_NFC_VIRTUAL_NCI is not set +# CONFIG_NFC_FDP is not set +CONFIG_NFC_PN544=m +CONFIG_NFC_PN544_MEI=m +CONFIG_NFC_PN533=m +CONFIG_NFC_PN533_USB=m +# CONFIG_NFC_PN533_I2C is not set +# CONFIG_NFC_PN532_UART is not set +# CONFIG_NFC_MICROREAD_MEI is not set +# CONFIG_NFC_MRVL_USB is not set +# CONFIG_NFC_ST_NCI_I2C is not set +# CONFIG_NFC_ST_NCI_SPI is not set +CONFIG_NFC_NXP_NCI=m +CONFIG_NFC_NXP_NCI_I2C=m +# CONFIG_NFC_S3FWRN5_I2C is not set +# CONFIG_NFC_S3FWRN82_UART is not set +# CONFIG_NFC_ST95HF is not set +# end of Near Field Communication (NFC) devices + +CONFIG_PSAMPLE=m +CONFIG_NET_IFE=m +CONFIG_LWTUNNEL=y +CONFIG_LWTUNNEL_BPF=y +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_SOCK_VALIDATE_XMIT=y +CONFIG_NET_SELFTESTS=m +CONFIG_NET_SOCK_MSG=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +# CONFIG_PAGE_POOL_STATS is not set +CONFIG_FAILOVER=m +CONFIG_ETHTOOL_NETLINK=y + +# +# Device Drivers +# +CONFIG_HAVE_EISA=y +# CONFIG_EISA is not set +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +CONFIG_PCIEAER=y +CONFIG_PCIEAER_INJECT=m +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +CONFIG_PCIE_DPC=y +CONFIG_PCIE_PTM=y +# CONFIG_PCIE_EDR is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +CONFIG_PCI_REALLOC_ENABLE_AUTO=y +CONFIG_PCI_STUB=m +CONFIG_PCI_PF_STUB=m +CONFIG_XEN_PCIDEV_FRONTEND=m +CONFIG_PCI_ATS=y +CONFIG_PCI_DOE=y +CONFIG_PCI_LOCKLESS_CONFIG=y +CONFIG_PCI_IOV=y +CONFIG_PCI_PRI=y +CONFIG_PCI_PASID=y +# CONFIG_PCI_P2PDMA is not set +CONFIG_PCI_LABEL=y +CONFIG_PCI_HYPERV=m +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +CONFIG_HOTPLUG_PCI_ACPI_IBM=m +CONFIG_HOTPLUG_PCI_CPCI=y +CONFIG_HOTPLUG_PCI_CPCI_ZT5550=m +CONFIG_HOTPLUG_PCI_CPCI_GENERIC=m +CONFIG_HOTPLUG_PCI_SHPC=y + +# +# PCI controller drivers +# +CONFIG_VMD=m +CONFIG_PCI_HYPERV_INTERFACE=m + +# +# Cadence-based PCIe controllers +# +# end of Cadence-based PCIe controllers + +# +# DesignWare-based PCIe controllers +# +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_DW_PLAT_HOST is not set +# end of DesignWare-based PCIe controllers + +# +# Mobiveil-based PCIe controllers +# +# end of Mobiveil-based PCIe controllers +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +CONFIG_CXL_BUS=y +CONFIG_CXL_PCI=m +# CONFIG_CXL_MEM_RAW_COMMANDS is not set +CONFIG_CXL_ACPI=m +CONFIG_CXL_PMEM=m +CONFIG_CXL_MEM=m +CONFIG_CXL_PORT=y +CONFIG_CXL_SUSPEND=y +CONFIG_CXL_REGION=y +# CONFIG_CXL_REGION_INVALIDATION_TEST is not set +CONFIG_CXL_PMU=y +CONFIG_PCCARD=m +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_CARDBUS=y + +# +# PC-card bridges +# +CONFIG_YENTA=m +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_TOSHIBA=y +CONFIG_PD6729=m +CONFIG_I82092=m +CONFIG_PCCARD_NONSTATIC=y +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +CONFIG_AUXILIARY_BUS=y +# CONFIG_UEVENT_HELPER is not set +CONFIG_DEVTMPFS=y +# CONFIG_DEVTMPFS_MOUNT is not set +# CONFIG_DEVTMPFS_SAFE is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_DEBUG=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_FW_LOADER_COMPRESS=y +CONFIG_FW_LOADER_COMPRESS_XZ=y +# CONFIG_FW_LOADER_COMPRESS_ZSTD is not set +CONFIG_FW_CACHE=y +CONFIG_FW_UPLOAD=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +CONFIG_HMEM_REPORTING=y +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=m +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_SOUNDWIRE=m +CONFIG_REGMAP_SOUNDWIRE_MBQ=m +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +# CONFIG_FW_DEVLINK_SYNC_STATE_TIMEOUT is not set +# end of Generic Driver Options + +# +# Bus devices +# +CONFIG_MHI_BUS=m +# CONFIG_MHI_BUS_DEBUG is not set +CONFIG_MHI_BUS_PCI_GENERIC=m +# CONFIG_MHI_BUS_EP is not set +# end of Bus devices + +# +# Cache Drivers +# +# end of Cache Drivers + +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y + +# +# Firmware Drivers +# + +# +# ARM System Control and Management Interface Protocol +# +# end of ARM System Control and Management Interface Protocol + +CONFIG_EDD=m +# CONFIG_EDD_OFF is not set +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_DMIID=y +CONFIG_DMI_SYSFS=y +CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y +CONFIG_ISCSI_IBFT_FIND=y +CONFIG_ISCSI_IBFT=m +CONFIG_FW_CFG_SYSFS=m +# CONFIG_FW_CFG_SYSFS_CMDLINE is not set +CONFIG_SYSFB=y +# CONFIG_SYSFB_SIMPLEFB is not set +CONFIG_FW_CS_DSP=m +CONFIG_GOOGLE_FIRMWARE=y +CONFIG_GOOGLE_SMI=m +# CONFIG_GOOGLE_CBMEM is not set +CONFIG_GOOGLE_COREBOOT_TABLE=y +CONFIG_GOOGLE_MEMCONSOLE=m +# CONFIG_GOOGLE_MEMCONSOLE_X86_LEGACY is not set +CONFIG_GOOGLE_FRAMEBUFFER_COREBOOT=y +CONFIG_GOOGLE_MEMCONSOLE_COREBOOT=m +CONFIG_GOOGLE_VPD=m + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_VARS_PSTORE=m +# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set +CONFIG_EFI_SOFT_RESERVE=y +CONFIG_EFI_DXE_MEM_ATTRIBUTES=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_BOOTLOADER_CONTROL=m +CONFIG_EFI_CAPSULE_LOADER=m +# CONFIG_EFI_TEST is not set +CONFIG_EFI_DEV_PATH_PARSER=y +CONFIG_APPLE_PROPERTIES=y +CONFIG_RESET_ATTACK_MITIGATION=y +# CONFIG_EFI_RCI2_TABLE is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y +# CONFIG_EFI_DISABLE_RUNTIME is not set +# CONFIG_EFI_COCO_SECRET is not set +CONFIG_UNACCEPTED_MEMORY=y +CONFIG_EFI_EMBEDDED_FIRMWARE=y +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_UEFI_CPER=y +CONFIG_UEFI_CPER_X86=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_GNSS=m +CONFIG_GNSS_SERIAL=m +# CONFIG_GNSS_MTK_SERIAL is not set +CONFIG_GNSS_SIRF_SERIAL=m +CONFIG_GNSS_UBX_SERIAL=m +# CONFIG_GNSS_USB is not set +CONFIG_MTD=m +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +CONFIG_MTD_AR7_PARTS=m +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_REDBOOT_PARTS=m +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +CONFIG_MTD_BLOCK_RO=m + +# +# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK. +# +CONFIG_FTL=m +CONFIG_NFTL=m +CONFIG_NFTL_RW=y +CONFIG_INFTL=m +CONFIG_RFD_FTL=m +CONFIG_SSFDC=m +# CONFIG_SM_FTL is not set +CONFIG_MTD_OOPS=m +# CONFIG_MTD_PSTORE is not set +CONFIG_MTD_SWAP=m +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=m +CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_GEN_PROBE=m +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_AMDSTD=m +CONFIG_MTD_CFI_STAA=m +CONFIG_MTD_CFI_UTIL=m +CONFIG_MTD_RAM=m +CONFIG_MTD_ROM=m +CONFIG_MTD_ABSENT=m +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=m +# CONFIG_MTD_PHYSMAP_COMPAT is not set +# CONFIG_MTD_PHYSMAP_GPIO_ADDR is not set +CONFIG_MTD_SBC_GXX=m +# CONFIG_MTD_AMD76XROM is not set +# CONFIG_MTD_ICHXROM is not set +# CONFIG_MTD_ESB2ROM is not set +# CONFIG_MTD_CK804XROM is not set +# CONFIG_MTD_SCB2_FLASH is not set +CONFIG_MTD_NETtel=m +# CONFIG_MTD_L440GX is not set +CONFIG_MTD_PCI=m +CONFIG_MTD_PCMCIA=m +# CONFIG_MTD_PCMCIA_ANONYMOUS is not set +CONFIG_MTD_INTEL_VR_NOR=m +CONFIG_MTD_PLATRAM=m +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +CONFIG_MTD_DATAFLASH=m +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DATAFLASH_OTP is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_MCHP48L640 is not set +CONFIG_MTD_SST25L=m +CONFIG_MTD_SLRAM=m +CONFIG_MTD_PHRAM=m +CONFIG_MTD_MTDRAM=m +CONFIG_MTDRAM_TOTAL_SIZE=4096 +CONFIG_MTDRAM_ERASE_SIZE=128 +CONFIG_MTD_BLOCK2MTD=m + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=m +CONFIG_MTD_ONENAND=m +CONFIG_MTD_ONENAND_VERIFY_WRITE=y +# CONFIG_MTD_ONENAND_GENERIC is not set +# CONFIG_MTD_ONENAND_OTP is not set +CONFIG_MTD_ONENAND_2X_PROGRAM=y +CONFIG_MTD_RAW_NAND=m + +# +# Raw/parallel NAND flash controllers +# +# CONFIG_MTD_NAND_DENALI_PCI is not set +CONFIG_MTD_NAND_CAFE=m +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_ARASAN is not set + +# +# Misc +# +CONFIG_MTD_SM_COMMON=m +CONFIG_MTD_NAND_NANDSIM=m +CONFIG_MTD_NAND_RICOH=m +CONFIG_MTD_NAND_DISKONCHIP=m +# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 +# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +CONFIG_MTD_NAND_ECC_SW_BCH=y +# CONFIG_MTD_NAND_ECC_MXIC is not set +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +CONFIG_MTD_LPDDR=m +CONFIG_MTD_QINFO_PROBE=m +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=m +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_MTD_SPI_NOR_SWP_DISABLE is not set +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y +# CONFIG_MTD_SPI_NOR_SWP_KEEP is not set +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +CONFIG_MTD_UBI_BLOCK=y +# CONFIG_MTD_HYPERBUS is not set +# CONFIG_OF is not set +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_PARPORT=m +CONFIG_PARPORT_PC=m +CONFIG_PARPORT_SERIAL=m +# CONFIG_PARPORT_PC_FIFO is not set +# CONFIG_PARPORT_PC_SUPERIO is not set +CONFIG_PARPORT_PC_PCMCIA=m +CONFIG_PARPORT_1284=y +CONFIG_PARPORT_NOT_PC=y +CONFIG_PNP=y +# CONFIG_PNP_DEBUG_MESSAGES is not set + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +CONFIG_BLK_DEV_NULL_BLK=m +CONFIG_BLK_DEV_FD=m +# CONFIG_BLK_DEV_FD_RAWCMD is not set +CONFIG_CDROM=m +CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m +CONFIG_ZRAM=m +CONFIG_ZRAM_DEF_COMP_LZORLE=y +# CONFIG_ZRAM_DEF_COMP_ZSTD is not set +# CONFIG_ZRAM_DEF_COMP_LZ4 is not set +# CONFIG_ZRAM_DEF_COMP_LZO is not set +# CONFIG_ZRAM_DEF_COMP_LZ4HC is not set +CONFIG_ZRAM_DEF_COMP="lzo-rle" +CONFIG_ZRAM_WRITEBACK=y +CONFIG_ZRAM_MEMORY_TRACKING=y +# CONFIG_ZRAM_MULTI_COMP is not set +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +CONFIG_BLK_DEV_DRBD=m +# CONFIG_DRBD_FAULT_INJECTION is not set +CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_RAM=m +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +CONFIG_ATA_OVER_ETH=m +CONFIG_XEN_BLKDEV_FRONTEND=m +CONFIG_XEN_BLKDEV_BACKEND=m +CONFIG_VIRTIO_BLK=m +CONFIG_BLK_DEV_RBD=m +CONFIG_BLK_DEV_UBLK=m +CONFIG_BLKDEV_UBLK_LEGACY_OPCODES=y + +# +# NVME Support +# +CONFIG_NVME_CORE=m +CONFIG_BLK_DEV_NVME=m +CONFIG_NVME_MULTIPATH=y +# CONFIG_NVME_VERBOSE_ERRORS is not set +CONFIG_NVME_HWMON=y +CONFIG_NVME_FABRICS=m +CONFIG_NVME_RDMA=m +CONFIG_NVME_FC=m +CONFIG_NVME_TCP=m +# CONFIG_NVME_AUTH is not set +CONFIG_NVME_TARGET=m +# CONFIG_NVME_TARGET_PASSTHRU is not set +# CONFIG_NVME_TARGET_LOOP is not set +CONFIG_NVME_TARGET_RDMA=m +CONFIG_NVME_TARGET_FC=m +# CONFIG_NVME_TARGET_FCLOOP is not set +CONFIG_NVME_TARGET_TCP=m +# CONFIG_NVME_TARGET_AUTH is not set +# end of NVME Support + +# +# Misc devices +# +CONFIG_SENSORS_LIS3LV02D=m +CONFIG_AD525X_DPOT=m +CONFIG_AD525X_DPOT_I2C=m +CONFIG_AD525X_DPOT_SPI=m +# CONFIG_DUMMY_IRQ is not set +CONFIG_IBM_ASM=m +CONFIG_PHANTOM=m +CONFIG_TIFM_CORE=m +CONFIG_TIFM_7XX1=m +CONFIG_ICS932S401=m +CONFIG_ENCLOSURE_SERVICES=m +CONFIG_HP_ILO=m +CONFIG_APDS9802ALS=m +CONFIG_ISL29003=m +CONFIG_ISL29020=m +CONFIG_SENSORS_TSL2550=m +CONFIG_SENSORS_BH1770=m +CONFIG_SENSORS_APDS990X=m +CONFIG_HMC6352=m +CONFIG_DS1682=m +CONFIG_VMWARE_BALLOON=m +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_DW_XDATA_PCIE is not set +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +CONFIG_MISC_RTSX=m +CONFIG_C2PORT=m +CONFIG_C2PORT_DURAMAR_2150=m + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +CONFIG_EEPROM_LEGACY=m +CONFIG_EEPROM_MAX6875=m +CONFIG_EEPROM_93CX6=m +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +CONFIG_EEPROM_EE1004=m +# end of EEPROM support + +CONFIG_CB710_CORE=m +# CONFIG_CB710_DEBUG is not set +CONFIG_CB710_DEBUG_ASSUMPTIONS=y + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +CONFIG_SENSORS_LIS3_I2C=m +CONFIG_ALTERA_STAPL=m +CONFIG_INTEL_MEI=m +CONFIG_INTEL_MEI_ME=m +CONFIG_INTEL_MEI_TXE=m +CONFIG_INTEL_MEI_GSC=m +CONFIG_INTEL_MEI_HDCP=m +CONFIG_INTEL_MEI_PXP=m +# CONFIG_INTEL_MEI_GSC_PROXY is not set +CONFIG_VMWARE_VMCI=m +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_BCM_VK is not set +# CONFIG_MISC_ALCOR_PCI is not set +CONFIG_MISC_RTSX_PCI=m +CONFIG_MISC_RTSX_USB=m +# CONFIG_UACCE is not set +CONFIG_PVPANIC=y +CONFIG_PVPANIC_MMIO=m +CONFIG_PVPANIC_PCI=m +# CONFIG_GP_PCI1XXXX is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=m +CONFIG_RAID_ATTRS=m +CONFIG_SCSI_COMMON=m +CONFIG_SCSI=m +CONFIG_SCSI_DMA=y +CONFIG_SCSI_NETLINK=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +CONFIG_CHR_DEV_ST=m +CONFIG_BLK_DEV_SR=m +CONFIG_CHR_DEV_SG=m +CONFIG_BLK_DEV_BSG=y +CONFIG_CHR_DEV_SCH=m +CONFIG_SCSI_ENCLOSURE=m +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_SCSI_FC_ATTRS=m +CONFIG_SCSI_ISCSI_ATTRS=m +CONFIG_SCSI_SAS_ATTRS=m +CONFIG_SCSI_SAS_LIBSAS=m +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +CONFIG_SCSI_SRP_ATTRS=m +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=m +CONFIG_ISCSI_BOOT_SYSFS=m +CONFIG_SCSI_CXGB3_ISCSI=m +CONFIG_SCSI_CXGB4_ISCSI=m +CONFIG_SCSI_BNX2_ISCSI=m +CONFIG_SCSI_BNX2X_FCOE=m +CONFIG_BE2ISCSI=m +CONFIG_BLK_DEV_3W_XXXX_RAID=m +CONFIG_SCSI_HPSA=m +CONFIG_SCSI_3W_9XXX=m +CONFIG_SCSI_3W_SAS=m +CONFIG_SCSI_ACARD=m +CONFIG_SCSI_AACRAID=m +CONFIG_SCSI_AIC7XXX=m +CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 +CONFIG_AIC7XXX_RESET_DELAY_MS=15000 +CONFIG_AIC7XXX_DEBUG_ENABLE=y +CONFIG_AIC7XXX_DEBUG_MASK=0 +CONFIG_AIC7XXX_REG_PRETTY_PRINT=y +CONFIG_SCSI_AIC79XX=m +CONFIG_AIC79XX_CMDS_PER_DEVICE=32 +CONFIG_AIC79XX_RESET_DELAY_MS=15000 +CONFIG_AIC79XX_DEBUG_ENABLE=y +CONFIG_AIC79XX_DEBUG_MASK=0 +CONFIG_AIC79XX_REG_PRETTY_PRINT=y +CONFIG_SCSI_AIC94XX=m +# CONFIG_AIC94XX_DEBUG is not set +CONFIG_SCSI_MVSAS=m +# CONFIG_SCSI_MVSAS_DEBUG is not set +# CONFIG_SCSI_MVSAS_TASKLET is not set +CONFIG_SCSI_MVUMI=m +CONFIG_SCSI_ADVANSYS=m +CONFIG_SCSI_ARCMSR=m +CONFIG_SCSI_ESAS2R=m +CONFIG_MEGARAID_NEWGEN=y +CONFIG_MEGARAID_MM=m +CONFIG_MEGARAID_MAILBOX=m +CONFIG_MEGARAID_LEGACY=m +CONFIG_MEGARAID_SAS=m +CONFIG_SCSI_MPT3SAS=m +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MPT3SAS_MAX_SGE=128 +CONFIG_SCSI_MPT2SAS=m +CONFIG_SCSI_MPI3MR=m +CONFIG_SCSI_SMARTPQI=m +CONFIG_SCSI_HPTIOP=m +CONFIG_SCSI_BUSLOGIC=m +# CONFIG_SCSI_FLASHPOINT is not set +CONFIG_SCSI_MYRB=m +CONFIG_SCSI_MYRS=m +CONFIG_VMWARE_PVSCSI=m +CONFIG_XEN_SCSI_FRONTEND=m +CONFIG_HYPERV_STORAGE=m +CONFIG_LIBFC=m +CONFIG_LIBFCOE=m +CONFIG_FCOE=m +CONFIG_FCOE_FNIC=m +CONFIG_SCSI_SNIC=m +# CONFIG_SCSI_SNIC_DEBUG_FS is not set +CONFIG_SCSI_DMX3191D=m +# CONFIG_SCSI_FDOMAIN_PCI is not set +CONFIG_SCSI_ISCI=m +CONFIG_SCSI_IPS=m +CONFIG_SCSI_INITIO=m +CONFIG_SCSI_INIA100=m +# CONFIG_SCSI_PPA is not set +# CONFIG_SCSI_IMM is not set +CONFIG_SCSI_STEX=m +CONFIG_SCSI_SYM53C8XX_2=m +CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 +CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 +CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 +CONFIG_SCSI_SYM53C8XX_MMIO=y +CONFIG_SCSI_IPR=m +# CONFIG_SCSI_IPR_TRACE is not set +# CONFIG_SCSI_IPR_DUMP is not set +CONFIG_SCSI_QLOGIC_1280=m +CONFIG_SCSI_QLA_FC=m +CONFIG_TCM_QLA2XXX=m +# CONFIG_TCM_QLA2XXX_DEBUG is not set +CONFIG_SCSI_QLA_ISCSI=m +CONFIG_QEDI=m +CONFIG_QEDF=m +CONFIG_SCSI_LPFC=m +# CONFIG_SCSI_LPFC_DEBUG_FS is not set +# CONFIG_SCSI_EFCT is not set +CONFIG_SCSI_DC395x=m +CONFIG_SCSI_AM53C974=m +CONFIG_SCSI_WD719X=m +CONFIG_SCSI_DEBUG=m +CONFIG_SCSI_PMCRAID=m +CONFIG_SCSI_PM8001=m +CONFIG_SCSI_BFA_FC=m +CONFIG_SCSI_VIRTIO=m +CONFIG_SCSI_CHELSIO_FCOE=m +CONFIG_SCSI_LOWLEVEL_PCMCIA=y +CONFIG_PCMCIA_AHA152X=m +# CONFIG_PCMCIA_FDOMAIN is not set +CONFIG_PCMCIA_QLOGIC=m +CONFIG_PCMCIA_SYM53C500=m +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_EMC=m +CONFIG_SCSI_DH_ALUA=m +# end of SCSI device support + +CONFIG_ATA=m +CONFIG_SATA_HOST=y +CONFIG_PATA_TIMINGS=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_FORCE=y +CONFIG_ATA_ACPI=y +CONFIG_SATA_ZPODD=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=m +CONFIG_SATA_MOBILE_LPM_POLICY=3 +# CONFIG_SATA_AHCI_PLATFORM is not set +# CONFIG_AHCI_DWC is not set +# CONFIG_SATA_INIC162X is not set +CONFIG_SATA_ACARD_AHCI=m +CONFIG_SATA_SIL24=m +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +CONFIG_PDC_ADMA=m +CONFIG_SATA_QSTOR=m +CONFIG_SATA_SX4=m +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +CONFIG_ATA_PIIX=m +# CONFIG_SATA_DWC is not set +CONFIG_SATA_MV=m +CONFIG_SATA_NV=m +CONFIG_SATA_PROMISE=m +CONFIG_SATA_SIL=m +CONFIG_SATA_SIS=m +CONFIG_SATA_SVW=m +CONFIG_SATA_ULI=m +CONFIG_SATA_VIA=m +CONFIG_SATA_VITESSE=m + +# +# PATA SFF controllers with BMDMA +# +CONFIG_PATA_ALI=m +CONFIG_PATA_AMD=m +CONFIG_PATA_ARTOP=m +CONFIG_PATA_ATIIXP=m +CONFIG_PATA_ATP867X=m +CONFIG_PATA_CMD64X=m +# CONFIG_PATA_CYPRESS is not set +CONFIG_PATA_EFAR=m +CONFIG_PATA_HPT366=m +CONFIG_PATA_HPT37X=m +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +CONFIG_PATA_IT8213=m +CONFIG_PATA_IT821X=m +CONFIG_PATA_JMICRON=m +CONFIG_PATA_MARVELL=m +CONFIG_PATA_NETCELL=m +CONFIG_PATA_NINJA32=m +CONFIG_PATA_NS87415=m +CONFIG_PATA_OLDPIIX=m +# CONFIG_PATA_OPTIDMA is not set +CONFIG_PATA_PDC2027X=m +CONFIG_PATA_PDC_OLD=m +# CONFIG_PATA_RADISYS is not set +CONFIG_PATA_RDC=m +CONFIG_PATA_SCH=m +CONFIG_PATA_SERVERWORKS=m +CONFIG_PATA_SIL680=m +CONFIG_PATA_SIS=m +CONFIG_PATA_TOSHIBA=m +CONFIG_PATA_TRIFLEX=m +CONFIG_PATA_VIA=m +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +CONFIG_PATA_MPIIX=m +CONFIG_PATA_NS87410=m +# CONFIG_PATA_OPTI is not set +CONFIG_PATA_PCMCIA=m +CONFIG_PATA_RZ1000=m +# CONFIG_PATA_PARPORT is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +CONFIG_ATA_GENERIC=m +CONFIG_PATA_LEGACY=m +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +CONFIG_MD_BITMAP_FILE=y +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_MD_CLUSTER=m +CONFIG_BCACHE=m +# CONFIG_BCACHE_DEBUG is not set +# CONFIG_BCACHE_CLOSURES_DEBUG is not set +# CONFIG_BCACHE_ASYNC_REGISTRATION is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=m +# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set +CONFIG_DM_BIO_PRISON=m +CONFIG_DM_PERSISTENT_DATA=m +CONFIG_DM_UNSTRIPED=m +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_THIN_PROVISIONING=m +CONFIG_DM_CACHE=m +CONFIG_DM_CACHE_SMQ=m +CONFIG_DM_WRITECACHE=m +# CONFIG_DM_EBS is not set +CONFIG_DM_ERA=m +# CONFIG_DM_CLONE is not set +CONFIG_DM_MIRROR=m +CONFIG_DM_LOG_USERSPACE=m +CONFIG_DM_RAID=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +CONFIG_DM_MULTIPATH_QL=m +CONFIG_DM_MULTIPATH_ST=m +# CONFIG_DM_MULTIPATH_HST is not set +# CONFIG_DM_MULTIPATH_IOA is not set +CONFIG_DM_DELAY=m +# CONFIG_DM_DUST is not set +CONFIG_DM_UEVENT=y +CONFIG_DM_FLAKEY=m +CONFIG_DM_VERITY=m +CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG=y +CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG_SECONDARY_KEYRING=y +CONFIG_DM_VERITY_FEC=y +CONFIG_DM_SWITCH=m +CONFIG_DM_LOG_WRITES=m +CONFIG_DM_INTEGRITY=m +CONFIG_DM_ZONED=m +CONFIG_DM_AUDIT=y +CONFIG_TARGET_CORE=m +CONFIG_TCM_IBLOCK=m +CONFIG_TCM_FILEIO=m +CONFIG_TCM_PSCSI=m +CONFIG_TCM_USER2=m +CONFIG_LOOPBACK_TARGET=m +CONFIG_TCM_FC=m +CONFIG_ISCSI_TARGET=m +CONFIG_ISCSI_TARGET_CXGB4=m +CONFIG_SBP_TARGET=m +# CONFIG_REMOTE_TARGET is not set +CONFIG_FUSION=y +CONFIG_FUSION_SPI=m +CONFIG_FUSION_FC=m +CONFIG_FUSION_SAS=m +CONFIG_FUSION_MAX_SGE=128 +CONFIG_FUSION_CTL=m +CONFIG_FUSION_LAN=m +# CONFIG_FUSION_LOGGING is not set + +# +# IEEE 1394 (FireWire) support +# +CONFIG_FIREWIRE=m +CONFIG_FIREWIRE_OHCI=m +CONFIG_FIREWIRE_SBP2=m +CONFIG_FIREWIRE_NET=m +CONFIG_FIREWIRE_NOSY=m +# end of IEEE 1394 (FireWire) support + +CONFIG_MACINTOSH_DRIVERS=y +CONFIG_MAC_EMUMOUSEBTN=y +CONFIG_NETDEVICES=y +CONFIG_MII=m +CONFIG_NET_CORE=y +CONFIG_BONDING=m +CONFIG_DUMMY=m +CONFIG_WIREGUARD=m +# CONFIG_WIREGUARD_DEBUG is not set +CONFIG_EQUALIZER=m +CONFIG_NET_FC=y +CONFIG_IFB=m +CONFIG_NET_TEAM=m +CONFIG_NET_TEAM_MODE_BROADCAST=m +CONFIG_NET_TEAM_MODE_ROUNDROBIN=m +CONFIG_NET_TEAM_MODE_RANDOM=m +CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m +CONFIG_NET_TEAM_MODE_LOADBALANCE=m +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +CONFIG_IPVLAN_L3S=y +CONFIG_IPVLAN=m +CONFIG_IPVTAP=m +CONFIG_VXLAN=m +CONFIG_GENEVE=m +# CONFIG_BAREUDP is not set +CONFIG_GTP=m +# CONFIG_AMT is not set +CONFIG_MACSEC=m +CONFIG_NETCONSOLE=m +CONFIG_NETCONSOLE_DYNAMIC=y +# CONFIG_NETCONSOLE_EXTENDED_LOG is not set +CONFIG_NETPOLL=y +CONFIG_NET_POLL_CONTROLLER=y +CONFIG_TUN=m +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=m +CONFIG_NLMON=m +CONFIG_NET_VRF=m +CONFIG_VSOCKMON=m +CONFIG_MHI_NET=m +CONFIG_SUNGEM_PHY=m +CONFIG_ARCNET=m +CONFIG_ARCNET_1201=m +CONFIG_ARCNET_1051=m +CONFIG_ARCNET_RAW=m +CONFIG_ARCNET_CAP=m +CONFIG_ARCNET_COM90xx=m +CONFIG_ARCNET_COM90xxIO=m +CONFIG_ARCNET_RIM_I=m +CONFIG_ARCNET_COM20020=m +CONFIG_ARCNET_COM20020_PCI=m +CONFIG_ARCNET_COM20020_CS=m +CONFIG_ATM_DRIVERS=y +CONFIG_ATM_DUMMY=m +CONFIG_ATM_TCP=m +CONFIG_ATM_LANAI=m +CONFIG_ATM_ENI=m +# CONFIG_ATM_ENI_DEBUG is not set +# CONFIG_ATM_ENI_TUNE_BURST is not set +CONFIG_ATM_NICSTAR=m +CONFIG_ATM_NICSTAR_USE_SUNI=y +CONFIG_ATM_NICSTAR_USE_IDT77105=y +CONFIG_ATM_IDT77252=m +# CONFIG_ATM_IDT77252_DEBUG is not set +# CONFIG_ATM_IDT77252_RCV_ALL is not set +CONFIG_ATM_IDT77252_USE_SUNI=y +CONFIG_ATM_IA=m +# CONFIG_ATM_IA_DEBUG is not set +CONFIG_ATM_FORE200E=m +# CONFIG_ATM_FORE200E_USE_TASKLET is not set +CONFIG_ATM_FORE200E_TX_RETRY=16 +CONFIG_ATM_FORE200E_DEBUG=0 +CONFIG_ATM_HE=m +CONFIG_ATM_HE_USE_SUNI=y +CONFIG_ATM_SOLOS=m +CONFIG_ETHERNET=y +CONFIG_MDIO=m +CONFIG_NET_VENDOR_3COM=y +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_3C589=m +CONFIG_VORTEX=m +CONFIG_TYPHOON=m +CONFIG_NET_VENDOR_ADAPTEC=y +CONFIG_ADAPTEC_STARFIRE=m +CONFIG_NET_VENDOR_AGERE=y +CONFIG_ET131X=m +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +CONFIG_NET_VENDOR_ALTEON=y +CONFIG_ACENIC=m +# CONFIG_ACENIC_OMIT_TIGON_I is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +CONFIG_ENA_ETHERNET=m +CONFIG_NET_VENDOR_AMD=y +CONFIG_AMD8111_ETH=m +CONFIG_PCNET32=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_AMD_XGBE=m +CONFIG_AMD_XGBE_DCB=y +CONFIG_AMD_XGBE_HAVE_ECC=y +# CONFIG_PDS_CORE is not set +CONFIG_NET_VENDOR_AQUANTIA=y +CONFIG_AQTION=m +# CONFIG_NET_VENDOR_ARC is not set +CONFIG_NET_VENDOR_ASIX=y +# CONFIG_SPI_AX88796C is not set +CONFIG_NET_VENDOR_ATHEROS=y +CONFIG_ATL2=m +CONFIG_ATL1=m +CONFIG_ATL1E=m +CONFIG_ATL1C=m +CONFIG_ALX=m +# CONFIG_CX_ECAT is not set +CONFIG_NET_VENDOR_BROADCOM=y +CONFIG_B44=m +CONFIG_B44_PCI_AUTOSELECT=y +CONFIG_B44_PCICORE_AUTOSELECT=y +CONFIG_B44_PCI=y +# CONFIG_BCMGENET is not set +CONFIG_BNX2=m +CONFIG_CNIC=m +CONFIG_TIGON3=m +CONFIG_TIGON3_HWMON=y +CONFIG_BNX2X=m +CONFIG_BNX2X_SRIOV=y +# CONFIG_SYSTEMPORT is not set +CONFIG_BNXT=m +CONFIG_BNXT_SRIOV=y +CONFIG_BNXT_FLOWER_OFFLOAD=y +CONFIG_BNXT_DCB=y +CONFIG_BNXT_HWMON=y +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +CONFIG_NET_VENDOR_CAVIUM=y +# CONFIG_THUNDER_NIC_PF is not set +# CONFIG_THUNDER_NIC_VF is not set +# CONFIG_THUNDER_NIC_BGX is not set +# CONFIG_THUNDER_NIC_RGX is not set +CONFIG_CAVIUM_PTP=m +CONFIG_LIQUIDIO_CORE=m +CONFIG_LIQUIDIO=m +CONFIG_LIQUIDIO_VF=m +CONFIG_NET_VENDOR_CHELSIO=y +CONFIG_CHELSIO_T1=m +CONFIG_CHELSIO_T1_1G=y +CONFIG_CHELSIO_T3=m +CONFIG_CHELSIO_T4=m +CONFIG_CHELSIO_T4_DCB=y +CONFIG_CHELSIO_T4_FCOE=y +CONFIG_CHELSIO_T4VF=m +CONFIG_CHELSIO_LIB=m +CONFIG_CHELSIO_INLINE_CRYPTO=y +# CONFIG_CHELSIO_IPSEC_INLINE is not set +# CONFIG_CHELSIO_TLS_DEVICE is not set +CONFIG_NET_VENDOR_CISCO=y +CONFIG_ENIC=m +CONFIG_NET_VENDOR_CORTINA=y +CONFIG_NET_VENDOR_DAVICOM=y +# CONFIG_DM9051 is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +CONFIG_NET_TULIP=y +CONFIG_DE2104X=m +CONFIG_DE2104X_DSL=0 +CONFIG_TULIP=m +# CONFIG_TULIP_MWI is not set +# CONFIG_TULIP_MMIO is not set +CONFIG_TULIP_NAPI=y +CONFIG_TULIP_NAPI_HW_MITIGATION=y +CONFIG_WINBOND_840=m +CONFIG_DM9102=m +CONFIG_ULI526X=m +CONFIG_PCMCIA_XIRCOM=m +CONFIG_NET_VENDOR_DLINK=y +CONFIG_DL2K=m +CONFIG_SUNDANCE=m +# CONFIG_SUNDANCE_MMIO is not set +CONFIG_NET_VENDOR_EMULEX=y +CONFIG_BE2NET=m +CONFIG_BE2NET_HWMON=y +CONFIG_BE2NET_BE2=y +CONFIG_BE2NET_BE3=y +CONFIG_BE2NET_LANCER=y +CONFIG_BE2NET_SKYHAWK=y +CONFIG_NET_VENDOR_ENGLEDER=y +# CONFIG_TSNEP is not set +CONFIG_NET_VENDOR_EZCHIP=y +CONFIG_NET_VENDOR_FUJITSU=y +CONFIG_PCMCIA_FMVJ18X=m +CONFIG_NET_VENDOR_FUNGIBLE=y +# CONFIG_FUN_ETH is not set +CONFIG_NET_VENDOR_GOOGLE=y +CONFIG_GVE=m +CONFIG_NET_VENDOR_HUAWEI=y +CONFIG_HINIC=m +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +CONFIG_E100=m +CONFIG_E1000=m +CONFIG_E1000E=m +CONFIG_E1000E_HWTS=y +CONFIG_IGB=m +CONFIG_IGB_HWMON=y +CONFIG_IGB_DCA=y +CONFIG_IGBVF=m +CONFIG_IXGBE=m +CONFIG_IXGBE_HWMON=y +CONFIG_IXGBE_DCA=y +CONFIG_IXGBE_DCB=y +CONFIG_IXGBE_IPSEC=y +CONFIG_IXGBEVF=m +CONFIG_IXGBEVF_IPSEC=y +CONFIG_I40E=m +CONFIG_I40E_DCB=y +CONFIG_IAVF=m +CONFIG_I40EVF=m +CONFIG_ICE=m +CONFIG_ICE_SWITCHDEV=y +CONFIG_ICE_HWTS=y +# CONFIG_FM10K is not set +CONFIG_IGC=m +CONFIG_JME=m +CONFIG_NET_VENDOR_ADI=y +# CONFIG_ADIN1110 is not set +CONFIG_NET_VENDOR_LITEX=y +CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set +CONFIG_SKGE=m +# CONFIG_SKGE_DEBUG is not set +CONFIG_SKGE_GENESIS=y +CONFIG_SKY2=m +# CONFIG_SKY2_DEBUG is not set +# CONFIG_OCTEON_EP is not set +# CONFIG_PRESTERA is not set +CONFIG_NET_VENDOR_MELLANOX=y +CONFIG_MLX4_EN=m +CONFIG_MLX4_EN_DCB=y +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +CONFIG_MLX4_CORE_GEN2=y +CONFIG_MLX5_CORE=m +CONFIG_MLX5_FPGA=y +CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_EN_ARFS=y +CONFIG_MLX5_EN_RXNFC=y +CONFIG_MLX5_MPFS=y +CONFIG_MLX5_ESWITCH=y +CONFIG_MLX5_BRIDGE=y +CONFIG_MLX5_CORE_EN_DCB=y +CONFIG_MLX5_CORE_IPOIB=y +# CONFIG_MLX5_MACSEC is not set +# CONFIG_MLX5_EN_IPSEC is not set +# CONFIG_MLX5_EN_TLS is not set +CONFIG_MLX5_SW_STEERING=y +# CONFIG_MLX5_SF is not set +# CONFIG_MLXSW_CORE is not set +CONFIG_MLXFW=m +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +CONFIG_KSZ884X_PCI=m +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +CONFIG_LAN743X=m +# CONFIG_VCAP is not set +CONFIG_NET_VENDOR_MICROSEMI=y +CONFIG_NET_VENDOR_MICROSOFT=y +CONFIG_MICROSOFT_MANA=m +CONFIG_NET_VENDOR_MYRI=y +CONFIG_MYRI10GE=m +CONFIG_MYRI10GE_DCA=y +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_NATSEMI=y +CONFIG_NATSEMI=m +CONFIG_NS83820=m +CONFIG_NET_VENDOR_NETERION=y +CONFIG_S2IO=m +CONFIG_NET_VENDOR_NETRONOME=y +CONFIG_NFP=m +CONFIG_NFP_APP_FLOWER=y +CONFIG_NFP_APP_ABM_NIC=y +CONFIG_NFP_NET_IPSEC=y +# CONFIG_NFP_DEBUG is not set +CONFIG_NET_VENDOR_8390=y +CONFIG_PCMCIA_AXNET=m +CONFIG_NE2K_PCI=m +CONFIG_PCMCIA_PCNET=m +CONFIG_NET_VENDOR_NVIDIA=y +CONFIG_FORCEDETH=m +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +CONFIG_HAMACHI=m +CONFIG_YELLOWFIN=m +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +CONFIG_NET_VENDOR_QLOGIC=y +CONFIG_QLA3XXX=m +CONFIG_QLCNIC=m +CONFIG_QLCNIC_SRIOV=y +CONFIG_QLCNIC_DCB=y +CONFIG_QLCNIC_HWMON=y +CONFIG_NETXEN_NIC=m +CONFIG_QED=m +CONFIG_QED_LL2=y +CONFIG_QED_SRIOV=y +CONFIG_QEDE=m +CONFIG_QED_RDMA=y +CONFIG_QED_ISCSI=y +CONFIG_QED_FCOE=y +CONFIG_QED_OOO=y +CONFIG_NET_VENDOR_BROCADE=y +CONFIG_BNA=m +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCOM_EMAC is not set +# CONFIG_RMNET is not set +CONFIG_NET_VENDOR_RDC=y +CONFIG_R6040=m +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_ATP is not set +CONFIG_8139CP=m +CONFIG_8139TOO=m +# CONFIG_8139TOO_PIO is not set +CONFIG_8139TOO_TUNE_TWISTER=y +CONFIG_8139TOO_8129=y +# CONFIG_8139_OLD_RX_RESET is not set +CONFIG_R8169=m +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_ROCKER=y +# CONFIG_ROCKER is not set +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_NET_VENDOR_SILAN=y +CONFIG_SC92031=m +CONFIG_NET_VENDOR_SIS=y +CONFIG_SIS900=m +CONFIG_SIS190=m +CONFIG_NET_VENDOR_SOLARFLARE=y +CONFIG_SFC=m +CONFIG_SFC_MTD=y +CONFIG_SFC_MCDI_MON=y +CONFIG_SFC_SRIOV=y +CONFIG_SFC_MCDI_LOGGING=y +CONFIG_SFC_FALCON=m +CONFIG_SFC_FALCON_MTD=y +CONFIG_SFC_SIENA=m +CONFIG_SFC_SIENA_MTD=y +CONFIG_SFC_SIENA_MCDI_MON=y +CONFIG_SFC_SIENA_SRIOV=y +CONFIG_SFC_SIENA_MCDI_LOGGING=y +CONFIG_NET_VENDOR_SMSC=y +CONFIG_PCMCIA_SMC91C92=m +CONFIG_EPIC100=m +# CONFIG_SMSC911X is not set +CONFIG_SMSC9420=m +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=m +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=m +CONFIG_DWMAC_GENERIC=m +CONFIG_DWMAC_INTEL=m +# CONFIG_STMMAC_PCI is not set +CONFIG_NET_VENDOR_SUN=y +CONFIG_HAPPYMEAL=m +CONFIG_SUNGEM=m +CONFIG_CASSINI=m +CONFIG_NIU=m +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +CONFIG_NET_VENDOR_TEHUTI=y +CONFIG_TEHUTI=m +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_PHY_SEL is not set +CONFIG_TLAN=m +CONFIG_NET_VENDOR_VERTEXCOM=y +# CONFIG_MSE102X is not set +CONFIG_NET_VENDOR_VIA=y +CONFIG_VIA_RHINE=m +# CONFIG_VIA_RHINE_MMIO is not set +CONFIG_VIA_VELOCITY=m +CONFIG_NET_VENDOR_WANGXUN=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +CONFIG_NET_VENDOR_XILINX=y +# CONFIG_XILINX_EMACLITE is not set +# CONFIG_XILINX_AXI_EMAC is not set +# CONFIG_XILINX_LL_TEMAC is not set +CONFIG_NET_VENDOR_XIRCOM=y +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_FDDI=y +CONFIG_DEFXX=m +CONFIG_SKFP=m +CONFIG_HIPPI=y +CONFIG_ROADRUNNER=m +# CONFIG_ROADRUNNER_LARGE_RINGS is not set +CONFIG_NET_SB1000=m +CONFIG_PHYLINK=m +CONFIG_PHYLIB=m +CONFIG_SWPHY=y +CONFIG_LED_TRIGGER_PHY=y +CONFIG_FIXED_PHY=m +CONFIG_SFP=m + +# +# MII PHY device drivers +# +CONFIG_AMD_PHY=m +# CONFIG_ADIN_PHY is not set +# CONFIG_ADIN1100_PHY is not set +CONFIG_AQUANTIA_PHY=m +CONFIG_AX88796B_PHY=m +CONFIG_BROADCOM_PHY=m +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +CONFIG_BCM87XX_PHY=m +CONFIG_BCM_NET_PHYLIB=m +CONFIG_BCM_NET_PHYPTP=m +CONFIG_CICADA_PHY=m +CONFIG_CORTINA_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_ICPLUS_PHY=m +CONFIG_LXT_PHY=m +# CONFIG_INTEL_XWAY_PHY is not set +CONFIG_LSI_ET1011C_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_MARVELL_10G_PHY=m +# CONFIG_MARVELL_88Q2XXX_PHY is not set +# CONFIG_MARVELL_88X2222_PHY is not set +# CONFIG_MAXLINEAR_GPHY is not set +# CONFIG_MEDIATEK_GE_PHY is not set +CONFIG_MICREL_PHY=m +# CONFIG_MICROCHIP_T1S_PHY is not set +CONFIG_MICROCHIP_PHY=m +CONFIG_MICROCHIP_T1_PHY=m +CONFIG_MICROSEMI_PHY=m +# CONFIG_MOTORCOMM_PHY is not set +CONFIG_NATIONAL_PHY=m +# CONFIG_NXP_CBTX_PHY is not set +# CONFIG_NXP_C45_TJA11XX_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_NCN26000_PHY is not set +CONFIG_AT803X_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_REALTEK_PHY=m +CONFIG_RENESAS_PHY=m +CONFIG_ROCKCHIP_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_STE10XP=m +CONFIG_TERANETICS_PHY=m +CONFIG_DP83822_PHY=m +CONFIG_DP83TC811_PHY=m +CONFIG_DP83848_PHY=m +CONFIG_DP83867_PHY=m +# CONFIG_DP83869_PHY is not set +CONFIG_DP83TD510_PHY=m +CONFIG_VITESSE_PHY=m +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PSE_CONTROLLER is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_VCAN=m +CONFIG_CAN_VXCAN=m +CONFIG_CAN_NETLINK=y +CONFIG_CAN_CALC_BITTIMING=y +CONFIG_CAN_RX_OFFLOAD=y +# CONFIG_CAN_CAN327 is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +CONFIG_CAN_SLCAN=m +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_CTUCANFD_PCI is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +CONFIG_CAN_PEAK_PCIEFD=m +CONFIG_CAN_SJA1000=m +CONFIG_CAN_EMS_PCI=m +CONFIG_CAN_EMS_PCMCIA=m +# CONFIG_CAN_F81601 is not set +CONFIG_CAN_KVASER_PCI=m +CONFIG_CAN_PEAK_PCI=m +CONFIG_CAN_PEAK_PCIEC=y +CONFIG_CAN_PEAK_PCMCIA=m +CONFIG_CAN_PLX_PCI=m +CONFIG_CAN_SJA1000_ISA=m +# CONFIG_CAN_SJA1000_PLATFORM is not set +CONFIG_CAN_SOFTING=m +CONFIG_CAN_SOFTING_CS=m + +# +# CAN SPI interfaces +# +CONFIG_CAN_HI311X=m +CONFIG_CAN_MCP251X=m +CONFIG_CAN_MCP251XFD=m +# CONFIG_CAN_MCP251XFD_SANITY is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +CONFIG_CAN_8DEV_USB=m +CONFIG_CAN_EMS_USB=m +CONFIG_CAN_ESD_USB=m +# CONFIG_CAN_ETAS_ES58X is not set +# CONFIG_CAN_F81604 is not set +CONFIG_CAN_GS_USB=m +CONFIG_CAN_KVASER_USB=m +CONFIG_CAN_MCBA_USB=m +CONFIG_CAN_PEAK_USB=m +CONFIG_CAN_UCAN=m +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_MDIO_DEVICE=m +CONFIG_MDIO_BUS=m +CONFIG_FWNODE_MDIO=m +CONFIG_ACPI_MDIO=m +CONFIG_MDIO_DEVRES=m +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +CONFIG_MDIO_I2C=m +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_THUNDER is not set + +# +# MDIO Multiplexers +# + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=m +# end of PCS device drivers + +CONFIG_PLIP=m +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOATM=m +CONFIG_PPPOE=m +# CONFIG_PPPOE_HASH_BITS_1 is not set +# CONFIG_PPPOE_HASH_BITS_2 is not set +CONFIG_PPPOE_HASH_BITS_4=y +# CONFIG_PPPOE_HASH_BITS_8 is not set +CONFIG_PPPOE_HASH_BITS=4 +CONFIG_PPTP=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_SLIP=m +CONFIG_SLHC=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_SMART=y +CONFIG_SLIP_MODE_SLIP6=y + +# +# Host-side USB support is needed for USB Network Adapter support +# +CONFIG_USB_NET_DRIVERS=m +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_CDC_NCM=m +CONFIG_USB_NET_HUAWEI_CDC_NCM=m +CONFIG_USB_NET_CDC_MBIM=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_SR9700=m +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +CONFIG_USB_NET_ZAURUS=m +CONFIG_USB_NET_CX82310_ETH=m +CONFIG_USB_NET_KALMIA=m +CONFIG_USB_NET_QMI_WWAN=m +CONFIG_USB_HSO=m +CONFIG_USB_NET_INT51X1=m +CONFIG_USB_CDC_PHONET=m +CONFIG_USB_IPHETH=m +CONFIG_USB_SIERRA_NET=m +CONFIG_USB_VL600=m +CONFIG_USB_NET_CH9200=m +CONFIG_USB_NET_AQC111=m +CONFIG_USB_RTL8153_ECM=m +CONFIG_WLAN=y +CONFIG_WLAN_VENDOR_ADMTEK=y +CONFIG_ADM8211=m +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +CONFIG_ATH5K=m +# CONFIG_ATH5K_DEBUG is not set +# CONFIG_ATH5K_TRACER is not set +CONFIG_ATH5K_PCI=y +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m +CONFIG_ATH9K_BTCOEX_SUPPORT=y +CONFIG_ATH9K=m +CONFIG_ATH9K_PCI=y +# CONFIG_ATH9K_AHB is not set +# CONFIG_ATH9K_DEBUGFS is not set +# CONFIG_ATH9K_DYNACK is not set +# CONFIG_ATH9K_WOW is not set +CONFIG_ATH9K_RFKILL=y +CONFIG_ATH9K_CHANNEL_CONTEXT=y +CONFIG_ATH9K_PCOEM=y +# CONFIG_ATH9K_PCI_NO_EEPROM is not set +CONFIG_ATH9K_HTC=m +# CONFIG_ATH9K_HTC_DEBUGFS is not set +# CONFIG_ATH9K_HWRNG is not set +CONFIG_CARL9170=m +CONFIG_CARL9170_LEDS=y +CONFIG_CARL9170_WPC=y +# CONFIG_CARL9170_HWRNG is not set +CONFIG_ATH6KL=m +CONFIG_ATH6KL_SDIO=m +CONFIG_ATH6KL_USB=m +# CONFIG_ATH6KL_DEBUG is not set +# CONFIG_ATH6KL_TRACING is not set +CONFIG_AR5523=m +CONFIG_WIL6210=m +CONFIG_WIL6210_ISR_COR=y +CONFIG_WIL6210_TRACING=y +CONFIG_WIL6210_DEBUGFS=y +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_SDIO is not set +CONFIG_ATH10K_USB=m +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_ATH10K_DEBUGFS is not set +# CONFIG_ATH10K_TRACING is not set +# CONFIG_WCN36XX is not set +CONFIG_ATH11K=m +CONFIG_ATH11K_PCI=m +# CONFIG_ATH11K_DEBUG is not set +# CONFIG_ATH11K_TRACING is not set +# CONFIG_ATH12K is not set +CONFIG_WLAN_VENDOR_ATMEL=y +CONFIG_ATMEL=m +CONFIG_PCI_ATMEL=m +CONFIG_PCMCIA_ATMEL=m +CONFIG_AT76C50X_USB=m +CONFIG_WLAN_VENDOR_BROADCOM=y +CONFIG_B43=m +CONFIG_B43_BCMA=y +CONFIG_B43_SSB=y +CONFIG_B43_BUSES_BCMA_AND_SSB=y +# CONFIG_B43_BUSES_BCMA is not set +# CONFIG_B43_BUSES_SSB is not set +CONFIG_B43_PCI_AUTOSELECT=y +CONFIG_B43_PCICORE_AUTOSELECT=y +CONFIG_B43_SDIO=y +CONFIG_B43_BCMA_PIO=y +CONFIG_B43_PIO=y +CONFIG_B43_PHY_G=y +CONFIG_B43_PHY_N=y +CONFIG_B43_PHY_LP=y +CONFIG_B43_PHY_HT=y +CONFIG_B43_LEDS=y +CONFIG_B43_HWRNG=y +# CONFIG_B43_DEBUG is not set +CONFIG_B43LEGACY=m +CONFIG_B43LEGACY_PCI_AUTOSELECT=y +CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y +CONFIG_B43LEGACY_LEDS=y +CONFIG_B43LEGACY_HWRNG=y +CONFIG_B43LEGACY_DEBUG=y +CONFIG_B43LEGACY_DMA=y +CONFIG_B43LEGACY_PIO=y +CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y +# CONFIG_B43LEGACY_DMA_MODE is not set +# CONFIG_B43LEGACY_PIO_MODE is not set +CONFIG_BRCMUTIL=m +CONFIG_BRCMSMAC=m +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_PROTO_MSGBUF=y +CONFIG_BRCMFMAC_SDIO=y +CONFIG_BRCMFMAC_USB=y +CONFIG_BRCMFMAC_PCIE=y +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_AIRO=m +CONFIG_AIRO_CS=m +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +CONFIG_IPW2200=m +CONFIG_IPW2200_MONITOR=y +CONFIG_IPW2200_RADIOTAP=y +CONFIG_IPW2200_PROMISCUOUS=y +CONFIG_IPW2200_QOS=y +# CONFIG_IPW2200_DEBUG is not set +CONFIG_LIBIPW=m +# CONFIG_LIBIPW_DEBUG is not set +CONFIG_IWLEGACY=m +CONFIG_IWL4965=m +CONFIG_IWL3945=m + +# +# iwl3945 / iwl4965 Debugging Options +# +# CONFIG_IWLEGACY_DEBUG is not set +# end of iwl3945 / iwl4965 Debugging Options + +CONFIG_IWLWIFI=m +CONFIG_IWLWIFI_LEDS=y +CONFIG_IWLDVM=m +CONFIG_IWLMVM=m +CONFIG_IWLWIFI_OPMODE_MODULAR=y + +# +# Debugging Options +# +# CONFIG_IWLWIFI_DEBUG is not set +CONFIG_IWLWIFI_DEVICE_TRACING=y +# end of Debugging Options + +CONFIG_WLAN_VENDOR_INTERSIL=y +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set +CONFIG_HOSTAP_PLX=m +CONFIG_HOSTAP_PCI=m +CONFIG_HOSTAP_CS=m +CONFIG_HERMES=m +# CONFIG_HERMES_PRISM is not set +CONFIG_HERMES_CACHE_FW_ON_INIT=y +CONFIG_PLX_HERMES=m +CONFIG_TMD_HERMES=m +CONFIG_NORTEL_HERMES=m +CONFIG_PCMCIA_HERMES=m +CONFIG_PCMCIA_SPECTRUM=m +CONFIG_ORINOCO_USB=m +CONFIG_P54_COMMON=m +CONFIG_P54_USB=m +CONFIG_P54_PCI=m +# CONFIG_P54_SPI is not set +CONFIG_P54_LEDS=y +CONFIG_WLAN_VENDOR_MARVELL=y +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_USB=m +CONFIG_LIBERTAS_CS=m +CONFIG_LIBERTAS_SDIO=m +# CONFIG_LIBERTAS_SPI is not set +# CONFIG_LIBERTAS_DEBUG is not set +CONFIG_LIBERTAS_MESH=y +CONFIG_LIBERTAS_THINFIRM=m +# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set +CONFIG_LIBERTAS_THINFIRM_USB=m +CONFIG_MWIFIEX=m +CONFIG_MWIFIEX_SDIO=m +CONFIG_MWIFIEX_PCIE=m +CONFIG_MWIFIEX_USB=m +CONFIG_MWL8K=m +CONFIG_WLAN_VENDOR_MEDIATEK=y +CONFIG_MT7601U=m +CONFIG_MT76_CORE=m +CONFIG_MT76_LEDS=y +CONFIG_MT76_USB=m +CONFIG_MT76x02_LIB=m +CONFIG_MT76x02_USB=m +CONFIG_MT76_CONNAC_LIB=m +CONFIG_MT792x_LIB=m +CONFIG_MT792x_USB=m +CONFIG_MT76x0_COMMON=m +CONFIG_MT76x0U=m +CONFIG_MT76x0E=m +CONFIG_MT76x2_COMMON=m +CONFIG_MT76x2E=m +CONFIG_MT76x2U=m +# CONFIG_MT7603E is not set +CONFIG_MT7615_COMMON=m +CONFIG_MT7615E=m +CONFIG_MT7663_USB_SDIO_COMMON=m +CONFIG_MT7663U=m +# CONFIG_MT7663S is not set +CONFIG_MT7915E=m +CONFIG_MT7921_COMMON=m +CONFIG_MT7921E=m +# CONFIG_MT7921S is not set +CONFIG_MT7921U=m +# CONFIG_MT7996E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_PURELIFI=y +# CONFIG_PLFXLC is not set +CONFIG_WLAN_VENDOR_RALINK=y +CONFIG_RT2X00=m +CONFIG_RT2400PCI=m +CONFIG_RT2500PCI=m +CONFIG_RT61PCI=m +CONFIG_RT2800PCI=m +CONFIG_RT2800PCI_RT33XX=y +CONFIG_RT2800PCI_RT35XX=y +CONFIG_RT2800PCI_RT53XX=y +CONFIG_RT2800PCI_RT3290=y +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT33XX=y +CONFIG_RT2800USB_RT35XX=y +CONFIG_RT2800USB_RT3573=y +CONFIG_RT2800USB_RT53XX=y +CONFIG_RT2800USB_RT55XX=y +# CONFIG_RT2800USB_UNKNOWN is not set +CONFIG_RT2800_LIB=m +CONFIG_RT2800_LIB_MMIO=m +CONFIG_RT2X00_LIB_MMIO=m +CONFIG_RT2X00_LIB_PCI=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_DEBUG is not set +CONFIG_WLAN_VENDOR_REALTEK=y +CONFIG_RTL8180=m +CONFIG_RTL8187=m +CONFIG_RTL8187_LEDS=y +CONFIG_RTL_CARDS=m +CONFIG_RTL8192CE=m +CONFIG_RTL8192SE=m +CONFIG_RTL8192DE=m +CONFIG_RTL8723AE=m +CONFIG_RTL8723BE=m +CONFIG_RTL8188EE=m +CONFIG_RTL8192EE=m +CONFIG_RTL8821AE=m +CONFIG_RTL8192CU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_PCI=m +CONFIG_RTLWIFI_USB=m +# CONFIG_RTLWIFI_DEBUG is not set +CONFIG_RTL8192C_COMMON=m +CONFIG_RTL8723_COMMON=m +CONFIG_RTLBTCOEXIST=m +CONFIG_RTL8XXXU=m +# CONFIG_RTL8XXXU_UNTESTED is not set +CONFIG_RTW88=m +CONFIG_RTW88_CORE=m +CONFIG_RTW88_PCI=m +CONFIG_RTW88_SDIO=m +CONFIG_RTW88_USB=m +CONFIG_RTW88_8822B=m +CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723D=m +CONFIG_RTW88_8821C=m +CONFIG_RTW88_8822BE=m +CONFIG_RTW88_8822BS=m +CONFIG_RTW88_8822BU=m +CONFIG_RTW88_8822CE=m +CONFIG_RTW88_8822CS=m +CONFIG_RTW88_8822CU=m +CONFIG_RTW88_8723DE=m +# CONFIG_RTW88_8723DS is not set +CONFIG_RTW88_8723DU=m +CONFIG_RTW88_8821CE=m +CONFIG_RTW88_8821CS=m +CONFIG_RTW88_8821CU=m +# CONFIG_RTW88_DEBUG is not set +# CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW89=m +CONFIG_RTW89_CORE=m +CONFIG_RTW89_PCI=m +CONFIG_RTW89_8852A=m +CONFIG_RTW89_8852B=m +CONFIG_RTW89_8852C=m +# CONFIG_RTW89_8851BE is not set +CONFIG_RTW89_8852AE=m +CONFIG_RTW89_8852BE=m +CONFIG_RTW89_8852CE=m +# CONFIG_RTW89_DEBUGMSG is not set +# CONFIG_RTW89_DEBUGFS is not set +CONFIG_WLAN_VENDOR_RSI=y +CONFIG_RSI_91X=m +CONFIG_RSI_DEBUGFS=y +# CONFIG_RSI_SDIO is not set +CONFIG_RSI_USB=m +CONFIG_RSI_COEX=y +CONFIG_WLAN_VENDOR_SILABS=y +# CONFIG_WFX is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +# CONFIG_WLAN_VENDOR_TI is not set +CONFIG_WLAN_VENDOR_ZYDAS=y +CONFIG_USB_ZD1201=m +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +CONFIG_PCMCIA_RAYCS=m +CONFIG_PCMCIA_WL3501=m +CONFIG_USB_NET_RNDIS_WLAN=m +CONFIG_MAC80211_HWSIM=m +# CONFIG_VIRT_WIFI is not set +CONFIG_WAN=y +CONFIG_HDLC=m +CONFIG_HDLC_RAW=m +CONFIG_HDLC_RAW_ETH=m +CONFIG_HDLC_CISCO=m +CONFIG_HDLC_FR=m +CONFIG_HDLC_PPP=m +# CONFIG_HDLC_X25 is not set +CONFIG_PCI200SYN=m +CONFIG_WANXL=m +# CONFIG_PC300TOO is not set +CONFIG_FARSYNC=m +CONFIG_IEEE802154_DRIVERS=m +CONFIG_IEEE802154_FAKELB=m +CONFIG_IEEE802154_AT86RF230=m +CONFIG_IEEE802154_MRF24J40=m +CONFIG_IEEE802154_CC2520=m +CONFIG_IEEE802154_ATUSB=m +CONFIG_IEEE802154_ADF7242=m +# CONFIG_IEEE802154_CA8210 is not set +# CONFIG_IEEE802154_MCR20A is not set +CONFIG_IEEE802154_HWSIM=m + +# +# Wireless WAN +# +CONFIG_WWAN=m +CONFIG_WWAN_DEBUGFS=y +# CONFIG_WWAN_HWSIM is not set +CONFIG_MHI_WWAN_CTRL=m +CONFIG_MHI_WWAN_MBIM=m +CONFIG_IOSM=m +CONFIG_MTK_T7XX=m +# end of Wireless WAN + +CONFIG_XEN_NETDEV_FRONTEND=m +CONFIG_XEN_NETDEV_BACKEND=m +CONFIG_VMXNET3=m +CONFIG_FUJITSU_ES=m +CONFIG_USB4_NET=m +CONFIG_HYPERV_NET=m +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=m +CONFIG_ISDN=y +CONFIG_ISDN_CAPI=y +CONFIG_CAPI_TRACE=y +CONFIG_ISDN_CAPI_MIDDLEWARE=y +CONFIG_MISDN=m +CONFIG_MISDN_DSP=m +CONFIG_MISDN_L1OIP=m + +# +# mISDN hardware drivers +# +CONFIG_MISDN_HFCPCI=m +CONFIG_MISDN_HFCMULTI=m +CONFIG_MISDN_HFCUSB=m +CONFIG_MISDN_AVMFRITZ=m +CONFIG_MISDN_SPEEDFAX=m +CONFIG_MISDN_INFINEON=m +CONFIG_MISDN_W6692=m +# CONFIG_MISDN_NETJET is not set +CONFIG_MISDN_IPAC=m +CONFIG_MISDN_ISAR=m + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=m +CONFIG_INPUT_SPARSEKMAP=m +CONFIG_INPUT_MATRIXKMAP=m +CONFIG_INPUT_VIVALDIFMAP=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_EVDEV=m +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +CONFIG_KEYBOARD_ADP5588=m +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_APPLESPI=m +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +CONFIG_KEYBOARD_QT2160=m +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +CONFIG_KEYBOARD_LKKBD=m +CONFIG_KEYBOARD_GPIO=m +CONFIG_KEYBOARD_GPIO_POLLED=m +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +CONFIG_KEYBOARD_LM8323=m +# CONFIG_KEYBOARD_LM8333 is not set +CONFIG_KEYBOARD_MAX7359=m +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +CONFIG_KEYBOARD_NEWTON=m +CONFIG_KEYBOARD_OPENCORES=m +# CONFIG_KEYBOARD_PINEPHONE is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +CONFIG_KEYBOARD_STOWAWAY=m +CONFIG_KEYBOARD_SUNKBD=m +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +CONFIG_KEYBOARD_XTKBD=m +CONFIG_KEYBOARD_CROS_EC=m +# CONFIG_KEYBOARD_CYPRESS_SF is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_MOUSE_PS2_ELANTECH_SMBUS=y +CONFIG_MOUSE_PS2_SENTELIC=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_VMMOUSE=y +CONFIG_MOUSE_PS2_SMBUS=y +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_APPLETOUCH=m +CONFIG_MOUSE_BCM5974=m +CONFIG_MOUSE_CYAPA=m +CONFIG_MOUSE_ELAN_I2C=m +CONFIG_MOUSE_ELAN_I2C_I2C=y +CONFIG_MOUSE_ELAN_I2C_SMBUS=y +CONFIG_MOUSE_VSXXXAA=m +# CONFIG_MOUSE_GPIO is not set +CONFIG_MOUSE_SYNAPTICS_I2C=m +CONFIG_MOUSE_SYNAPTICS_USB=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_ANALOG=m +CONFIG_JOYSTICK_A3D=m +# CONFIG_JOYSTICK_ADC is not set +CONFIG_JOYSTICK_ADI=m +CONFIG_JOYSTICK_COBRA=m +CONFIG_JOYSTICK_GF2K=m +CONFIG_JOYSTICK_GRIP=m +CONFIG_JOYSTICK_GRIP_MP=m +CONFIG_JOYSTICK_GUILLEMOT=m +CONFIG_JOYSTICK_INTERACT=m +CONFIG_JOYSTICK_SIDEWINDER=m +CONFIG_JOYSTICK_TMDC=m +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_USB=m +CONFIG_JOYSTICK_IFORCE_232=m +CONFIG_JOYSTICK_WARRIOR=m +CONFIG_JOYSTICK_MAGELLAN=m +CONFIG_JOYSTICK_SPACEORB=m +CONFIG_JOYSTICK_SPACEBALL=m +CONFIG_JOYSTICK_STINGER=m +CONFIG_JOYSTICK_TWIDJOY=m +CONFIG_JOYSTICK_ZHENHUA=m +CONFIG_JOYSTICK_DB9=m +CONFIG_JOYSTICK_GAMECON=m +CONFIG_JOYSTICK_TURBOGRAFX=m +# CONFIG_JOYSTICK_AS5011 is not set +CONFIG_JOYSTICK_JOYDUMP=m +CONFIG_JOYSTICK_XPAD=m +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_JOYSTICK_WALKERA0701=m +# CONFIG_JOYSTICK_PSXPAD_SPI is not set +CONFIG_JOYSTICK_PXRC=m +# CONFIG_JOYSTICK_QWIIC is not set +# CONFIG_JOYSTICK_FSIA6B is not set +# CONFIG_JOYSTICK_SENSEHAT is not set +CONFIG_INPUT_TABLET=y +CONFIG_TABLET_USB_ACECAD=m +CONFIG_TABLET_USB_AIPTEK=m +CONFIG_TABLET_USB_HANWANG=m +CONFIG_TABLET_USB_KBTAB=m +CONFIG_TABLET_USB_PEGASUS=m +CONFIG_TABLET_SERIAL_WACOM4=m +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_TOUCHSCREEN_AD7877=m +CONFIG_TOUCHSCREEN_AD7879=m +CONFIG_TOUCHSCREEN_AD7879_I2C=m +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_ADC is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP5 is not set +CONFIG_TOUCHSCREEN_DYNAPRO=m +CONFIG_TOUCHSCREEN_HAMPSHIRE=m +CONFIG_TOUCHSCREEN_EETI=m +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +CONFIG_TOUCHSCREEN_FUJITSU=m +CONFIG_TOUCHSCREEN_GOODIX=m +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set +# CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_ILITEK is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +CONFIG_TOUCHSCREEN_GUNZE=m +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +CONFIG_TOUCHSCREEN_ELAN=m +CONFIG_TOUCHSCREEN_ELO=m +CONFIG_TOUCHSCREEN_WACOM_W8001=m +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +CONFIG_TOUCHSCREEN_MCS5000=m +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MSG2638 is not set +CONFIG_TOUCHSCREEN_MTOUCH=m +# CONFIG_TOUCHSCREEN_NOVATEK_NVT_TS is not set +# CONFIG_TOUCHSCREEN_IMAGIS is not set +CONFIG_TOUCHSCREEN_INEXIO=m +CONFIG_TOUCHSCREEN_PENMOUNT=m +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +CONFIG_TOUCHSCREEN_TOUCHRIGHT=m +CONFIG_TOUCHSCREEN_TOUCHWIN=m +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_WM97XX=m +CONFIG_TOUCHSCREEN_WM9705=y +CONFIG_TOUCHSCREEN_WM9712=y +CONFIG_TOUCHSCREEN_WM9713=y +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_ELO=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +CONFIG_TOUCHSCREEN_TOUCHIT213=m +CONFIG_TOUCHSCREEN_TSC_SERIO=m +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +CONFIG_TOUCHSCREEN_TSC2007=m +# CONFIG_TOUCHSCREEN_TSC2007_IIO is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +CONFIG_TOUCHSCREEN_SILEAD=m +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +CONFIG_TOUCHSCREEN_SUR40=m +CONFIG_TOUCHSCREEN_SURFACE3_SPI=m +# CONFIG_TOUCHSCREEN_SX8654 is not set +CONFIG_TOUCHSCREEN_TPS6507X=m +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_IQS7211 is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +# CONFIG_TOUCHSCREEN_HIMAX_HX83112B is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +CONFIG_INPUT_PCSPKR=m +# CONFIG_INPUT_MMA8450 is not set +CONFIG_INPUT_APANEL=m +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +CONFIG_INPUT_ATLAS_BTNS=m +CONFIG_INPUT_ATI_REMOTE2=m +CONFIG_INPUT_KEYSPAN_REMOTE=m +# CONFIG_INPUT_KXTJ9 is not set +CONFIG_INPUT_POWERMATE=m +CONFIG_INPUT_YEALINK=m +CONFIG_INPUT_CM109=m +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +CONFIG_INPUT_AXP20X_PEK=m +CONFIG_INPUT_UINPUT=m +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_DA7280_HAPTICS is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_IQS626A is not set +# CONFIG_INPUT_IQS7222 is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +CONFIG_INPUT_IDEAPAD_SLIDEBAR=m +CONFIG_INPUT_SOC_BUTTON_ARRAY=m +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +CONFIG_RMI4_CORE=m +# CONFIG_RMI4_I2C is not set +# CONFIG_RMI4_SPI is not set +CONFIG_RMI4_SMB=m +CONFIG_RMI4_F03=y +CONFIG_RMI4_F03_SERIO=m +CONFIG_RMI4_2D_SENSOR=y +CONFIG_RMI4_F11=y +CONFIG_RMI4_F12=y +CONFIG_RMI4_F30=y +CONFIG_RMI4_F34=y +CONFIG_RMI4_F3A=y +# CONFIG_RMI4_F54 is not set +CONFIG_RMI4_F55=y + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_SERPORT=m +CONFIG_SERIO_CT82C710=m +CONFIG_SERIO_PARKBD=m +CONFIG_SERIO_PCIPS2=m +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=m +CONFIG_SERIO_ALTERA_PS2=m +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +CONFIG_HYPERV_KEYBOARD=m +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +CONFIG_GAMEPORT=m +CONFIG_GAMEPORT_EMU10K1=m +CONFIG_GAMEPORT_FM801=m +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_LEGACY_TIOCSTI is not set +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_8250_16550A_VARIANTS is not set +CONFIG_SERIAL_8250_FINTEK=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCILIB=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=m +CONFIG_SERIAL_8250_CS=m +CONFIG_SERIAL_8250_NR_UARTS=32 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_PCI1XXXX is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_RSA=y +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_8250_LPSS=m +CONFIG_SERIAL_8250_MID=y +CONFIG_SERIAL_8250_PERICOM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_JSM=m +# CONFIG_SERIAL_LANTIQ is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_ARC is not set +CONFIG_SERIAL_RP2=m +CONFIG_SERIAL_RP2_NR_UARTS=32 +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_NONSTANDARD=y +CONFIG_MOXA_INTELLIO=m +CONFIG_MOXA_SMARTIO=m +CONFIG_N_HDLC=m +CONFIG_IPWIRELESS=m +CONFIG_N_GSM=m +CONFIG_NOZOMI=m +# CONFIG_NULL_TTY is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_TTY_PRINTK=m +CONFIG_TTY_PRINTK_LEVEL=6 +CONFIG_PRINTER=m +# CONFIG_LP_CONSOLE is not set +CONFIG_PPDEV=m +CONFIG_VIRTIO_CONSOLE=m +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DMI_DECODE=y +CONFIG_IPMI_PLAT_DATA=y +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +CONFIG_IPMI_SSIF=m +CONFIG_IPMI_WATCHDOG=m +CONFIG_IPMI_POWEROFF=m +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_INTEL=m +CONFIG_HW_RANDOM_AMD=m +# CONFIG_HW_RANDOM_BA431 is not set +CONFIG_HW_RANDOM_VIA=m +CONFIG_HW_RANDOM_VIRTIO=m +# CONFIG_HW_RANDOM_XIPHERA is not set +CONFIG_APPLICOM=m +CONFIG_MWAVE=m +CONFIG_DEVMEM=y +CONFIG_NVRAM=m +CONFIG_DEVPORT=y +CONFIG_HPET=y +CONFIG_HPET_MMAP=y +CONFIG_HPET_MMAP_DEFAULT=y +CONFIG_HANGCHECK_TIMER=m +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +CONFIG_TCG_TIS_CORE=y +CONFIG_TCG_TIS=y +CONFIG_TCG_TIS_SPI=m +CONFIG_TCG_TIS_SPI_CR50=y +# CONFIG_TCG_TIS_I2C is not set +CONFIG_TCG_TIS_I2C_CR50=m +CONFIG_TCG_TIS_I2C_ATMEL=m +CONFIG_TCG_TIS_I2C_INFINEON=m +CONFIG_TCG_TIS_I2C_NUVOTON=m +CONFIG_TCG_NSC=m +CONFIG_TCG_ATMEL=m +CONFIG_TCG_INFINEON=m +CONFIG_TCG_XEN=m +CONFIG_TCG_CRB=y +CONFIG_TCG_VTPM_PROXY=m +CONFIG_TCG_TIS_ST33ZP24=m +CONFIG_TCG_TIS_ST33ZP24_I2C=m +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +CONFIG_TELCLOCK=m +# CONFIG_XILLYBUS is not set +# CONFIG_XILLYUSB is not set +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=m +CONFIG_I2C_MUX=m + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_SMBUS=m +CONFIG_I2C_ALGOBIT=m +CONFIG_I2C_ALGOPCA=m + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +CONFIG_I2C_CCGX_UCSI=m +CONFIG_I2C_ALI1535=m +CONFIG_I2C_ALI1563=m +CONFIG_I2C_ALI15X3=m +CONFIG_I2C_AMD756=m +CONFIG_I2C_AMD756_S4882=m +CONFIG_I2C_AMD8111=m +CONFIG_I2C_AMD_MP2=m +CONFIG_I2C_I801=m +CONFIG_I2C_ISCH=m +CONFIG_I2C_ISMT=m +CONFIG_I2C_PIIX4=m +CONFIG_I2C_CHT_WC=m +CONFIG_I2C_NFORCE2=m +CONFIG_I2C_NFORCE2_S4985=m +# CONFIG_I2C_NVIDIA_GPU is not set +CONFIG_I2C_SIS5595=m +CONFIG_I2C_SIS630=m +CONFIG_I2C_SIS96X=m +CONFIG_I2C_VIA=m +CONFIG_I2C_VIAPRO=m + +# +# ACPI drivers +# +CONFIG_I2C_SCMI=m + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_I2C_DESIGNWARE_BAYTRAIL=y +CONFIG_I2C_DESIGNWARE_PCI=m +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_KEMPLD=m +CONFIG_I2C_OCORES=m +CONFIG_I2C_PCA_PLATFORM=m +CONFIG_I2C_SIMTEC=m +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +CONFIG_I2C_DIOLAN_U2C=m +# CONFIG_I2C_CP2615 is not set +CONFIG_I2C_PARPORT=m +# CONFIG_I2C_PCI1XXXX is not set +CONFIG_I2C_ROBOTFUZZ_OSIF=m +CONFIG_I2C_TAOS_EVM=m +CONFIG_I2C_TINY_USB=m +CONFIG_I2C_VIPERBOARD=m + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_MLXCPLD is not set +CONFIG_I2C_CROS_EC_TUNNEL=m +# CONFIG_I2C_VIRTIO is not set +# end of I2C Hardware Bus support + +CONFIG_I2C_STUB=m +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BITBANG=m +CONFIG_SPI_BUTTERFLY=m +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_INTEL_PCI is not set +# CONFIG_SPI_INTEL_PLATFORM is not set +CONFIG_SPI_LM70_LLP=m +# CONFIG_SPI_MICROCHIP_CORE is not set +# CONFIG_SPI_MICROCHIP_CORE_QSPI is not set +# CONFIG_SPI_LANTIQ_SSC is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PCI1XXXX is not set +CONFIG_SPI_PXA2XX=m +CONFIG_SPI_PXA2XX_PCI=m +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_DYNAMIC=y +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +CONFIG_PPS_CLIENT_LDISC=m +CONFIG_PPS_CLIENT_PARPORT=m +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_DP83640_PHY=m +CONFIG_PTP_1588_CLOCK_INES=m +CONFIG_PTP_1588_CLOCK_KVM=m +CONFIG_PTP_1588_CLOCK_IDT82P33=m +CONFIG_PTP_1588_CLOCK_IDTCM=m +# CONFIG_PTP_1588_CLOCK_MOCK is not set +CONFIG_PTP_1588_CLOCK_VMW=m +CONFIG_PTP_1588_CLOCK_OCP=m +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +CONFIG_PINCTRL_AMD=y +# CONFIG_PINCTRL_CY8C95X0 is not set +# CONFIG_PINCTRL_MCP23S08 is not set +# CONFIG_PINCTRL_SX150X is not set + +# +# Intel pinctrl drivers +# +CONFIG_PINCTRL_BAYTRAIL=y +CONFIG_PINCTRL_CHERRYVIEW=y +# CONFIG_PINCTRL_LYNXPOINT is not set +CONFIG_PINCTRL_INTEL=y +CONFIG_PINCTRL_ALDERLAKE=m +CONFIG_PINCTRL_BROXTON=y +CONFIG_PINCTRL_CANNONLAKE=y +CONFIG_PINCTRL_CEDARFORK=y +CONFIG_PINCTRL_DENVERTON=y +CONFIG_PINCTRL_ELKHARTLAKE=m +CONFIG_PINCTRL_EMMITSBURG=m +CONFIG_PINCTRL_GEMINILAKE=y +CONFIG_PINCTRL_ICELAKE=y +CONFIG_PINCTRL_JASPERLAKE=m +CONFIG_PINCTRL_LAKEFIELD=m +CONFIG_PINCTRL_LEWISBURG=y +# CONFIG_PINCTRL_METEORLAKE is not set +CONFIG_PINCTRL_SUNRISEPOINT=y +CONFIG_PINCTRL_TIGERLAKE=y +# end of Intel pinctrl drivers + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=m +CONFIG_GPIO_REGMAP=m +CONFIG_GPIO_IDIO_16=m + +# +# Memory mapped GPIO drivers +# +CONFIG_GPIO_AMDPT=m +# CONFIG_GPIO_DWAPB is not set +CONFIG_GPIO_EXAR=m +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_ICH is not set +# CONFIG_GPIO_MB86S7X is not set +CONFIG_GPIO_AMD_FCH=m +# end of Memory mapped GPIO drivers + +# +# Port-mapped I/O GPIO drivers +# +# CONFIG_GPIO_VX855 is not set +CONFIG_GPIO_F7188X=m +# CONFIG_GPIO_IT87 is not set +# CONFIG_GPIO_SCH is not set +# CONFIG_GPIO_SCH311X is not set +# CONFIG_GPIO_WINBOND is not set +# CONFIG_GPIO_WS16C48 is not set +# end of Port-mapped I/O GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_FXL6408 is not set +# CONFIG_GPIO_DS4520 is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_CRYSTAL_COVE is not set +# CONFIG_GPIO_ELKHARTLAKE is not set +CONFIG_GPIO_KEMPLD=m +# CONFIG_GPIO_TPS68470 is not set +# CONFIG_GPIO_WHISKEY_COVE is not set +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_AMD8111 is not set +CONFIG_GPIO_ML_IOH=m +CONFIG_GPIO_PCI_IDIO_16=m +CONFIG_GPIO_PCIE_IDIO_24=m +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +CONFIG_GPIO_VIPERBOARD=m +# end of USB GPIO expanders + +# +# Virtual GPIO drivers +# +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_LATCH is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_GPIO_VIRTIO is not set +# CONFIG_GPIO_SIM is not set +# end of Virtual GPIO drivers + +CONFIG_W1=m +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_MATROX is not set +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_DS2482=m +CONFIG_W1_MASTER_GPIO=m +# CONFIG_W1_MASTER_SGI is not set +# end of 1-wire Bus Masters + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=m +CONFIG_W1_SLAVE_SMEM=m +CONFIG_W1_SLAVE_DS2405=m +CONFIG_W1_SLAVE_DS2408=m +CONFIG_W1_SLAVE_DS2408_READBACK=y +CONFIG_W1_SLAVE_DS2413=m +CONFIG_W1_SLAVE_DS2406=m +CONFIG_W1_SLAVE_DS2423=m +CONFIG_W1_SLAVE_DS2805=m +# CONFIG_W1_SLAVE_DS2430 is not set +CONFIG_W1_SLAVE_DS2431=m +CONFIG_W1_SLAVE_DS2433=m +# CONFIG_W1_SLAVE_DS2433_CRC is not set +CONFIG_W1_SLAVE_DS2438=m +# CONFIG_W1_SLAVE_DS250X is not set +CONFIG_W1_SLAVE_DS2780=m +CONFIG_W1_SLAVE_DS2781=m +CONFIG_W1_SLAVE_DS28E04=m +CONFIG_W1_SLAVE_DS28E17=m +# end of 1-wire Slaves + +# CONFIG_POWER_RESET is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_IP5XXX_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +CONFIG_BATTERY_DS2760=m +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SAMSUNG_SDI is not set +CONFIG_BATTERY_SBS=m +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +CONFIG_BATTERY_BQ27XXX=m +# CONFIG_BATTERY_BQ27XXX_I2C is not set +CONFIG_BATTERY_BQ27XXX_HDQ=m +# CONFIG_CHARGER_AXP20X is not set +# CONFIG_BATTERY_AXP20X is not set +# CONFIG_AXP20X_POWER is not set +CONFIG_AXP288_CHARGER=m +CONFIG_AXP288_FUEL_GAUGE=m +# CONFIG_BATTERY_MAX17040 is not set +CONFIG_BATTERY_MAX17042=m +# CONFIG_BATTERY_MAX1721X is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_LTC4162L is not set +# CONFIG_CHARGER_MAX77976 is not set +# CONFIG_CHARGER_BQ2415X is not set +CONFIG_CHARGER_BQ24190=m +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_BQ256XX is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_GOLDFISH is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_RT9467 is not set +# CONFIG_CHARGER_RT9471 is not set +CONFIG_CHARGER_CROS_USBPD=m +CONFIG_CHARGER_CROS_PCHG=m +# CONFIG_CHARGER_BD99954 is not set +CONFIG_CHARGER_WILCO=m +CONFIG_BATTERY_SURFACE=m +CONFIG_CHARGER_SURFACE=m +# CONFIG_BATTERY_UG3105 is not set +CONFIG_HWMON=y +CONFIG_HWMON_VID=m +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +CONFIG_SENSORS_ABITUGURU=m +CONFIG_SENSORS_ABITUGURU3=m +# CONFIG_SENSORS_AD7314 is not set +CONFIG_SENSORS_AD7414=m +CONFIG_SENSORS_AD7418=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1029=m +CONFIG_SENSORS_ADM1031=m +# CONFIG_SENSORS_ADM1177 is not set +CONFIG_SENSORS_ADM9240=m +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +CONFIG_SENSORS_ADT7411=m +CONFIG_SENSORS_ADT7462=m +CONFIG_SENSORS_ADT7470=m +CONFIG_SENSORS_ADT7475=m +# CONFIG_SENSORS_AHT10 is not set +CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m +# CONFIG_SENSORS_AS370 is not set +CONFIG_SENSORS_ASC7621=m +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +CONFIG_SENSORS_K8TEMP=m +CONFIG_SENSORS_K10TEMP=m +CONFIG_SENSORS_FAM15H_POWER=m +CONFIG_SENSORS_APPLESMC=m +CONFIG_SENSORS_ASB100=m +CONFIG_SENSORS_ATXP1=m +CONFIG_SENSORS_CORSAIR_CPRO=m +CONFIG_SENSORS_CORSAIR_PSU=m +CONFIG_SENSORS_DRIVETEMP=m +CONFIG_SENSORS_DS620=m +CONFIG_SENSORS_DS1621=m +CONFIG_SENSORS_DELL_SMM=m +CONFIG_I8K=y +CONFIG_SENSORS_I5K_AMB=m +CONFIG_SENSORS_F71805F=m +CONFIG_SENSORS_F71882FG=m +CONFIG_SENSORS_F75375S=m +CONFIG_SENSORS_FSCHMD=m +CONFIG_SENSORS_FTSTEUTATES=m +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_GL520SM=m +CONFIG_SENSORS_G760A=m +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_HS3001 is not set +CONFIG_SENSORS_IBMAEM=m +CONFIG_SENSORS_IBMPEX=m +# CONFIG_SENSORS_IIO_HWMON is not set +CONFIG_SENSORS_I5500=m +CONFIG_SENSORS_CORETEMP=m +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_JC42=m +# CONFIG_SENSORS_POWR1220 is not set +CONFIG_SENSORS_LINEAGE=m +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2992 is not set +CONFIG_SENSORS_LTC4151=m +CONFIG_SENSORS_LTC4215=m +# CONFIG_SENSORS_LTC4222 is not set +CONFIG_SENSORS_LTC4245=m +# CONFIG_SENSORS_LTC4260 is not set +CONFIG_SENSORS_LTC4261=m +CONFIG_SENSORS_MAX1111=m +# CONFIG_SENSORS_MAX127 is not set +CONFIG_SENSORS_MAX16065=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_MAX1668=m +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX31760 is not set +# CONFIG_MAX31827 is not set +# CONFIG_SENSORS_MAX6620 is not set +# CONFIG_SENSORS_MAX6621 is not set +CONFIG_SENSORS_MAX6639=m +CONFIG_SENSORS_MAX6650=m +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MC34VR500 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_TPS23861 is not set +CONFIG_SENSORS_MENF21BMC_HWMON=m +# CONFIG_SENSORS_MR75203 is not set +CONFIG_SENSORS_ADCXX=m +CONFIG_SENSORS_LM63=m +CONFIG_SENSORS_LM70=m +CONFIG_SENSORS_LM73=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_LM92=m +CONFIG_SENSORS_LM93=m +# CONFIG_SENSORS_LM95234 is not set +CONFIG_SENSORS_LM95241=m +CONFIG_SENSORS_LM95245=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_PC87427=m +CONFIG_SENSORS_NTC_THERMISTOR=m +CONFIG_SENSORS_NCT6683=m +CONFIG_SENSORS_NCT6775_CORE=m +CONFIG_SENSORS_NCT6775=m +# CONFIG_SENSORS_NCT6775_I2C is not set +CONFIG_SENSORS_NCT7802=m +CONFIG_SENSORS_NCT7904=m +CONFIG_SENSORS_NPCM7XX=m +# CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_SMART2 is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_OXP is not set +CONFIG_SENSORS_PCF8591=m +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_SBTSI is not set +# CONFIG_SENSORS_SBRMI is not set +# CONFIG_SENSORS_SHT15 is not set +CONFIG_SENSORS_SHT21=m +CONFIG_SENSORS_SHT3x=m +CONFIG_SENSORS_SHT4x=m +# CONFIG_SENSORS_SHTC1 is not set +CONFIG_SENSORS_SIS5595=m +CONFIG_SENSORS_DME1737=m +CONFIG_SENSORS_EMC1403=m +CONFIG_SENSORS_EMC2103=m +# CONFIG_SENSORS_EMC2305 is not set +CONFIG_SENSORS_EMC6W201=m +CONFIG_SENSORS_SMSC47M1=m +CONFIG_SENSORS_SMSC47M192=m +CONFIG_SENSORS_SMSC47B397=m +CONFIG_SENSORS_SCH56XX_COMMON=m +CONFIG_SENSORS_SCH5627=m +CONFIG_SENSORS_SCH5636=m +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_ADC128D818 is not set +CONFIG_SENSORS_ADS7828=m +CONFIG_SENSORS_ADS7871=m +CONFIG_SENSORS_AMC6821=m +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA238 is not set +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +CONFIG_SENSORS_THMC50=m +CONFIG_SENSORS_TMP102=m +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +CONFIG_SENSORS_TMP401=m +CONFIG_SENSORS_TMP421=m +# CONFIG_SENSORS_TMP464 is not set +# CONFIG_SENSORS_TMP513 is not set +CONFIG_SENSORS_VIA_CPUTEMP=m +CONFIG_SENSORS_VIA686A=m +CONFIG_SENSORS_VT1211=m +CONFIG_SENSORS_VT8231=m +CONFIG_SENSORS_W83773G=m +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83791D=m +CONFIG_SENSORS_W83792D=m +CONFIG_SENSORS_W83793=m +CONFIG_SENSORS_W83795=m +# CONFIG_SENSORS_W83795_FANCTRL is not set +CONFIG_SENSORS_W83L785TS=m +CONFIG_SENSORS_W83L786NG=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83627EHF=m +# CONFIG_SENSORS_XGENE is not set + +# +# ACPI drivers +# +CONFIG_SENSORS_ACPI_POWER=m +CONFIG_SENSORS_ATK0110=m +CONFIG_SENSORS_ASUS_WMI=m +CONFIG_SENSORS_ASUS_EC=m +# CONFIG_SENSORS_HP_WMI is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_NETLINK=y +CONFIG_THERMAL_STATISTICS=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_ACPI=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_DEFAULT_GOV_BANG_BANG is not set +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_GOV_BANG_BANG=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_DEVFREQ_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set + +# +# Intel thermal drivers +# +CONFIG_INTEL_POWERCLAMP=m +CONFIG_X86_THERMAL_VECTOR=y +CONFIG_INTEL_TCC=y +CONFIG_X86_PKG_TEMP_THERMAL=m +CONFIG_INTEL_SOC_DTS_IOSF_CORE=m +CONFIG_INTEL_SOC_DTS_THERMAL=m + +# +# ACPI INT340X thermal drivers +# +CONFIG_INT340X_THERMAL=m +CONFIG_ACPI_THERMAL_REL=m +CONFIG_INT3406_THERMAL=m +CONFIG_PROC_THERMAL_MMIO_RAPL=m +# end of ACPI INT340X thermal drivers + +# CONFIG_INTEL_BXT_PMIC_THERMAL is not set +CONFIG_INTEL_PCH_THERMAL=m +# CONFIG_INTEL_TCC_COOLING is not set +CONFIG_INTEL_HFI_THERMAL=y +# end of Intel thermal drivers + +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=m +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +CONFIG_WATCHDOG_SYSFS=y +CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT=y + +# +# Watchdog Pretimeout Governors +# +CONFIG_WATCHDOG_PRETIMEOUT_GOV=y +CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m +CONFIG_WATCHDOG_PRETIMEOUT_GOV_NOOP=m +CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=m +CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y +# CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=m +# CONFIG_SOFT_WATCHDOG_PRETIMEOUT is not set +CONFIG_MENF21BMC_WATCHDOG=m +CONFIG_WDAT_WDT=m +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +CONFIG_ACQUIRE_WDT=m +CONFIG_ADVANTECH_WDT=m +CONFIG_ADVANTECH_EC_WDT=m +CONFIG_ALIM1535_WDT=m +CONFIG_ALIM7101_WDT=m +# CONFIG_EBC_C384_WDT is not set +# CONFIG_EXAR_WDT is not set +CONFIG_F71808E_WDT=m +CONFIG_SP5100_TCO=m +CONFIG_SBC_FITPC2_WATCHDOG=m +CONFIG_EUROTECH_WDT=m +CONFIG_IB700_WDT=m +CONFIG_IBMASR=m +CONFIG_WAFER_WDT=m +CONFIG_I6300ESB_WDT=m +CONFIG_IE6XX_WDT=m +CONFIG_ITCO_WDT=m +CONFIG_ITCO_VENDOR_SUPPORT=y +CONFIG_IT8712F_WDT=m +CONFIG_IT87_WDT=m +CONFIG_HP_WATCHDOG=m +CONFIG_HPWDT_NMI_DECODING=y +CONFIG_KEMPLD_WDT=m +CONFIG_SC1200_WDT=m +CONFIG_PC87413_WDT=m +CONFIG_NV_TCO=m +CONFIG_60XX_WDT=m +CONFIG_CPU5_WDT=m +CONFIG_SMSC_SCH311X_WDT=m +CONFIG_SMSC37B787_WDT=m +# CONFIG_TQMX86_WDT is not set +CONFIG_VIA_WDT=m +CONFIG_W83627HF_WDT=m +CONFIG_W83877F_WDT=m +CONFIG_W83977F_WDT=m +CONFIG_MACHZ_WDT=m +CONFIG_SBC_EPX_C3_WATCHDOG=m +CONFIG_INTEL_MEI_WDT=m +CONFIG_NI903X_WDT=m +CONFIG_NIC7018_WDT=m +CONFIG_SIEMENS_SIMATIC_IPC_WDT=m +# CONFIG_MEN_A21_WDT is not set +CONFIG_XEN_WDT=m + +# +# PCI-based Watchdog Cards +# +CONFIG_PCIPCWATCHDOG=m +CONFIG_WDTPCI=m + +# +# USB-based Watchdog Cards +# +CONFIG_USBPCWATCHDOG=m +CONFIG_SSB_POSSIBLE=y +CONFIG_SSB=m +CONFIG_SSB_SPROM=y +CONFIG_SSB_BLOCKIO=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_B43_PCI_BRIDGE=y +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y +CONFIG_SSB_PCMCIAHOST=y +CONFIG_SSB_SDIOHOST_POSSIBLE=y +CONFIG_SSB_SDIOHOST=y +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_DRIVER_PCICORE=y +# CONFIG_SSB_DRIVER_GPIO is not set +CONFIG_BCMA_POSSIBLE=y +CONFIG_BCMA=m +CONFIG_BCMA_BLOCKIO=y +CONFIG_BCMA_HOST_PCI_POSSIBLE=y +CONFIG_BCMA_HOST_PCI=y +# CONFIG_BCMA_HOST_SOC is not set +CONFIG_BCMA_DRIVER_PCI=y +# CONFIG_BCMA_DRIVER_GMAC_CMN is not set +# CONFIG_BCMA_DRIVER_GPIO is not set +# CONFIG_BCMA_DEBUG is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_SMPRO is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +CONFIG_MFD_AXP20X=m +CONFIG_MFD_AXP20X_I2C=m +CONFIG_MFD_CROS_EC_DEV=m +# CONFIG_MFD_CS42L43_I2C is not set +# CONFIG_MFD_CS42L43_SDW is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set +CONFIG_LPC_ICH=m +CONFIG_LPC_SCH=m +CONFIG_INTEL_SOC_PMIC=y +CONFIG_INTEL_SOC_PMIC_BXTWC=m +CONFIG_INTEL_SOC_PMIC_CHTWC=y +CONFIG_INTEL_SOC_PMIC_CHTDC_TI=m +CONFIG_MFD_INTEL_LPSS=m +CONFIG_MFD_INTEL_LPSS_ACPI=m +CONFIG_MFD_INTEL_LPSS_PCI=m +CONFIG_MFD_INTEL_PMC_BXT=m +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +CONFIG_MFD_KEMPLD=m +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77541 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6370 is not set +# CONFIG_MFD_MT6397 is not set +CONFIG_MFD_MENF21BMC=m +# CONFIG_MFD_OCELOT is not set +# CONFIG_EZX_PCAP is not set +CONFIG_MFD_VIPERBOARD=m +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_SY7636A is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT4831 is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RT5120 is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS6594_I2C is not set +# CONFIG_MFD_TPS6594_SPI is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_WCD934X is not set +# CONFIG_MFD_ATC260X_I2C is not set +# CONFIG_RAVE_SP_CORE is not set +# CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_AW37503 is not set +# CONFIG_REGULATOR_AXP20X is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +# CONFIG_REGULATOR_FAN53555 is not set +# CONFIG_REGULATOR_GPIO is not set +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77857 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8893 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX20086 is not set +# CONFIG_REGULATOR_MAX20411 is not set +# CONFIG_REGULATOR_MAX77826 is not set +# CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +# CONFIG_REGULATOR_PWM is not set +# CONFIG_REGULATOR_RAA215300 is not set +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RT4803 is not set +# CONFIG_REGULATOR_RT5190A is not set +# CONFIG_REGULATOR_RT5739 is not set +# CONFIG_REGULATOR_RT5759 is not set +# CONFIG_REGULATOR_RT6160 is not set +# CONFIG_REGULATOR_RT6190 is not set +# CONFIG_REGULATOR_RT6245 is not set +# CONFIG_REGULATOR_RTQ2134 is not set +# CONFIG_REGULATOR_RTMV20 is not set +# CONFIG_REGULATOR_RTQ6752 is not set +# CONFIG_REGULATOR_RTQ2208 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +# CONFIG_REGULATOR_TPS68470 is not set +CONFIG_RC_CORE=m +CONFIG_LIRC=y +CONFIG_RC_MAP=m +CONFIG_RC_DECODERS=y +CONFIG_IR_IMON_DECODER=m +CONFIG_IR_JVC_DECODER=m +CONFIG_IR_MCE_KBD_DECODER=m +CONFIG_IR_NEC_DECODER=m +CONFIG_IR_RC5_DECODER=m +CONFIG_IR_RC6_DECODER=m +# CONFIG_IR_RCMM_DECODER is not set +CONFIG_IR_SANYO_DECODER=m +CONFIG_IR_SHARP_DECODER=m +CONFIG_IR_SONY_DECODER=m +CONFIG_IR_XMP_DECODER=m +CONFIG_RC_DEVICES=y +CONFIG_IR_ENE=m +CONFIG_IR_FINTEK=m +CONFIG_IR_IGORPLUGUSB=m +CONFIG_IR_IGUANA=m +CONFIG_IR_IMON=m +CONFIG_IR_IMON_RAW=m +CONFIG_IR_ITE_CIR=m +CONFIG_IR_MCEUSB=m +CONFIG_IR_NUVOTON=m +CONFIG_IR_REDRAT3=m +CONFIG_IR_SERIAL=m +CONFIG_IR_SERIAL_TRANSMITTER=y +CONFIG_IR_STREAMZAP=m +# CONFIG_IR_TOY is not set +CONFIG_IR_TTUSBIR=m +CONFIG_IR_WINBOND_CIR=m +CONFIG_RC_ATI_REMOTE=m +CONFIG_RC_LOOPBACK=m +# CONFIG_RC_XBOX_DVD is not set +CONFIG_CEC_CORE=m +CONFIG_CEC_NOTIFIER=y + +# +# CEC support +# +CONFIG_MEDIA_CEC_RC=y +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_CH7322 is not set +CONFIG_CEC_CROS_EC=m +# CONFIG_CEC_GPIO is not set +CONFIG_CEC_SECO=m +# CONFIG_CEC_SECO_RC is not set +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m +# end of CEC support + +CONFIG_MEDIA_SUPPORT=m +# CONFIG_MEDIA_SUPPORT_FILTER is not set +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# +CONFIG_VIDEO_DEV=m +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=m +# end of Media core support + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_TUNER=m +CONFIG_V4L2_FWNODE=m +CONFIG_V4L2_ASYNC=m +# end of Video4Linux options + +# +# Media controller options +# +CONFIG_MEDIA_CONTROLLER_DVB=y +CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +CONFIG_DVB_NET=y +CONFIG_DVB_MAX_ADAPTERS=16 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_GSPCA=m +CONFIG_USB_GSPCA_BENQ=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_CPIA1=m +CONFIG_USB_GSPCA_DTCS033=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_JEILINJ=m +CONFIG_USB_GSPCA_JL2005BCD=m +CONFIG_USB_GSPCA_KINECT=m +CONFIG_USB_GSPCA_KONICA=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_NW80X=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_OV534_9=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7302=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SE401=m +CONFIG_USB_GSPCA_SN9C2028=m +CONFIG_USB_GSPCA_SN9C20X=m +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA1528=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_SQ930X=m +CONFIG_USB_GSPCA_STK014=m +CONFIG_USB_GSPCA_STK1135=m +CONFIG_USB_GSPCA_STV0680=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TOPRO=m +CONFIG_USB_GSPCA_TOUPTEK=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_VICAM=m +CONFIG_USB_GSPCA_XIRLINK_CIT=m +CONFIG_USB_GSPCA_ZC3XX=m +CONFIG_USB_GL860=m +CONFIG_USB_M5602=m +CONFIG_USB_STV06XX=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +CONFIG_USB_S2255=m +CONFIG_VIDEO_USBTV=m +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_GO7007 is not set +CONFIG_VIDEO_HDPVR=m +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_PVRUSB2_DVB=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_STK1160=m + +# +# Analog/digital TV USB devices +# +CONFIG_VIDEO_AU0828=m +CONFIG_VIDEO_AU0828_V4L2=y +CONFIG_VIDEO_AU0828_RC=y +CONFIG_VIDEO_CX231XX=m +CONFIG_VIDEO_CX231XX_RC=y +CONFIG_VIDEO_CX231XX_ALSA=m +CONFIG_VIDEO_CX231XX_DVB=m + +# +# Digital TV USB devices +# +CONFIG_DVB_AS102=m +CONFIG_DVB_B2C2_FLEXCOP_USB=m +# CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG is not set +CONFIG_DVB_USB_V2=m +CONFIG_DVB_USB_AF9015=m +CONFIG_DVB_USB_AF9035=m +CONFIG_DVB_USB_ANYSEE=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_AZ6007=m +CONFIG_DVB_USB_CE6230=m +CONFIG_DVB_USB_DVBSKY=m +CONFIG_DVB_USB_EC168=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_LME2510=m +CONFIG_DVB_USB_MXL111SF=m +CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_ZD1301=m +CONFIG_DVB_USB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +CONFIG_DVB_USB_AZ6027=m +CONFIG_DVB_USB_CINERGY_T2=m +CONFIG_DVB_USB_CXUSB=m +# CONFIG_DVB_USB_CXUSB_ANALOG is not set +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_DIB3000MC=m +CONFIG_DVB_USB_DIBUSB_MB=m +CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_DTV5100=m +CONFIG_DVB_USB_DW2102=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_PCTV452E=m +CONFIG_DVB_USB_TECHNISAT_USB2=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_VP7045=m +CONFIG_SMS_USB_DRV=m +CONFIG_DVB_TTUSB_BUDGET=m +CONFIG_DVB_TTUSB_DEC=m + +# +# Webcam, TV (analog/digital) USB devices +# +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_V4L2=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_VIDEO_EM28XX_RC=m + +# +# Software defined radio USB devices +# +CONFIG_USB_AIRSPY=m +CONFIG_USB_HACKRF=m +CONFIG_USB_MSI2500=m +CONFIG_MEDIA_PCI_SUPPORT=y + +# +# Media capture support +# +CONFIG_VIDEO_SOLO6X10=m +CONFIG_VIDEO_TW5864=m +CONFIG_VIDEO_TW68=m +CONFIG_VIDEO_TW686X=m +# CONFIG_VIDEO_ZORAN is not set + +# +# Media capture/analog TV support +# +CONFIG_VIDEO_DT3155=m +CONFIG_VIDEO_IVTV=m +CONFIG_VIDEO_IVTV_ALSA=m +CONFIG_VIDEO_FB_IVTV=m +# CONFIG_VIDEO_FB_IVTV_FORCE_PAT is not set +CONFIG_VIDEO_HEXIUM_GEMINI=m +CONFIG_VIDEO_HEXIUM_ORION=m +CONFIG_VIDEO_MXB=m + +# +# Media capture/analog/hybrid TV support +# +CONFIG_VIDEO_BT848=m +CONFIG_DVB_BT8XX=m +# CONFIG_VIDEO_COBALT is not set +CONFIG_VIDEO_CX18=m +CONFIG_VIDEO_CX18_ALSA=m +CONFIG_VIDEO_CX23885=m +CONFIG_MEDIA_ALTERA_CI=m +# CONFIG_VIDEO_CX25821 is not set +CONFIG_VIDEO_CX88=m +CONFIG_VIDEO_CX88_ALSA=m +CONFIG_VIDEO_CX88_BLACKBIRD=m +CONFIG_VIDEO_CX88_DVB=m +CONFIG_VIDEO_CX88_ENABLE_VP3054=y +CONFIG_VIDEO_CX88_VP3054=m +CONFIG_VIDEO_CX88_MPEG=m +CONFIG_VIDEO_SAA7134=m +CONFIG_VIDEO_SAA7134_ALSA=m +CONFIG_VIDEO_SAA7134_RC=y +CONFIG_VIDEO_SAA7134_DVB=m +CONFIG_VIDEO_SAA7164=m + +# +# Media digital TV PCI Adapters +# +CONFIG_DVB_B2C2_FLEXCOP_PCI=m +# CONFIG_DVB_B2C2_FLEXCOP_PCI_DEBUG is not set +CONFIG_DVB_DDBRIDGE=m +# CONFIG_DVB_DDBRIDGE_MSIENABLE is not set +CONFIG_DVB_DM1105=m +CONFIG_MANTIS_CORE=m +CONFIG_DVB_MANTIS=m +CONFIG_DVB_HOPPER=m +CONFIG_DVB_NETUP_UNIDVB=m +CONFIG_DVB_NGENE=m +CONFIG_DVB_PLUTO2=m +CONFIG_DVB_PT1=m +CONFIG_DVB_PT3=m +CONFIG_DVB_SMIPCIE=m +CONFIG_DVB_BUDGET_CORE=m +CONFIG_DVB_BUDGET=m +CONFIG_DVB_BUDGET_CI=m +CONFIG_DVB_BUDGET_AV=m +# CONFIG_VIDEO_IPU3_CIO2 is not set +# CONFIG_INTEL_VSC is not set +# CONFIG_IPU_BRIDGE is not set +CONFIG_RADIO_ADAPTERS=m +CONFIG_RADIO_MAXIRADIO=m +# CONFIG_RADIO_SAA7706H is not set +CONFIG_RADIO_SHARK=m +CONFIG_RADIO_SHARK2=m +# CONFIG_RADIO_SI4713 is not set +CONFIG_RADIO_TEA575X=m +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_TEF6862 is not set +# CONFIG_RADIO_WL1273 is not set +CONFIG_USB_DSBR=m +CONFIG_USB_KEENE=m +CONFIG_USB_MA901=m +CONFIG_USB_MR800=m +CONFIG_USB_RAREMONO=m +CONFIG_RADIO_SI470X=m +CONFIG_USB_SI470X=m +# CONFIG_I2C_SI470X is not set +CONFIG_MEDIA_PLATFORM_DRIVERS=y +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_SDR_PLATFORM_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set + +# +# Allegro DVT media platform drivers +# + +# +# Amlogic media platform drivers +# + +# +# Amphion drivers +# + +# +# Aspeed media platform drivers +# + +# +# Atmel media platform drivers +# + +# +# Cadence media platform drivers +# +# CONFIG_VIDEO_CADENCE_CSI2RX is not set +# CONFIG_VIDEO_CADENCE_CSI2TX is not set + +# +# Chips&Media media platform drivers +# + +# +# Intel media platform drivers +# + +# +# Marvell media platform drivers +# +CONFIG_VIDEO_CAFE_CCIC=m + +# +# Mediatek media platform drivers +# + +# +# Microchip Technology, Inc. media platform drivers +# + +# +# NVidia media platform drivers +# + +# +# NXP media platform drivers +# + +# +# Qualcomm media platform drivers +# + +# +# Renesas media platform drivers +# + +# +# Rockchip media platform drivers +# + +# +# Samsung media platform drivers +# + +# +# STMicroelectronics media platform drivers +# + +# +# Sunxi media platform drivers +# + +# +# Texas Instruments drivers +# + +# +# Verisilicon media platform drivers +# + +# +# VIA media platform drivers +# +CONFIG_VIDEO_VIA_CAMERA=m + +# +# Xilinx media platform drivers +# + +# +# MMC/SDIO DVB adapters +# +CONFIG_SMS_SDIO_DRV=m +CONFIG_V4L_TEST_DRIVERS=y +# CONFIG_VIDEO_VIM2M is not set +# CONFIG_VIDEO_VICODEC is not set +# CONFIG_VIDEO_VIMC is not set +CONFIG_VIDEO_VIVID=m +CONFIG_VIDEO_VIVID_CEC=y +CONFIG_VIDEO_VIVID_MAX_DEVS=64 +# CONFIG_VIDEO_VISL is not set +# CONFIG_DVB_TEST_DRIVERS is not set + +# +# FireWire (IEEE 1394) Adapters +# +CONFIG_DVB_FIREDTV=m +CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# +CONFIG_CYPRESS_FIRMWARE=m +CONFIG_TTPCI_EEPROM=m +CONFIG_UVC_COMMON=m +CONFIG_VIDEO_CX2341X=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_DVB_B2C2_FLEXCOP=m +CONFIG_VIDEO_SAA7146=m +CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y +# CONFIG_SMS_SIANO_DEBUGFS is not set +CONFIG_VIDEO_V4L2_TPG=m +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_DMA_CONTIG=m +CONFIG_VIDEOBUF2_VMALLOC=m +CONFIG_VIDEOBUF2_DMA_SG=m +CONFIG_VIDEOBUF2_DVB=m +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y + +# +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' +# +CONFIG_VIDEO_IR_I2C=m +CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_HI846 is not set +# CONFIG_VIDEO_HI847 is not set +# CONFIG_VIDEO_IMX208 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX296 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T112 is not set +CONFIG_VIDEO_MT9V011=m +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_OG01A1B is not set +# CONFIG_VIDEO_OV01A10 is not set +# CONFIG_VIDEO_OV02A10 is not set +# CONFIG_VIDEO_OV08D10 is not set +# CONFIG_VIDEO_OV08X40 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_OV13B10 is not set +CONFIG_VIDEO_OV2640=m +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV4689 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV5648 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5693 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV7640 is not set +CONFIG_VIDEO_OV7670=m +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV8858 is not set +# CONFIG_VIDEO_OV8865 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV9734 is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RDACM21 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_CCS is not set +# CONFIG_VIDEO_ET8EK8 is not set + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9719 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# Audio decoders, processors and mixers +# +CONFIG_VIDEO_CS3308=m +CONFIG_VIDEO_CS5345=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_MSP3400=m +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# CONFIG_VIDEO_TDA1997X is not set +CONFIG_VIDEO_TDA7432=m +CONFIG_VIDEO_TDA9840=m +CONFIG_VIDEO_TEA6415C=m +CONFIG_VIDEO_TEA6420=m +CONFIG_VIDEO_TLV320AIC23B=m +CONFIG_VIDEO_TVAUDIO=m +# CONFIG_VIDEO_UDA1342 is not set +CONFIG_VIDEO_VP27SMPX=m +CONFIG_VIDEO_WM8739=m +CONFIG_VIDEO_WM8775=m +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +CONFIG_VIDEO_SAA6588=m +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +CONFIG_VIDEO_BT819=m +CONFIG_VIDEO_BT856=m +# CONFIG_VIDEO_BT866 is not set +CONFIG_VIDEO_KS0127=m +# CONFIG_VIDEO_ML86V7667 is not set +CONFIG_VIDEO_SAA7110=m +CONFIG_VIDEO_SAA711X=m +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TC358746 is not set +# CONFIG_VIDEO_TVP514X is not set +CONFIG_VIDEO_TVP5150=m +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +CONFIG_VIDEO_VPX3220=m + +# +# Video and audio decoders +# +CONFIG_VIDEO_SAA717X=m +CONFIG_VIDEO_CX25840=m +# end of Video decoders + +# +# Video encoders +# +CONFIG_VIDEO_ADV7170=m +CONFIG_VIDEO_ADV7175=m +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AK881X is not set +CONFIG_VIDEO_SAA7127=m +CONFIG_VIDEO_SAA7185=m +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +CONFIG_VIDEO_UPD64031A=m +CONFIG_VIDEO_UPD64083=m +# end of Video improvement chips + +# +# Audio/Video compression chips +# +CONFIG_VIDEO_SAA6752HS=m +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_I2C is not set +CONFIG_VIDEO_M52790=m +# CONFIG_VIDEO_ST_MIPID02 is not set +# CONFIG_VIDEO_THS7303 is not set +# end of Miscellaneous helper chips + +# +# Video serializers and deserializers +# +# end of Video serializers and deserializers + +# +# Media SPI Adapters +# +# CONFIG_CXD2880_SPI_DRV is not set +# CONFIG_VIDEO_GS1662 is not set +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=m + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_QM1D1B0004=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_TDA18250=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_XC5000=m +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_M88DS3103=m +CONFIG_DVB_MXL5XX=m +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6110x=m +CONFIG_DVB_STV6111=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_TDA18271C2DD=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_MT312=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_TDA10071=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10039=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_AF9013=m +CONFIG_DVB_AS102_FE=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +# CONFIG_DVB_DIB9000 is not set +CONFIG_DVB_DRXD=m +CONFIG_DVB_EC100=m +CONFIG_DVB_GP8PSK_FE=m +CONFIG_DVB_L64781=m +CONFIG_DVB_MT352=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_RTL2830=m +CONFIG_DVB_RTL2832=m +CONFIG_DVB_RTL2832_SDR=m +# CONFIG_DVB_S5H1432 is not set +CONFIG_DVB_SI2168=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_ZD1301_DEMOD=m +CONFIG_DVB_ZL10353=m +# CONFIG_DVB_CXD2880 is not set + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_STV0297=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_VES1820=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT3306A=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_MXL692=m +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m +CONFIG_DVB_S921=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +# CONFIG_DVB_MN88443X is not set +CONFIG_DVB_TC90522=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_A8293=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_HELENE=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_IX2505V=m +# CONFIG_DVB_LGS8GL5 is not set +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_LNBH25=m +# CONFIG_DVB_LNBH29 is not set +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_DRX39XYJ=m + +# +# Common Interface (EN50221) controller drivers +# +CONFIG_DVB_CXD2099=m +CONFIG_DVB_SP2=m +# end of Customise DVB Frontends + +# +# Tools to develop new frontends +# +CONFIG_DVB_DUMMY_FE=m +# end of Media ancillary drivers + +# +# Graphics support +# +CONFIG_APERTURE_HELPERS=y +CONFIG_VIDEO_CMDLINE=y +CONFIG_VIDEO_NOMODESET=y +# CONFIG_AUXDISPLAY is not set +# CONFIG_PANEL is not set +CONFIG_AGP=y +CONFIG_AGP_AMD64=y +CONFIG_AGP_INTEL=y +CONFIG_AGP_SIS=y +CONFIG_AGP_VIA=y +CONFIG_INTEL_GTT=y +CONFIG_VGA_SWITCHEROO=y +CONFIG_DRM=m +CONFIG_DRM_MIPI_DSI=y +CONFIG_DRM_KMS_HELPER=m +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +# CONFIG_DRM_DEBUG_MODESET_LOCK is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_DISPLAY_HELPER=m +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y +CONFIG_DRM_DP_AUX_CHARDEV=y +CONFIG_DRM_DP_CEC=y +CONFIG_DRM_TTM=m +CONFIG_DRM_EXEC=m +CONFIG_DRM_BUDDY=m +CONFIG_DRM_VRAM_HELPER=m +CONFIG_DRM_TTM_HELPER=m +CONFIG_DRM_GEM_SHMEM_HELPER=m +CONFIG_DRM_SUBALLOC_HELPER=m +CONFIG_DRM_SCHED=m + +# +# I2C encoder or helper chips +# +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# end of ARM devices + +CONFIG_DRM_RADEON=m +# CONFIG_DRM_RADEON_USERPTR is not set +CONFIG_DRM_AMDGPU=m +CONFIG_DRM_AMDGPU_SI=y +CONFIG_DRM_AMDGPU_CIK=y +CONFIG_DRM_AMDGPU_USERPTR=y +# CONFIG_DRM_AMDGPU_WERROR is not set + +# +# ACP (Audio CoProcessor) Configuration +# +CONFIG_DRM_AMD_ACP=y +# end of ACP (Audio CoProcessor) Configuration + +# +# Display Engine Configuration +# +CONFIG_DRM_AMD_DC=y +CONFIG_DRM_AMD_DC_FP=y +CONFIG_DRM_AMD_DC_SI=y +# CONFIG_DRM_AMD_SECURE_DISPLAY is not set +# end of Display Engine Configuration + +CONFIG_HSA_AMD=y +CONFIG_DRM_NOUVEAU=m +CONFIG_NOUVEAU_DEBUG=5 +CONFIG_NOUVEAU_DEBUG_DEFAULT=3 +# CONFIG_NOUVEAU_DEBUG_MMU is not set +# CONFIG_NOUVEAU_DEBUG_PUSH is not set +CONFIG_DRM_NOUVEAU_BACKLIGHT=y +CONFIG_DRM_I915=m +CONFIG_DRM_I915_FORCE_PROBE="" +CONFIG_DRM_I915_CAPTURE_ERROR=y +CONFIG_DRM_I915_COMPRESS_ERROR=y +CONFIG_DRM_I915_USERPTR=y +CONFIG_DRM_I915_GVT_KVMGT=m +CONFIG_DRM_I915_PXP=y + +# +# drm/i915 Debugging +# +# CONFIG_DRM_I915_WERROR is not set +# CONFIG_DRM_I915_DEBUG is not set +# CONFIG_DRM_I915_DEBUG_MMIO is not set +# CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set +# CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set +# CONFIG_DRM_I915_DEBUG_GUC is not set +# CONFIG_DRM_I915_SELFTEST is not set +# CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set +# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set +# CONFIG_DRM_I915_DEBUG_RUNTIME_PM is not set +# end of drm/i915 Debugging + +# +# drm/i915 Profile Guided Optimisation +# +CONFIG_DRM_I915_REQUEST_TIMEOUT=20000 +CONFIG_DRM_I915_FENCE_TIMEOUT=10000 +CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 +CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 +CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 +CONFIG_DRM_I915_PREEMPT_TIMEOUT_COMPUTE=7500 +CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 +CONFIG_DRM_I915_STOP_TIMEOUT=100 +CONFIG_DRM_I915_TIMESLICE_DURATION=1 +# end of drm/i915 Profile Guided Optimisation + +CONFIG_DRM_I915_GVT=y +CONFIG_DRM_VGEM=m +# CONFIG_DRM_VKMS is not set +CONFIG_DRM_VMWGFX=m +# CONFIG_DRM_VMWGFX_MKSSTATS is not set +CONFIG_DRM_GMA500=m +CONFIG_DRM_UDL=m +CONFIG_DRM_AST=m +CONFIG_DRM_MGAG200=m +CONFIG_DRM_QXL=m +CONFIG_DRM_VIRTIO_GPU=m +CONFIG_DRM_VIRTIO_GPU_KMS=y +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_AUO_A030JTN01 is not set +# CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# end of Display Interface Bridges + +# CONFIG_DRM_LOONGSON is not set +# CONFIG_DRM_ETNAVIV is not set +CONFIG_DRM_BOCHS=m +CONFIG_DRM_CIRRUS_QEMU=m +# CONFIG_DRM_GM12U320 is not set +# CONFIG_DRM_PANEL_MIPI_DBI is not set +# CONFIG_DRM_SIMPLEDRM is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9163 is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +CONFIG_DRM_XEN=y +CONFIG_DRM_XEN_FRONTEND=m +CONFIG_DRM_VBOXVIDEO=m +# CONFIG_DRM_GUD is not set +# CONFIG_DRM_SSD130X is not set +CONFIG_DRM_HYPERV=m +# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +CONFIG_DRM_PRIVACY_SCREEN=y + +# +# Frame buffer Devices +# +CONFIG_FB=y +CONFIG_FB_HECUBA=m +CONFIG_FB_SVGALIB=m +CONFIG_FB_CIRRUS=m +CONFIG_FB_PM2=m +CONFIG_FB_PM2_FIFO_DISCONNECT=y +CONFIG_FB_CYBER2000=m +CONFIG_FB_CYBER2000_DDC=y +CONFIG_FB_ARC=m +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +CONFIG_FB_VGA16=m +CONFIG_FB_UVESA=m +CONFIG_FB_VESA=y +CONFIG_FB_EFI=y +CONFIG_FB_N411=m +CONFIG_FB_HGA=m +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_I740 is not set +CONFIG_FB_LE80578=m +CONFIG_FB_CARILLO_RANCH=m +# CONFIG_FB_INTEL is not set +CONFIG_FB_MATROX=m +CONFIG_FB_MATROX_MILLENIUM=y +CONFIG_FB_MATROX_MYSTIQUE=y +CONFIG_FB_MATROX_G=y +CONFIG_FB_MATROX_I2C=m +CONFIG_FB_MATROX_MAVEN=m +CONFIG_FB_RADEON=m +CONFIG_FB_RADEON_I2C=y +CONFIG_FB_RADEON_BACKLIGHT=y +# CONFIG_FB_RADEON_DEBUG is not set +CONFIG_FB_ATY128=m +CONFIG_FB_ATY128_BACKLIGHT=y +CONFIG_FB_ATY=m +CONFIG_FB_ATY_CT=y +# CONFIG_FB_ATY_GENERIC_LCD is not set +CONFIG_FB_ATY_GX=y +CONFIG_FB_ATY_BACKLIGHT=y +CONFIG_FB_S3=m +CONFIG_FB_S3_DDC=y +CONFIG_FB_SAVAGE=m +# CONFIG_FB_SAVAGE_I2C is not set +# CONFIG_FB_SAVAGE_ACCEL is not set +CONFIG_FB_SIS=m +CONFIG_FB_SIS_300=y +CONFIG_FB_SIS_315=y +CONFIG_FB_VIA=m +# CONFIG_FB_VIA_DIRECT_PROCFS is not set +CONFIG_FB_VIA_X_COMPATIBILITY=y +CONFIG_FB_NEOMAGIC=m +CONFIG_FB_KYRO=m +CONFIG_FB_3DFX=m +# CONFIG_FB_3DFX_ACCEL is not set +CONFIG_FB_3DFX_I2C=y +CONFIG_FB_VOODOO1=m +CONFIG_FB_VT8623=m +CONFIG_FB_TRIDENT=m +CONFIG_FB_ARK=m +CONFIG_FB_PM3=m +# CONFIG_FB_CARMINE is not set +CONFIG_FB_SMSCUFX=m +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +CONFIG_FB_VIRTUAL=m +CONFIG_XEN_FBDEV_FRONTEND=y +# CONFIG_FB_METRONOME is not set +CONFIG_FB_MB862XX=m +CONFIG_FB_MB862XX_PCI_GDC=y +CONFIG_FB_MB862XX_I2C=y +# CONFIG_FB_HYPERV is not set +CONFIG_FB_SIMPLE=y +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +CONFIG_FB_CORE=y +CONFIG_FB_NOTIFY=y +CONFIG_FIRMWARE_EDID=y +CONFIG_FB_DEVICE=y +CONFIG_FB_DDC=m +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_IOMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y +CONFIG_FB_BACKLIGHT=m +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTZ8866 is not set +CONFIG_BACKLIGHT_PWM=m +CONFIG_BACKLIGHT_APPLE=m +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_SAHARA is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# end of Backlight & LCD device support + +CONFIG_VGASTATE=m +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_VGA_CONSOLE=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +# CONFIG_DRM_ACCEL is not set +CONFIG_SOUND=m +CONFIG_SOUND_OSS_CORE=y +# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_PCM_ELD=y +CONFIG_SND_DMAENGINE_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_SEQ_DEVICE=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_COMPRESS_OFFLOAD=m +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_PCM_TIMER=y +CONFIG_SND_HRTIMER=m +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +CONFIG_SND_CTL_FAST_LOOKUP=y +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_CTL_INPUT_VALIDATION is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_DMA_SGBUF=y +CONFIG_SND_CTL_LED=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +# CONFIG_SND_SEQUENCER_OSS is not set +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_SEQ_MIDI_EVENT=m +CONFIG_SND_SEQ_MIDI=m +CONFIG_SND_SEQ_MIDI_EMUL=m +CONFIG_SND_SEQ_VIRMIDI=m +# CONFIG_SND_SEQ_UMP is not set +CONFIG_SND_MPU401_UART=m +CONFIG_SND_OPL3_LIB=m +CONFIG_SND_OPL3_LIB_SEQ=m +CONFIG_SND_VX_LIB=m +CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y +CONFIG_SND_PCSP=m +CONFIG_SND_DUMMY=m +CONFIG_SND_ALOOP=m +# CONFIG_SND_PCMTEST is not set +CONFIG_SND_VIRMIDI=m +CONFIG_SND_MTPAV=m +CONFIG_SND_MTS64=m +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_MPU401=m +CONFIG_SND_PORTMAN2X4=m +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AC97_POWER_SAVE_DEFAULT=0 +CONFIG_SND_SB_COMMON=m +CONFIG_SND_PCI=y +CONFIG_SND_AD1889=m +CONFIG_SND_ALS300=m +CONFIG_SND_ALS4000=m +CONFIG_SND_ALI5451=m +CONFIG_SND_ASIHPI=m +CONFIG_SND_ATIIXP=m +CONFIG_SND_ATIIXP_MODEM=m +CONFIG_SND_AU8810=m +CONFIG_SND_AU8820=m +CONFIG_SND_AU8830=m +# CONFIG_SND_AW2 is not set +CONFIG_SND_AZT3328=m +CONFIG_SND_BT87X=m +# CONFIG_SND_BT87X_OVERCLOCK is not set +CONFIG_SND_CA0106=m +CONFIG_SND_CMIPCI=m +CONFIG_SND_OXYGEN_LIB=m +CONFIG_SND_OXYGEN=m +CONFIG_SND_CS4281=m +CONFIG_SND_CS46XX=m +CONFIG_SND_CS46XX_NEW_DSP=y +CONFIG_SND_CTXFI=m +CONFIG_SND_DARLA20=m +CONFIG_SND_GINA20=m +CONFIG_SND_LAYLA20=m +CONFIG_SND_DARLA24=m +CONFIG_SND_GINA24=m +CONFIG_SND_LAYLA24=m +CONFIG_SND_MONA=m +CONFIG_SND_MIA=m +CONFIG_SND_ECHO3G=m +CONFIG_SND_INDIGO=m +CONFIG_SND_INDIGOIO=m +CONFIG_SND_INDIGODJ=m +CONFIG_SND_INDIGOIOX=m +CONFIG_SND_INDIGODJX=m +CONFIG_SND_EMU10K1=m +CONFIG_SND_EMU10K1_SEQ=m +CONFIG_SND_EMU10K1X=m +CONFIG_SND_ENS1370=m +CONFIG_SND_ENS1371=m +CONFIG_SND_ES1938=m +CONFIG_SND_ES1968=m +CONFIG_SND_ES1968_INPUT=y +CONFIG_SND_ES1968_RADIO=y +CONFIG_SND_FM801=m +CONFIG_SND_FM801_TEA575X_BOOL=y +CONFIG_SND_HDSP=m +CONFIG_SND_HDSPM=m +CONFIG_SND_ICE1712=m +CONFIG_SND_ICE1724=m +CONFIG_SND_INTEL8X0=m +CONFIG_SND_INTEL8X0M=m +CONFIG_SND_KORG1212=m +CONFIG_SND_LOLA=m +CONFIG_SND_LX6464ES=m +CONFIG_SND_MAESTRO3=m +CONFIG_SND_MAESTRO3_INPUT=y +CONFIG_SND_MIXART=m +CONFIG_SND_NM256=m +CONFIG_SND_PCXHR=m +CONFIG_SND_RIPTIDE=m +CONFIG_SND_RME32=m +CONFIG_SND_RME96=m +CONFIG_SND_RME9652=m +CONFIG_SND_SONICVIBES=m +CONFIG_SND_TRIDENT=m +CONFIG_SND_VIA82XX=m +CONFIG_SND_VIA82XX_MODEM=m +CONFIG_SND_VIRTUOSO=m +CONFIG_SND_VX222=m +CONFIG_SND_YMFPCI=m + +# +# HD-Audio +# +CONFIG_SND_HDA=m +CONFIG_SND_HDA_GENERIC_LEDS=y +CONFIG_SND_HDA_INTEL=m +CONFIG_SND_HDA_HWDEP=y +CONFIG_SND_HDA_RECONFIG=y +CONFIG_SND_HDA_INPUT_BEEP=y +CONFIG_SND_HDA_INPUT_BEEP_MODE=1 +CONFIG_SND_HDA_PATCH_LOADER=y +CONFIG_SND_HDA_SCODEC_CS35L41=m +CONFIG_SND_HDA_CS_DSP_CONTROLS=m +CONFIG_SND_HDA_SCODEC_CS35L41_I2C=m +CONFIG_SND_HDA_SCODEC_CS35L41_SPI=m +# CONFIG_SND_HDA_SCODEC_CS35L56_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_SPI is not set +# CONFIG_SND_HDA_SCODEC_TAS2781_I2C is not set +CONFIG_SND_HDA_CODEC_REALTEK=m +CONFIG_SND_HDA_CODEC_ANALOG=m +CONFIG_SND_HDA_CODEC_SIGMATEL=m +CONFIG_SND_HDA_CODEC_VIA=m +CONFIG_SND_HDA_CODEC_HDMI=m +CONFIG_SND_HDA_CODEC_CIRRUS=m +CONFIG_SND_HDA_CODEC_CS8409=m +CONFIG_SND_HDA_CODEC_CONEXANT=m +CONFIG_SND_HDA_CODEC_CA0110=m +CONFIG_SND_HDA_CODEC_CA0132=m +CONFIG_SND_HDA_CODEC_CA0132_DSP=y +CONFIG_SND_HDA_CODEC_CMEDIA=m +CONFIG_SND_HDA_CODEC_SI3054=m +CONFIG_SND_HDA_GENERIC=m +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1 +# CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM is not set +# CONFIG_SND_HDA_CTL_DEV_ID is not set +# end of HD-Audio + +CONFIG_SND_HDA_CORE=m +CONFIG_SND_HDA_DSP_LOADER=y +CONFIG_SND_HDA_COMPONENT=y +CONFIG_SND_HDA_I915=y +CONFIG_SND_HDA_EXT_CORE=m +CONFIG_SND_HDA_PREALLOC_SIZE=0 +CONFIG_SND_INTEL_NHLT=y +CONFIG_SND_INTEL_DSP_CONFIG=m +CONFIG_SND_INTEL_SOUNDWIRE_ACPI=m +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_AUDIO_MIDI_V2 is not set +CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y +CONFIG_SND_USB_UA101=m +CONFIG_SND_USB_USX2Y=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +CONFIG_SND_USB_US122L=m +CONFIG_SND_USB_6FIRE=m +CONFIG_SND_USB_HIFACE=m +CONFIG_SND_BCD2000=m +CONFIG_SND_USB_LINE6=m +CONFIG_SND_USB_POD=m +CONFIG_SND_USB_PODHD=m +CONFIG_SND_USB_TONEPORT=m +CONFIG_SND_USB_VARIAX=m +CONFIG_SND_FIREWIRE=y +CONFIG_SND_FIREWIRE_LIB=m +CONFIG_SND_DICE=m +CONFIG_SND_OXFW=m +CONFIG_SND_ISIGHT=m +CONFIG_SND_FIREWORKS=m +CONFIG_SND_BEBOB=m +CONFIG_SND_FIREWIRE_DIGI00X=m +CONFIG_SND_FIREWIRE_TASCAM=m +CONFIG_SND_FIREWIRE_MOTU=m +CONFIG_SND_FIREFACE=m +CONFIG_SND_PCMCIA=y +CONFIG_SND_VXPOCKET=m +CONFIG_SND_PDAUDIOCF=m +CONFIG_SND_SOC=m +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +CONFIG_SND_SOC_COMPRESS=y +CONFIG_SND_SOC_TOPOLOGY=y +CONFIG_SND_SOC_ACPI=m +# CONFIG_SND_SOC_ADI is not set +CONFIG_SND_SOC_AMD_ACP=m +CONFIG_SND_SOC_AMD_CZ_DA7219MX98357_MACH=m +CONFIG_SND_SOC_AMD_CZ_RT5645_MACH=m +# CONFIG_SND_SOC_AMD_ST_ES8336_MACH is not set +CONFIG_SND_SOC_AMD_ACP3x=m +CONFIG_SND_SOC_AMD_RV_RT5682_MACH=m +CONFIG_SND_SOC_AMD_RENOIR=m +CONFIG_SND_SOC_AMD_RENOIR_MACH=m +CONFIG_SND_SOC_AMD_ACP5x=m +CONFIG_SND_SOC_AMD_VANGOGH_MACH=m +CONFIG_SND_SOC_AMD_ACP6x=m +CONFIG_SND_SOC_AMD_YC_MACH=m +CONFIG_SND_AMD_ACP_CONFIG=m +CONFIG_SND_SOC_AMD_ACP_COMMON=m +# CONFIG_SND_SOC_AMD_ACP_PCI is not set +# CONFIG_SND_AMD_ASOC_RENOIR is not set +# CONFIG_SND_AMD_ASOC_REMBRANDT is not set +CONFIG_SND_SOC_AMD_MACH_COMMON=m +# CONFIG_SND_SOC_AMD_LEGACY_MACH is not set +CONFIG_SND_SOC_AMD_SOF_MACH=m +CONFIG_SND_SOC_AMD_RPL_ACP6x=m +CONFIG_SND_SOC_AMD_PS=m +CONFIG_SND_SOC_AMD_PS_MACH=m +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set +CONFIG_SND_DESIGNWARE_I2S=m +# CONFIG_SND_DESIGNWARE_PCM is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_FSL_XCVR is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_SOC_CHV3_I2S is not set +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y +CONFIG_SND_SOC_INTEL_SST=m +CONFIG_SND_SOC_INTEL_CATPT=m +CONFIG_SND_SST_ATOM_HIFI2_PLATFORM=m +# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI is not set +CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI=m +CONFIG_SND_SOC_INTEL_SKYLAKE=m +CONFIG_SND_SOC_INTEL_SKL=m +CONFIG_SND_SOC_INTEL_APL=m +CONFIG_SND_SOC_INTEL_KBL=m +CONFIG_SND_SOC_INTEL_GLK=m +CONFIG_SND_SOC_INTEL_CNL=m +CONFIG_SND_SOC_INTEL_CFL=m +# CONFIG_SND_SOC_INTEL_CML_H is not set +CONFIG_SND_SOC_INTEL_CML_LP=m +CONFIG_SND_SOC_INTEL_SKYLAKE_FAMILY=m +CONFIG_SND_SOC_INTEL_SKYLAKE_SSP_CLK=m +CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC=y +CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON=m +CONFIG_SND_SOC_ACPI_INTEL_MATCH=m +CONFIG_SND_SOC_INTEL_AVS=m + +# +# Intel AVS Machine drivers +# + +# +# Available DSP configurations +# +CONFIG_SND_SOC_INTEL_AVS_MACH_DA7219=m +CONFIG_SND_SOC_INTEL_AVS_MACH_DMIC=m +# CONFIG_SND_SOC_INTEL_AVS_MACH_ES8336 is not set +CONFIG_SND_SOC_INTEL_AVS_MACH_HDAUDIO=m +# CONFIG_SND_SOC_INTEL_AVS_MACH_I2S_TEST is not set +# CONFIG_SND_SOC_INTEL_AVS_MACH_MAX98927 is not set +# CONFIG_SND_SOC_INTEL_AVS_MACH_MAX98357A is not set +CONFIG_SND_SOC_INTEL_AVS_MACH_MAX98373=m +CONFIG_SND_SOC_INTEL_AVS_MACH_NAU8825=m +# CONFIG_SND_SOC_INTEL_AVS_MACH_PROBE is not set +# CONFIG_SND_SOC_INTEL_AVS_MACH_RT274 is not set +# CONFIG_SND_SOC_INTEL_AVS_MACH_RT286 is not set +# CONFIG_SND_SOC_INTEL_AVS_MACH_RT298 is not set +CONFIG_SND_SOC_INTEL_AVS_MACH_RT5663=m +# CONFIG_SND_SOC_INTEL_AVS_MACH_RT5682 is not set +CONFIG_SND_SOC_INTEL_AVS_MACH_SSM4567=m +# end of Intel AVS Machine drivers + +CONFIG_SND_SOC_INTEL_MACH=y +CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES=y +CONFIG_SND_SOC_INTEL_HDA_DSP_COMMON=m +CONFIG_SND_SOC_INTEL_SOF_MAXIM_COMMON=m +CONFIG_SND_SOC_INTEL_SOF_REALTEK_COMMON=m +CONFIG_SND_SOC_INTEL_SOF_CIRRUS_COMMON=m +CONFIG_SND_SOC_INTEL_HASWELL_MACH=m +CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH=m +CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m +CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m +CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m +CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m +CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m +CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m +CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m +CONFIG_SND_SOC_INTEL_CHT_BSW_NAU8824_MACH=m +CONFIG_SND_SOC_INTEL_BYT_CHT_CX2072X_MACH=m +CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH=m +CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH=m +# CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH is not set +CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m +CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m +CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m +CONFIG_SND_SOC_INTEL_DA7219_MAX98357A_GENERIC=m +CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_COMMON=m +# CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH is not set +# CONFIG_SND_SOC_INTEL_BXT_RT298_MACH is not set +# CONFIG_SND_SOC_INTEL_SOF_WM8804_MACH is not set +CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH=m +CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH=m +CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98357A_MACH=m +CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98927_MACH=m +# CONFIG_SND_SOC_INTEL_KBL_RT5660_MACH is not set +CONFIG_SND_SOC_INTEL_GLK_DA7219_MAX98357A_MACH=m +CONFIG_SND_SOC_INTEL_GLK_RT5682_MAX98357A_MACH=m +CONFIG_SND_SOC_INTEL_SKL_HDA_DSP_GENERIC_MACH=m +CONFIG_SND_SOC_INTEL_SOF_RT5682_MACH=m +CONFIG_SND_SOC_INTEL_SOF_CS42L42_MACH=m +# CONFIG_SND_SOC_INTEL_SOF_PCM512x_MACH is not set +CONFIG_SND_SOC_INTEL_SOF_ES8336_MACH=m +CONFIG_SND_SOC_INTEL_SOF_NAU8825_MACH=m +CONFIG_SND_SOC_INTEL_CML_LP_DA7219_MAX98357A_MACH=m +CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH=m +CONFIG_SND_SOC_INTEL_SOF_DA7219_MAX98373_MACH=m +CONFIG_SND_SOC_INTEL_SOF_SSP_AMP_MACH=m +# CONFIG_SND_SOC_INTEL_EHL_RT5660_MACH is not set +CONFIG_SND_SOC_INTEL_SOUNDWIRE_SOF_MACH=m +# CONFIG_SND_SOC_MTK_BTCVSD is not set +CONFIG_SND_SOC_SOF_TOPLEVEL=y +CONFIG_SND_SOC_SOF_PCI_DEV=m +CONFIG_SND_SOC_SOF_PCI=m +# CONFIG_SND_SOC_SOF_ACPI is not set +CONFIG_SND_SOC_SOF_DEBUG_PROBES=m +CONFIG_SND_SOC_SOF_CLIENT=m +# CONFIG_SND_SOC_SOF_DEVELOPER_SUPPORT is not set +CONFIG_SND_SOC_SOF=m +CONFIG_SND_SOC_SOF_PROBE_WORK_QUEUE=y +CONFIG_SND_SOC_SOF_IPC3=y +CONFIG_SND_SOC_SOF_INTEL_IPC4=y +CONFIG_SND_SOC_SOF_AMD_TOPLEVEL=m +CONFIG_SND_SOC_SOF_AMD_COMMON=m +# CONFIG_SND_SOC_SOF_AMD_RENOIR is not set +# CONFIG_SND_SOC_SOF_AMD_VANGOGH is not set +CONFIG_SND_SOC_SOF_AMD_REMBRANDT=m +CONFIG_SND_SOC_SOF_ACP_PROBES=m +CONFIG_SND_SOC_SOF_INTEL_TOPLEVEL=y +CONFIG_SND_SOC_SOF_INTEL_HIFI_EP_IPC=m +CONFIG_SND_SOC_SOF_INTEL_ATOM_HIFI_EP=m +CONFIG_SND_SOC_SOF_INTEL_COMMON=m +CONFIG_SND_SOC_SOF_MERRIFIELD=m +CONFIG_SND_SOC_SOF_INTEL_SKL=m +CONFIG_SND_SOC_SOF_SKYLAKE=m +CONFIG_SND_SOC_SOF_KABYLAKE=m +CONFIG_SND_SOC_SOF_INTEL_APL=m +CONFIG_SND_SOC_SOF_APOLLOLAKE=m +CONFIG_SND_SOC_SOF_GEMINILAKE=m +CONFIG_SND_SOC_SOF_INTEL_CNL=m +CONFIG_SND_SOC_SOF_CANNONLAKE=m +CONFIG_SND_SOC_SOF_COFFEELAKE=m +CONFIG_SND_SOC_SOF_COMETLAKE=m +CONFIG_SND_SOC_SOF_INTEL_ICL=m +CONFIG_SND_SOC_SOF_ICELAKE=m +CONFIG_SND_SOC_SOF_JASPERLAKE=m +CONFIG_SND_SOC_SOF_INTEL_TGL=m +CONFIG_SND_SOC_SOF_TIGERLAKE=m +CONFIG_SND_SOC_SOF_ELKHARTLAKE=m +CONFIG_SND_SOC_SOF_ALDERLAKE=m +CONFIG_SND_SOC_SOF_INTEL_MTL=m +CONFIG_SND_SOC_SOF_METEORLAKE=m +CONFIG_SND_SOC_SOF_INTEL_LNL=m +CONFIG_SND_SOC_SOF_LUNARLAKE=m +CONFIG_SND_SOC_SOF_HDA_COMMON=m +CONFIG_SND_SOC_SOF_HDA_MLINK=m +CONFIG_SND_SOC_SOF_HDA_LINK=y +CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC=y +CONFIG_SND_SOC_SOF_HDA_LINK_BASELINE=m +CONFIG_SND_SOC_SOF_HDA=m +CONFIG_SND_SOC_SOF_HDA_PROBES=m +CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE=m +CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE=m +CONFIG_SND_SOC_SOF_XTENSA=m + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=m + +# +# CODEC drivers +# +CONFIG_SND_SOC_WM_ADSP=m +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1372_I2C is not set +# CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +CONFIG_SND_SOC_ADAU7002=m +# CONFIG_SND_SOC_ADAU7118_HW is not set +# CONFIG_SND_SOC_ADAU7118_I2C is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4375 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_AUDIO_IIO_AUX is not set +# CONFIG_SND_SOC_AW8738 is not set +# CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CHV3_CODEC is not set +CONFIG_SND_SOC_CROS_EC_CODEC=m +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +CONFIG_SND_SOC_CS35L41_LIB=m +CONFIG_SND_SOC_CS35L41=m +CONFIG_SND_SOC_CS35L41_SPI=m +CONFIG_SND_SOC_CS35L41_I2C=m +# CONFIG_SND_SOC_CS35L45_SPI is not set +# CONFIG_SND_SOC_CS35L45_I2C is not set +CONFIG_SND_SOC_CS35L56=m +CONFIG_SND_SOC_CS35L56_SHARED=m +# CONFIG_SND_SOC_CS35L56_I2C is not set +# CONFIG_SND_SOC_CS35L56_SPI is not set +CONFIG_SND_SOC_CS35L56_SDW=m +CONFIG_SND_SOC_CS42L42_CORE=m +CONFIG_SND_SOC_CS42L42=m +CONFIG_SND_SOC_CS42L42_SDW=m +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +CONFIG_SND_SOC_CX2072X=m +CONFIG_SND_SOC_DA7213=m +CONFIG_SND_SOC_DA7219=m +CONFIG_SND_SOC_DMIC=m +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES7241 is not set +CONFIG_SND_SOC_ES8316=m +CONFIG_SND_SOC_ES8326=m +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +CONFIG_SND_SOC_HDAC_HDMI=m +CONFIG_SND_SOC_HDAC_HDA=m +CONFIG_SND_SOC_HDA=m +# CONFIG_SND_SOC_ICS43432 is not set +# CONFIG_SND_SOC_IDT821034 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +CONFIG_SND_SOC_MAX98090=m +CONFIG_SND_SOC_MAX98357A=m +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +CONFIG_SND_SOC_MAX98927=m +# CONFIG_SND_SOC_MAX98520 is not set +CONFIG_SND_SOC_MAX98363=m +CONFIG_SND_SOC_MAX98373=m +CONFIG_SND_SOC_MAX98373_I2C=m +CONFIG_SND_SOC_MAX98373_SDW=m +CONFIG_SND_SOC_MAX98388=m +CONFIG_SND_SOC_MAX98390=m +# CONFIG_SND_SOC_MAX98396 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM5102A is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PEB2466 is not set +# CONFIG_SND_SOC_RK3328 is not set +CONFIG_SND_SOC_RL6231=m +CONFIG_SND_SOC_RL6347A=m +CONFIG_SND_SOC_RT286=m +CONFIG_SND_SOC_RT1011=m +CONFIG_SND_SOC_RT1015=m +CONFIG_SND_SOC_RT1015P=m +# CONFIG_SND_SOC_RT1017_SDCA_SDW is not set +CONFIG_SND_SOC_RT1019=m +CONFIG_SND_SOC_RT1308=m +CONFIG_SND_SOC_RT1308_SDW=m +CONFIG_SND_SOC_RT1316_SDW=m +CONFIG_SND_SOC_RT1318_SDW=m +CONFIG_SND_SOC_RT5514=m +CONFIG_SND_SOC_RT5514_SPI=m +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +CONFIG_SND_SOC_RT5640=m +CONFIG_SND_SOC_RT5645=m +CONFIG_SND_SOC_RT5651=m +# CONFIG_SND_SOC_RT5659 is not set +CONFIG_SND_SOC_RT5663=m +CONFIG_SND_SOC_RT5670=m +CONFIG_SND_SOC_RT5677=m +CONFIG_SND_SOC_RT5677_SPI=m +CONFIG_SND_SOC_RT5682=m +CONFIG_SND_SOC_RT5682_I2C=m +CONFIG_SND_SOC_RT5682_SDW=m +CONFIG_SND_SOC_RT5682S=m +CONFIG_SND_SOC_RT700=m +CONFIG_SND_SOC_RT700_SDW=m +CONFIG_SND_SOC_RT711=m +CONFIG_SND_SOC_RT711_SDW=m +CONFIG_SND_SOC_RT711_SDCA_SDW=m +CONFIG_SND_SOC_RT712_SDCA_SDW=m +CONFIG_SND_SOC_RT712_SDCA_DMIC_SDW=m +# CONFIG_SND_SOC_RT722_SDCA_SDW is not set +CONFIG_SND_SOC_RT715=m +CONFIG_SND_SOC_RT715_SDW=m +CONFIG_SND_SOC_RT715_SDCA_SDW=m +# CONFIG_SND_SOC_RT9120 is not set +CONFIG_SND_SOC_SDW_MOCKUP=m +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIMPLE_MUX is not set +# CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SRC4XXX_I2C is not set +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2518 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +CONFIG_SND_SOC_SSM4567=m +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set +# CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS2780 is not set +# CONFIG_SND_SOC_TAS2781_I2C is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS5805M is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TFA989X is not set +# CONFIG_SND_SOC_TLV320ADC3XXX is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X_I2C is not set +# CONFIG_SND_SOC_TLV320AIC3X_SPI is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set +CONFIG_SND_SOC_TS3A227E=m +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WCD9335 is not set +# CONFIG_SND_SOC_WCD938X_SDW is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731_I2C is not set +# CONFIG_SND_SOC_WM8731_SPI is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8904 is not set +# CONFIG_SND_SOC_WM8940 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8961 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_WSA881X is not set +# CONFIG_SND_SOC_WSA883X is not set +# CONFIG_SND_SOC_WSA884X is not set +# CONFIG_SND_SOC_ZL38060 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_MT6660 is not set +CONFIG_SND_SOC_NAU8315=m +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +CONFIG_SND_SOC_NAU8821=m +# CONFIG_SND_SOC_NAU8822 is not set +CONFIG_SND_SOC_NAU8824=m +CONFIG_SND_SOC_NAU8825=m +# CONFIG_SND_SOC_TPA6130A2 is not set +# CONFIG_SND_SOC_LPASS_WSA_MACRO is not set +# CONFIG_SND_SOC_LPASS_VA_MACRO is not set +# CONFIG_SND_SOC_LPASS_RX_MACRO is not set +# CONFIG_SND_SOC_LPASS_TX_MACRO is not set +# end of CODEC drivers + +# CONFIG_SND_SIMPLE_CARD is not set +CONFIG_SND_X86=y +CONFIG_HDMI_LPE_AUDIO=m +CONFIG_SND_SYNTH_EMUX=m +CONFIG_SND_XEN_FRONTEND=m +# CONFIG_SND_VIRTIO is not set +CONFIG_AC97_BUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID=m +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=m +CONFIG_HID_GENERIC=m + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=m +CONFIG_HID_ACCUTOUCH=m +CONFIG_HID_ACRUX=m +CONFIG_HID_ACRUX_FF=y +CONFIG_HID_APPLE=m +CONFIG_HID_APPLEIR=m +CONFIG_HID_ASUS=m +CONFIG_HID_AUREAL=m +CONFIG_HID_BELKIN=m +CONFIG_HID_BETOP_FF=m +CONFIG_HID_BIGBEN_FF=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CORSAIR=m +CONFIG_HID_COUGAR=m +CONFIG_HID_MACALLY=m +CONFIG_HID_PRODIKEYS=m +CONFIG_HID_CMEDIA=m +CONFIG_HID_CP2112=m +CONFIG_HID_CREATIVE_SB0540=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_DRAGONRISE=m +CONFIG_DRAGONRISE_FF=y +CONFIG_HID_EMS_FF=m +CONFIG_HID_ELAN=m +CONFIG_HID_ELECOM=m +CONFIG_HID_ELO=m +# CONFIG_HID_EVISION is not set +CONFIG_HID_EZKEY=m +CONFIG_HID_FT260=m +CONFIG_HID_GEMBIRD=m +CONFIG_HID_GFRM=m +CONFIG_HID_GLORIOUS=m +CONFIG_HID_HOLTEK=m +CONFIG_HOLTEK_FF=y +CONFIG_HID_VIVALDI_COMMON=m +CONFIG_HID_GOOGLE_HAMMER=m +# CONFIG_HID_GOOGLE_STADIA_FF is not set +CONFIG_HID_VIVALDI=m +CONFIG_HID_GT683R=m +CONFIG_HID_KEYTOUCH=m +CONFIG_HID_KYE=m +CONFIG_HID_UCLOGIC=m +CONFIG_HID_WALTOP=m +CONFIG_HID_VIEWSONIC=m +# CONFIG_HID_VRC2 is not set +# CONFIG_HID_XIAOMI is not set +CONFIG_HID_GYRATION=m +CONFIG_HID_ICADE=m +CONFIG_HID_ITE=m +CONFIG_HID_JABRA=m +CONFIG_HID_TWINHAN=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_LCPOWER=m +CONFIG_HID_LED=m +CONFIG_HID_LENOVO=m +# CONFIG_HID_LETSKETCH is not set +CONFIG_HID_LOGITECH=m +CONFIG_HID_LOGITECH_DJ=m +CONFIG_HID_LOGITECH_HIDPP=m +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGIG940_FF=y +CONFIG_LOGIWHEELS_FF=y +CONFIG_HID_MAGICMOUSE=m +CONFIG_HID_MALTRON=m +CONFIG_HID_MAYFLASH=m +# CONFIG_HID_MEGAWORLD_FF is not set +CONFIG_HID_REDRAGON=m +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_MULTITOUCH=m +CONFIG_HID_NINTENDO=m +CONFIG_NINTENDO_FF=y +CONFIG_HID_NTI=m +CONFIG_HID_NTRIG=m +# CONFIG_HID_NVIDIA_SHIELD is not set +CONFIG_HID_ORTEK=m +CONFIG_HID_PANTHERLORD=m +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PENMOUNT=m +CONFIG_HID_PETALYNX=m +CONFIG_HID_PICOLCD=m +CONFIG_HID_PICOLCD_FB=y +CONFIG_HID_PICOLCD_BACKLIGHT=y +CONFIG_HID_PICOLCD_LEDS=y +CONFIG_HID_PICOLCD_CIR=y +CONFIG_HID_PLANTRONICS=m +CONFIG_HID_PLAYSTATION=m +CONFIG_PLAYSTATION_FF=y +# CONFIG_HID_PXRC is not set +# CONFIG_HID_RAZER is not set +CONFIG_HID_PRIMAX=m +CONFIG_HID_RETRODE=m +CONFIG_HID_ROCCAT=m +CONFIG_HID_SAITEK=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SEMITEK=m +# CONFIG_HID_SIGMAMICRO is not set +CONFIG_HID_SONY=m +CONFIG_SONY_FF=y +CONFIG_HID_SPEEDLINK=m +CONFIG_HID_STEAM=m +# CONFIG_STEAM_FF is not set +CONFIG_HID_STEELSERIES=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_RMI=m +CONFIG_HID_GREENASIA=m +CONFIG_GREENASIA_FF=y +CONFIG_HID_HYPERV_MOUSE=m +CONFIG_HID_SMARTJOYPLUS=m +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_HID_TIVO=m +CONFIG_HID_TOPSEED=m +# CONFIG_HID_TOPRE is not set +CONFIG_HID_THINGM=m +CONFIG_HID_THRUSTMASTER=m +CONFIG_THRUSTMASTER_FF=y +CONFIG_HID_UDRAW_PS3=m +CONFIG_HID_U2FZERO=m +CONFIG_HID_WACOM=m +CONFIG_HID_WIIMOTE=m +CONFIG_HID_XINMO=m +CONFIG_HID_ZEROPLUS=m +CONFIG_ZEROPLUS_FF=y +CONFIG_HID_ZYDACRON=m +CONFIG_HID_SENSOR_HUB=m +CONFIG_HID_SENSOR_CUSTOM_SENSOR=m +CONFIG_HID_ALPS=m +CONFIG_HID_MCP2221=m +# end of Special HID drivers + +# +# HID-BPF support +# +# CONFIG_HID_BPF is not set +# end of HID-BPF support + +# +# USB HID support +# +CONFIG_USB_HID=m +CONFIG_HID_PID=y +CONFIG_USB_HIDDEV=y + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# end of USB HID Boot Protocol drivers +# end of USB HID support + +CONFIG_I2C_HID=m +CONFIG_I2C_HID_ACPI=m +CONFIG_I2C_HID_OF=m +CONFIG_I2C_HID_CORE=m + +# +# Intel ISH HID support +# +CONFIG_INTEL_ISH_HID=m +# CONFIG_INTEL_ISH_FIRMWARE_DOWNLOADER is not set +# end of Intel ISH HID support + +# +# AMD SFH HID Support +# +CONFIG_AMD_SFH_HID=m +# end of AMD SFH HID Support + +# +# Surface System Aggregator Module HID support +# +CONFIG_SURFACE_HID=m +CONFIG_SURFACE_KBD=m +# end of Surface System Aggregator Module HID support + +CONFIG_SURFACE_HID_CORE=m +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=m +CONFIG_USB_LED_TRIG=y +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=m +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +CONFIG_USB_DYNAMIC_MINORS=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +CONFIG_USB_LEDS_TRIGGER_USBPORT=m +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=m + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=m +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=m +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=m +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=m +# CONFIG_USB_EHCI_FSL is not set +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=m +CONFIG_USB_OHCI_HCD_PCI=m +# CONFIG_USB_OHCI_HCD_SSB is not set +# CONFIG_USB_OHCI_HCD_PLATFORM is not set +CONFIG_USB_UHCI_HCD=m +CONFIG_USB_SL811_HCD=m +# CONFIG_USB_SL811_HCD_ISO is not set +CONFIG_USB_SL811_CS=m +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_BCMA is not set +# CONFIG_USB_HCD_SSB is not set +# CONFIG_USB_HCD_TEST_MODE is not set +# CONFIG_USB_XEN_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=m +CONFIG_USB_TMC=m + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_REALTEK=m +CONFIG_REALTEK_AUTOPM=y +CONFIG_USB_STORAGE_DATAFAB=m +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_USBAT=m +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_STORAGE_ALAUDA=m +CONFIG_USB_STORAGE_ONETOUCH=m +CONFIG_USB_STORAGE_KARMA=m +CONFIG_USB_STORAGE_CYPRESS_ATACB=m +CONFIG_USB_STORAGE_ENE_UB6250=m +CONFIG_USB_UAS=m + +# +# USB Imaging devices +# +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m +CONFIG_USBIP_CORE=m +CONFIG_USBIP_VHCI_HCD=m +CONFIG_USBIP_VHCI_HC_PORTS=15 +CONFIG_USBIP_VHCI_NR_HCS=8 +CONFIG_USBIP_HOST=m +CONFIG_USBIP_VUDC=m +# CONFIG_USBIP_DEBUG is not set + +# +# USB dual-mode controller drivers +# +# CONFIG_USB_CDNS_SUPPORT is not set +# CONFIG_USB_MUSB_HDRC is not set +CONFIG_USB_DWC3=m +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_PCI=m +CONFIG_USB_DWC3_HAPS=m +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_SIMPLE=m +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_CP210X=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_F81232=m +CONFIG_USB_SERIAL_F8153X=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_IUU=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_METRO=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7715_PARPORT=y +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MXUPORT=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_QCAUX=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_SAFE=m +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_SYMBOL=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_WWAN=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_OPTICON=m +CONFIG_USB_SERIAL_XSENS_MT=m +CONFIG_USB_SERIAL_WISHBONE=m +CONFIG_USB_SERIAL_SSU100=m +CONFIG_USB_SERIAL_QT2=m +CONFIG_USB_SERIAL_UPD78F0730=m +CONFIG_USB_SERIAL_XR=m +CONFIG_USB_SERIAL_DEBUG=m + +# +# USB Miscellaneous drivers +# +CONFIG_USB_USS720=m +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_SEVSEG=m +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +CONFIG_USB_CYPRESS_CY7C63=m +CONFIG_USB_CYTHERM=m +CONFIG_USB_IDMOUSE=m +CONFIG_USB_APPLEDISPLAY=m +CONFIG_APPLE_MFI_FASTCHARGE=m +CONFIG_USB_SISUSBVGA=m +CONFIG_USB_LD=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_IOWARRIOR=m +CONFIG_USB_TEST=m +CONFIG_USB_EHSET_TEST_FIXTURE=m +CONFIG_USB_ISIGHTFW=m +CONFIG_USB_YUREX=m +CONFIG_USB_EZUSB_FX2=m +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +CONFIG_USB_CHAOSKEY=m +CONFIG_USB_ATM=m +CONFIG_USB_SPEEDTOUCH=m +CONFIG_USB_CXACRU=m +CONFIG_USB_UEAGLEATM=m +CONFIG_USB_XUSBATM=m + +# +# USB Physical Layer drivers +# +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +CONFIG_USB_NET2280=m +# CONFIG_USB_GOKU is not set +CONFIG_USB_EG20T=m +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_CDNS2_UDC is not set +CONFIG_USB_DUMMY_HCD=m +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=m +CONFIG_USB_F_ACM=m +CONFIG_USB_F_SS_LB=m +CONFIG_USB_U_SERIAL=m +CONFIG_USB_U_ETHER=m +CONFIG_USB_U_AUDIO=m +CONFIG_USB_F_SERIAL=m +CONFIG_USB_F_OBEX=m +CONFIG_USB_F_NCM=m +CONFIG_USB_F_ECM=m +CONFIG_USB_F_PHONET=m +CONFIG_USB_F_EEM=m +CONFIG_USB_F_SUBSET=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_F_MASS_STORAGE=m +CONFIG_USB_F_FS=m +CONFIG_USB_F_UAC1=m +CONFIG_USB_F_UAC2=m +CONFIG_USB_F_UVC=m +CONFIG_USB_F_MIDI=m +CONFIG_USB_F_HID=m +CONFIG_USB_F_PRINTER=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_PHONET=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_UAC1=y +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_MIDI=y +# CONFIG_USB_CONFIGFS_F_MIDI2 is not set +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_CONFIGFS_F_UVC=y +CONFIG_USB_CONFIGFS_F_PRINTER=y +# CONFIG_USB_CONFIGFS_F_TCM is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set +# CONFIG_USB_G_NCM is not set +CONFIG_USB_GADGETFS=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_FUNCTIONFS_ETH=y +CONFIG_USB_FUNCTIONFS_RNDIS=y +CONFIG_USB_FUNCTIONFS_GENERIC=y +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_GADGET_TARGET is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_NOKIA is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +CONFIG_TYPEC=m +CONFIG_TYPEC_TCPM=m +# CONFIG_TYPEC_TCPCI is not set +CONFIG_TYPEC_FUSB302=m +# CONFIG_TYPEC_WCOVE is not set +CONFIG_TYPEC_UCSI=m +# CONFIG_UCSI_CCG is not set +CONFIG_UCSI_ACPI=m +# CONFIG_UCSI_STM32G0 is not set +CONFIG_TYPEC_TPS6598X=m +# CONFIG_TYPEC_ANX7411 is not set +# CONFIG_TYPEC_RT1719 is not set +# CONFIG_TYPEC_HD3SS3220 is not set +# CONFIG_TYPEC_STUSB160X is not set +# CONFIG_TYPEC_WUSB3801 is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_FSA4480 is not set +# CONFIG_TYPEC_MUX_GPIO_SBU is not set +CONFIG_TYPEC_MUX_PI3USB30532=m +# CONFIG_TYPEC_MUX_INTEL_PMC is not set +# CONFIG_TYPEC_MUX_NB7VPQ904M is not set +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +CONFIG_TYPEC_DP_ALTMODE=m +CONFIG_TYPEC_NVIDIA_ALTMODE=m +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=m +CONFIG_USB_ROLES_INTEL_XHCI=m +CONFIG_MMC=m +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_MINORS=256 +CONFIG_SDIO_UART=m +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_SDHCI=m +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_PCI=m +CONFIG_MMC_RICOH_MMC=y +CONFIG_MMC_SDHCI_ACPI=m +# CONFIG_MMC_SDHCI_PLTFM is not set +CONFIG_MMC_WBSD=m +CONFIG_MMC_TIFM_SD=m +# CONFIG_MMC_SPI is not set +CONFIG_MMC_SDRICOH_CS=m +CONFIG_MMC_CB710=m +CONFIG_MMC_VIA_SDMMC=m +CONFIG_MMC_VUB300=m +CONFIG_MMC_USHC=m +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_REALTEK_PCI=m +CONFIG_MMC_REALTEK_USB=m +CONFIG_MMC_CQHCI=m +# CONFIG_MMC_HSQ is not set +CONFIG_MMC_TOSHIBA_PCI=m +# CONFIG_MMC_MTK is not set +CONFIG_SCSI_UFSHCD=m +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_UFS_HWMON is not set +CONFIG_SCSI_UFSHCD_PCI=m +# CONFIG_SCSI_UFS_DWC_TC_PCI is not set +# CONFIG_SCSI_UFSHCD_PLATFORM is not set +CONFIG_MEMSTICK=m +# CONFIG_MEMSTICK_DEBUG is not set + +# +# MemoryStick drivers +# +# CONFIG_MEMSTICK_UNSAFE_RESUME is not set +CONFIG_MSPRO_BLOCK=m +# CONFIG_MS_BLOCK is not set + +# +# MemoryStick Host Controller Drivers +# +CONFIG_MEMSTICK_TIFM_MS=m +CONFIG_MEMSTICK_JMICRON_38X=m +CONFIG_MEMSTICK_R592=m +CONFIG_MEMSTICK_REALTEK_PCI=m +CONFIG_MEMSTICK_REALTEK_USB=m +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +CONFIG_LEDS_CLASS_MULTICOLOR=m +CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y + +# +# LED drivers +# +CONFIG_LEDS_APU=m +# CONFIG_LEDS_AW200XX is not set +# CONFIG_LEDS_CHT_WCOVE is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=m +CONFIG_LEDS_LP3944=m +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set +CONFIG_LEDS_PCA955X=m +# CONFIG_LEDS_PCA955X_GPIO is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_PCA995X is not set +CONFIG_LEDS_DAC124S085=m +# CONFIG_LEDS_PWM is not set +CONFIG_LEDS_REGULATOR=m +# CONFIG_LEDS_BD2606MVV is not set +CONFIG_LEDS_BD2802=m +CONFIG_LEDS_INTEL_SS4200=m +CONFIG_LEDS_LT3593=m +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +CONFIG_LEDS_MENF21BMC=m +# CONFIG_LEDS_IS31FL319X is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_MLXCPLD is not set +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_NIC78BX is not set + +# +# Flash and Torch LED drivers +# + +# +# RGB LED drivers +# +# CONFIG_LEDS_PWM_MULTICOLOR is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_TRIGGER_ONESHOT=m +CONFIG_LEDS_TRIGGER_DISK=y +CONFIG_LEDS_TRIGGER_MTD=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_ACTIVITY=m +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m + +# +# iptables trigger is under Netfilter config (LED target) +# +CONFIG_LEDS_TRIGGER_TRANSIENT=m +CONFIG_LEDS_TRIGGER_CAMERA=m +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_LEDS_TRIGGER_NETDEV=m +CONFIG_LEDS_TRIGGER_PATTERN=m +CONFIG_LEDS_TRIGGER_AUDIO=m +# CONFIG_LEDS_TRIGGER_TTY is not set + +# +# Simple LED drivers +# +CONFIG_LEDS_SIEMENS_SIMATIC_IPC=m +CONFIG_LEDS_SIEMENS_SIMATIC_IPC_APOLLOLAKE=m +CONFIG_LEDS_SIEMENS_SIMATIC_IPC_F7188X=m +CONFIG_LEDS_SIEMENS_SIMATIC_IPC_ELKHARTLAKE=m +CONFIG_ACCESSIBILITY=y +CONFIG_A11Y_BRAILLE_CONSOLE=y + +# +# Speakup console speech +# +CONFIG_SPEAKUP=m +CONFIG_SPEAKUP_SYNTH_ACNTSA=m +CONFIG_SPEAKUP_SYNTH_APOLLO=m +CONFIG_SPEAKUP_SYNTH_AUDPTR=m +CONFIG_SPEAKUP_SYNTH_BNS=m +CONFIG_SPEAKUP_SYNTH_DECTLK=m +CONFIG_SPEAKUP_SYNTH_DECEXT=m +CONFIG_SPEAKUP_SYNTH_LTLK=m +CONFIG_SPEAKUP_SYNTH_SOFT=m +CONFIG_SPEAKUP_SYNTH_SPKOUT=m +CONFIG_SPEAKUP_SYNTH_TXPRT=m +CONFIG_SPEAKUP_SYNTH_DUMMY=m +# end of Speakup console speech + +CONFIG_INFINIBAND=m +CONFIG_INFINIBAND_USER_MAD=m +CONFIG_INFINIBAND_USER_ACCESS=m +CONFIG_INFINIBAND_USER_MEM=y +CONFIG_INFINIBAND_ON_DEMAND_PAGING=y +CONFIG_INFINIBAND_ADDR_TRANS=y +CONFIG_INFINIBAND_ADDR_TRANS_CONFIGFS=y +CONFIG_INFINIBAND_VIRT_DMA=y +# CONFIG_INFINIBAND_BNXT_RE is not set +CONFIG_INFINIBAND_CXGB4=m +# CONFIG_INFINIBAND_EFA is not set +# CONFIG_INFINIBAND_ERDMA is not set +CONFIG_INFINIBAND_HFI1=m +# CONFIG_HFI1_DEBUG_SDMA_ORDER is not set +# CONFIG_SDMA_VERBOSITY is not set +CONFIG_INFINIBAND_IRDMA=m +# CONFIG_MANA_INFINIBAND is not set +CONFIG_MLX4_INFINIBAND=m +CONFIG_MLX5_INFINIBAND=m +CONFIG_INFINIBAND_MTHCA=m +CONFIG_INFINIBAND_MTHCA_DEBUG=y +CONFIG_INFINIBAND_OCRDMA=m +CONFIG_INFINIBAND_QEDR=m +CONFIG_INFINIBAND_QIB=m +CONFIG_INFINIBAND_QIB_DCA=y +CONFIG_INFINIBAND_USNIC=m +# CONFIG_INFINIBAND_VMWARE_PVRDMA is not set +CONFIG_INFINIBAND_RDMAVT=m +CONFIG_RDMA_RXE=m +# CONFIG_RDMA_SIW is not set +CONFIG_INFINIBAND_IPOIB=m +CONFIG_INFINIBAND_IPOIB_CM=y +CONFIG_INFINIBAND_IPOIB_DEBUG=y +# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set +CONFIG_INFINIBAND_SRP=m +CONFIG_INFINIBAND_SRPT=m +CONFIG_INFINIBAND_ISER=m +CONFIG_INFINIBAND_ISERT=m +# CONFIG_INFINIBAND_RTRS_CLIENT is not set +# CONFIG_INFINIBAND_RTRS_SERVER is not set +# CONFIG_INFINIBAND_OPA_VNIC is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_DECODE_MCE=m +# CONFIG_EDAC_GHES is not set +CONFIG_EDAC_AMD64=m +CONFIG_EDAC_E752X=m +CONFIG_EDAC_I82975X=m +CONFIG_EDAC_I3000=m +CONFIG_EDAC_I3200=m +CONFIG_EDAC_IE31200=m +CONFIG_EDAC_X38=m +CONFIG_EDAC_I5400=m +CONFIG_EDAC_I7CORE=m +CONFIG_EDAC_I5100=m +CONFIG_EDAC_I7300=m +CONFIG_EDAC_SBRIDGE=m +CONFIG_EDAC_SKX=m +CONFIG_EDAC_I10NM=m +CONFIG_EDAC_PND2=m +CONFIG_EDAC_IGEN6=m +CONFIG_RTC_LIB=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set +# CONFIG_RTC_DRV_RX6110 is not set + +# +# Platform RTC drivers +# +CONFIG_RTC_DRV_CMOS=y +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +CONFIG_RTC_DRV_CROS_EC=m + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_FTRTC010 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +# CONFIG_RTC_DRV_GOLDFISH is not set +CONFIG_RTC_DRV_WILCO_EC=m +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +# CONFIG_ALTERA_MSGDMA is not set +CONFIG_INTEL_IDMA64=m +CONFIG_INTEL_IDXD_BUS=m +CONFIG_INTEL_IDXD=m +# CONFIG_INTEL_IDXD_COMPAT is not set +CONFIG_INTEL_IDXD_SVM=y +CONFIG_INTEL_IDXD_PERFMON=y +CONFIG_INTEL_IOATDMA=m +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_XDMA is not set +# CONFIG_AMD_PTDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +CONFIG_DW_DMAC_CORE=m +CONFIG_DW_DMAC=m +CONFIG_DW_DMAC_PCI=m +# CONFIG_DW_EDMA is not set +CONFIG_HSU_DMA=y +# CONFIG_SF_PDMA is not set +# CONFIG_INTEL_LDMA is not set + +# +# DMA Clients +# +CONFIG_ASYNC_TX_DMA=y +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_DEBUG is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# CONFIG_DMABUF_SYSFS_STATS is not set +# end of DMABUF options + +CONFIG_DCA=m +CONFIG_UIO=m +CONFIG_UIO_CIF=m +# CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_DMEM_GENIRQ is not set +CONFIG_UIO_AEC=m +CONFIG_UIO_SERCOS3=m +CONFIG_UIO_PCI_GENERIC=m +CONFIG_UIO_NETX=m +# CONFIG_UIO_PRUSS is not set +CONFIG_UIO_MF624=m +CONFIG_UIO_HV_GENERIC=m +CONFIG_VFIO=m +CONFIG_VFIO_GROUP=y +CONFIG_VFIO_CONTAINER=y +CONFIG_VFIO_IOMMU_TYPE1=m +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_VIRQFD=y + +# +# VFIO support for PCI devices +# +CONFIG_VFIO_PCI_CORE=m +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +CONFIG_VFIO_PCI=m +CONFIG_VFIO_PCI_VGA=y +CONFIG_VFIO_PCI_IGD=y +# CONFIG_MLX5_VFIO_PCI is not set +# end of VFIO support for PCI devices + +CONFIG_VFIO_MDEV=m +CONFIG_IRQ_BYPASS_MANAGER=m +CONFIG_VIRT_DRIVERS=y +CONFIG_VMGENID=y +CONFIG_VBOXGUEST=m +# CONFIG_NITRO_ENCLAVES is not set +# CONFIG_EFI_SECRET is not set +CONFIG_SEV_GUEST=m +CONFIG_TDX_GUEST_DRIVER=m +CONFIG_VIRTIO_ANCHOR=y +CONFIG_VIRTIO=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_PCI_LIB_LEGACY=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_VDPA=m +CONFIG_VIRTIO_PMEM=m +CONFIG_VIRTIO_BALLOON=m +CONFIG_VIRTIO_MEM=m +CONFIG_VIRTIO_INPUT=m +CONFIG_VIRTIO_MMIO=m +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +CONFIG_VIRTIO_DMA_SHARED_BUFFER=m +CONFIG_VDPA=m +# CONFIG_VDPA_SIM is not set +CONFIG_VDPA_USER=m +# CONFIG_IFCVF is not set +# CONFIG_MLX5_VDPA_NET is not set +# CONFIG_MLX5_VDPA_STEERING_DEBUG is not set +# CONFIG_VP_VDPA is not set +# CONFIG_ALIBABA_ENI_VDPA is not set +# CONFIG_SNET_VDPA is not set +CONFIG_VHOST_IOTLB=m +CONFIG_VHOST_TASK=y +CONFIG_VHOST=m +CONFIG_VHOST_MENU=y +CONFIG_VHOST_NET=m +CONFIG_VHOST_SCSI=m +CONFIG_VHOST_VSOCK=m +CONFIG_VHOST_VDPA=m +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +CONFIG_HYPERV=m +# CONFIG_HYPERV_VTL_MODE is not set +CONFIG_HYPERV_TIMER=y +CONFIG_HYPERV_UTILS=m +CONFIG_HYPERV_BALLOON=m +# end of Microsoft Hyper-V guest support + +# +# Xen driver support +# +CONFIG_XEN_BALLOON=y +CONFIG_XEN_BALLOON_MEMORY_HOTPLUG=y +CONFIG_XEN_MEMORY_HOTPLUG_LIMIT=512 +CONFIG_XEN_SCRUB_PAGES_DEFAULT=y +CONFIG_XEN_DEV_EVTCHN=m +CONFIG_XEN_BACKEND=y +CONFIG_XENFS=m +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_XENBUS_FRONTEND=y +CONFIG_XEN_GNTDEV=m +CONFIG_XEN_GRANT_DEV_ALLOC=m +# CONFIG_XEN_GRANT_DMA_ALLOC is not set +CONFIG_SWIOTLB_XEN=y +CONFIG_XEN_PCI_STUB=y +CONFIG_XEN_PCIDEV_BACKEND=m +# CONFIG_XEN_PVCALLS_FRONTEND is not set +# CONFIG_XEN_PVCALLS_BACKEND is not set +CONFIG_XEN_SCSI_BACKEND=m +CONFIG_XEN_PRIVCMD=m +CONFIG_XEN_ACPI_PROCESSOR=m +CONFIG_XEN_MCE_LOG=y +CONFIG_XEN_HAVE_PVMMU=y +CONFIG_XEN_EFI=y +CONFIG_XEN_AUTO_XLATE=y +CONFIG_XEN_ACPI=y +CONFIG_XEN_SYMS=y +CONFIG_XEN_HAVE_VPMU=y +CONFIG_XEN_FRONT_PGDIR_SHBUF=m +CONFIG_XEN_UNPOPULATED_ALLOC=y +# CONFIG_XEN_VIRTIO is not set +# end of Xen driver support + +# CONFIG_GREYBUS is not set +CONFIG_COMEDI=m +# CONFIG_COMEDI_DEBUG is not set +CONFIG_COMEDI_DEFAULT_BUF_SIZE_KB=2048 +CONFIG_COMEDI_DEFAULT_BUF_MAXSIZE_KB=20480 +CONFIG_COMEDI_MISC_DRIVERS=y +CONFIG_COMEDI_BOND=m +CONFIG_COMEDI_TEST=m +CONFIG_COMEDI_PARPORT=m +# CONFIG_COMEDI_ISA_DRIVERS is not set +CONFIG_COMEDI_PCI_DRIVERS=m +CONFIG_COMEDI_8255_PCI=m +CONFIG_COMEDI_ADDI_WATCHDOG=m +CONFIG_COMEDI_ADDI_APCI_1032=m +CONFIG_COMEDI_ADDI_APCI_1500=m +CONFIG_COMEDI_ADDI_APCI_1516=m +CONFIG_COMEDI_ADDI_APCI_1564=m +CONFIG_COMEDI_ADDI_APCI_16XX=m +CONFIG_COMEDI_ADDI_APCI_2032=m +CONFIG_COMEDI_ADDI_APCI_2200=m +CONFIG_COMEDI_ADDI_APCI_3120=m +CONFIG_COMEDI_ADDI_APCI_3501=m +CONFIG_COMEDI_ADDI_APCI_3XXX=m +CONFIG_COMEDI_ADL_PCI6208=m +CONFIG_COMEDI_ADL_PCI7X3X=m +CONFIG_COMEDI_ADL_PCI8164=m +CONFIG_COMEDI_ADL_PCI9111=m +CONFIG_COMEDI_ADL_PCI9118=m +CONFIG_COMEDI_ADV_PCI1710=m +CONFIG_COMEDI_ADV_PCI1720=m +CONFIG_COMEDI_ADV_PCI1723=m +CONFIG_COMEDI_ADV_PCI1724=m +CONFIG_COMEDI_ADV_PCI1760=m +CONFIG_COMEDI_ADV_PCI_DIO=m +CONFIG_COMEDI_AMPLC_DIO200_PCI=m +CONFIG_COMEDI_AMPLC_PC236_PCI=m +CONFIG_COMEDI_AMPLC_PC263_PCI=m +CONFIG_COMEDI_AMPLC_PCI224=m +CONFIG_COMEDI_AMPLC_PCI230=m +CONFIG_COMEDI_CONTEC_PCI_DIO=m +CONFIG_COMEDI_DAS08_PCI=m +CONFIG_COMEDI_DT3000=m +CONFIG_COMEDI_DYNA_PCI10XX=m +CONFIG_COMEDI_GSC_HPDI=m +CONFIG_COMEDI_MF6X4=m +CONFIG_COMEDI_ICP_MULTI=m +CONFIG_COMEDI_DAQBOARD2000=m +CONFIG_COMEDI_JR3_PCI=m +CONFIG_COMEDI_KE_COUNTER=m +CONFIG_COMEDI_CB_PCIDAS64=m +CONFIG_COMEDI_CB_PCIDAS=m +CONFIG_COMEDI_CB_PCIDDA=m +CONFIG_COMEDI_CB_PCIMDAS=m +CONFIG_COMEDI_CB_PCIMDDA=m +CONFIG_COMEDI_ME4000=m +CONFIG_COMEDI_ME_DAQ=m +CONFIG_COMEDI_NI_6527=m +CONFIG_COMEDI_NI_65XX=m +CONFIG_COMEDI_NI_660X=m +CONFIG_COMEDI_NI_670X=m +CONFIG_COMEDI_NI_LABPC_PCI=m +CONFIG_COMEDI_NI_PCIDIO=m +CONFIG_COMEDI_NI_PCIMIO=m +CONFIG_COMEDI_RTD520=m +CONFIG_COMEDI_S626=m +CONFIG_COMEDI_MITE=m +CONFIG_COMEDI_NI_TIOCMD=m +CONFIG_COMEDI_PCMCIA_DRIVERS=m +CONFIG_COMEDI_CB_DAS16_CS=m +CONFIG_COMEDI_DAS08_CS=m +CONFIG_COMEDI_NI_DAQ_700_CS=m +CONFIG_COMEDI_NI_DAQ_DIO24_CS=m +CONFIG_COMEDI_NI_LABPC_CS=m +CONFIG_COMEDI_NI_MIO_CS=m +CONFIG_COMEDI_QUATECH_DAQP_CS=m +CONFIG_COMEDI_USB_DRIVERS=m +CONFIG_COMEDI_DT9812=m +CONFIG_COMEDI_NI_USB6501=m +CONFIG_COMEDI_USBDUX=m +CONFIG_COMEDI_USBDUXFAST=m +CONFIG_COMEDI_USBDUXSIGMA=m +CONFIG_COMEDI_VMK80XX=m +CONFIG_COMEDI_8254=m +CONFIG_COMEDI_8255=m +CONFIG_COMEDI_8255_SA=m +CONFIG_COMEDI_KCOMEDILIB=m +CONFIG_COMEDI_AMPLC_DIO200=m +CONFIG_COMEDI_AMPLC_PC236=m +CONFIG_COMEDI_DAS08=m +CONFIG_COMEDI_NI_LABPC=m +CONFIG_COMEDI_NI_TIO=m +CONFIG_COMEDI_NI_ROUTING=m +# CONFIG_COMEDI_TESTS is not set +CONFIG_STAGING=y +CONFIG_PRISM2_USB=m +CONFIG_RTL8192U=m +CONFIG_RTLLIB=m +CONFIG_RTLLIB_CRYPTO_CCMP=m +CONFIG_RTLLIB_CRYPTO_TKIP=m +CONFIG_RTLLIB_CRYPTO_WEP=m +CONFIG_RTL8192E=m +CONFIG_RTL8723BS=m +CONFIG_R8712U=m +CONFIG_RTS5208=m +# CONFIG_VT6655 is not set +CONFIG_VT6656=m + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set +CONFIG_STAGING_MEDIA=y +# CONFIG_INTEL_ATOMISP is not set +CONFIG_DVB_AV7110_IR=y +CONFIG_DVB_AV7110=m +CONFIG_DVB_AV7110_OSD=y +CONFIG_DVB_BUDGET_PATCH=m +CONFIG_DVB_SP8870=m +# CONFIG_VIDEO_IPU3_IMGU is not set +# CONFIG_STAGING_MEDIA_DEPRECATED is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_FB_TFT is not set +# CONFIG_KS7010 is not set +# CONFIG_PI433 is not set +# CONFIG_FIELDBUS_DEV is not set +CONFIG_QLGE=m +# CONFIG_VME_BUS is not set +CONFIG_CHROME_PLATFORMS=y +CONFIG_CHROMEOS_ACPI=m +CONFIG_CHROMEOS_LAPTOP=m +CONFIG_CHROMEOS_PSTORE=m +CONFIG_CHROMEOS_TBMC=m +CONFIG_CROS_EC=m +CONFIG_CROS_EC_I2C=m +CONFIG_CROS_EC_ISHTP=m +CONFIG_CROS_EC_SPI=m +# CONFIG_CROS_EC_UART is not set +CONFIG_CROS_EC_LPC=m +CONFIG_CROS_EC_PROTO=y +CONFIG_CROS_KBD_LED_BACKLIGHT=m +CONFIG_CROS_EC_CHARDEV=m +CONFIG_CROS_EC_LIGHTBAR=m +CONFIG_CROS_EC_DEBUGFS=m +CONFIG_CROS_EC_SENSORHUB=m +CONFIG_CROS_EC_SYSFS=m +CONFIG_CROS_EC_TYPEC=m +# CONFIG_CROS_HPS_I2C is not set +CONFIG_CROS_USBPD_LOGGER=m +CONFIG_CROS_USBPD_NOTIFY=m +CONFIG_CHROMEOS_PRIVACY_SCREEN=m +CONFIG_CROS_TYPEC_SWITCH=m +CONFIG_WILCO_EC=m +CONFIG_WILCO_EC_DEBUGFS=m +CONFIG_WILCO_EC_EVENTS=m +CONFIG_WILCO_EC_TELEMETRY=m +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_SURFACE_PLATFORMS=y +CONFIG_SURFACE3_WMI=m +CONFIG_SURFACE_3_POWER_OPREGION=m +CONFIG_SURFACE_ACPI_NOTIFY=m +# CONFIG_SURFACE_AGGREGATOR_CDEV is not set +# CONFIG_SURFACE_AGGREGATOR_HUB is not set +CONFIG_SURFACE_AGGREGATOR_REGISTRY=m +# CONFIG_SURFACE_AGGREGATOR_TABLET_SWITCH is not set +CONFIG_SURFACE_DTX=m +CONFIG_SURFACE_GPE=m +CONFIG_SURFACE_HOTPLUG=m +CONFIG_SURFACE_PLATFORM_PROFILE=m +CONFIG_SURFACE_PRO3_BUTTON=m +CONFIG_SURFACE_AGGREGATOR=m +CONFIG_SURFACE_AGGREGATOR_BUS=y +CONFIG_X86_PLATFORM_DEVICES=y +CONFIG_ACPI_WMI=m +CONFIG_WMI_BMOF=m +CONFIG_HUAWEI_WMI=m +CONFIG_MXM_WMI=m +CONFIG_NVIDIA_WMI_EC_BACKLIGHT=m +CONFIG_XIAOMI_WMI=m +CONFIG_GIGABYTE_WMI=m +# CONFIG_YOGABOOK is not set +CONFIG_ACERHDF=m +CONFIG_ACER_WIRELESS=m +CONFIG_ACER_WMI=m +# CONFIG_AMD_PMF is not set +CONFIG_AMD_PMC=m +# CONFIG_AMD_HSMP is not set +# CONFIG_ADV_SWBUTTON is not set +CONFIG_APPLE_GMUX=m +CONFIG_ASUS_LAPTOP=m +CONFIG_ASUS_WIRELESS=m +CONFIG_ASUS_WMI=m +CONFIG_ASUS_NB_WMI=m +# CONFIG_ASUS_TF103C_DOCK is not set +CONFIG_EEEPC_LAPTOP=m +CONFIG_EEEPC_WMI=m +CONFIG_X86_PLATFORM_DRIVERS_DELL=y +CONFIG_ALIENWARE_WMI=m +CONFIG_DCDBAS=m +CONFIG_DELL_LAPTOP=m +CONFIG_DELL_RBU=m +CONFIG_DELL_RBTN=m +CONFIG_DELL_SMBIOS=m +CONFIG_DELL_SMBIOS_WMI=y +CONFIG_DELL_SMBIOS_SMM=y +CONFIG_DELL_SMO8800=m +CONFIG_DELL_WMI=m +# CONFIG_DELL_WMI_PRIVACY is not set +CONFIG_DELL_WMI_AIO=m +CONFIG_DELL_WMI_DESCRIPTOR=m +CONFIG_DELL_WMI_DDV=m +CONFIG_DELL_WMI_LED=m +CONFIG_DELL_WMI_SYSMAN=m +CONFIG_AMILO_RFKILL=m +CONFIG_FUJITSU_LAPTOP=m +CONFIG_FUJITSU_TABLET=m +CONFIG_GPD_POCKET_FAN=m +CONFIG_X86_PLATFORM_DRIVERS_HP=y +CONFIG_HP_ACCEL=m +CONFIG_HP_WMI=m +CONFIG_HP_BIOSCFG=m +# CONFIG_WIRELESS_HOTKEY is not set +CONFIG_IBM_RTL=m +CONFIG_IDEAPAD_LAPTOP=m +CONFIG_LENOVO_YMC=m +CONFIG_SENSORS_HDAPS=m +CONFIG_THINKPAD_ACPI=m +CONFIG_THINKPAD_ACPI_ALSA_SUPPORT=y +# CONFIG_THINKPAD_ACPI_DEBUGFACILITIES is not set +# CONFIG_THINKPAD_ACPI_DEBUG is not set +# CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set +CONFIG_THINKPAD_ACPI_VIDEO=y +CONFIG_THINKPAD_ACPI_HOTKEY_POLL=y +CONFIG_THINKPAD_LMI=m +CONFIG_INTEL_ATOMISP2_PDX86=y +# CONFIG_INTEL_ATOMISP2_LED is not set +CONFIG_INTEL_ATOMISP2_PM=m +CONFIG_INTEL_IFS=m +# CONFIG_INTEL_SAR_INT1092 is not set +CONFIG_INTEL_SKL_INT3472=m +CONFIG_INTEL_PMC_CORE=m +CONFIG_INTEL_PMT_CLASS=m +CONFIG_INTEL_PMT_TELEMETRY=m +CONFIG_INTEL_PMT_CRASHLOG=m + +# +# Intel Speed Select Technology interface support +# +CONFIG_INTEL_SPEED_SELECT_TPMI=m +CONFIG_INTEL_SPEED_SELECT_INTERFACE=m +# end of Intel Speed Select Technology interface support + +CONFIG_INTEL_WMI=y +# CONFIG_INTEL_WMI_SBL_FW_UPDATE is not set +CONFIG_INTEL_WMI_THUNDERBOLT=m + +# +# Intel Uncore Frequency Control +# +CONFIG_INTEL_UNCORE_FREQ_CONTROL_TPMI=m +CONFIG_INTEL_UNCORE_FREQ_CONTROL=m +# end of Intel Uncore Frequency Control + +CONFIG_INTEL_HID_EVENT=m +CONFIG_INTEL_VBTN=m +CONFIG_INTEL_INT0002_VGPIO=m +CONFIG_INTEL_OAKTRAIL=m +# CONFIG_INTEL_BXTWC_PMIC_TMU is not set +# CONFIG_INTEL_BYTCRC_PWRSRC is not set +# CONFIG_INTEL_CHTDC_TI_PWRBTN is not set +CONFIG_INTEL_CHTWC_INT33FE=m +# CONFIG_INTEL_ISHTP_ECLITE is not set +# CONFIG_INTEL_PUNIT_IPC is not set +CONFIG_INTEL_RST=m +CONFIG_INTEL_SDSI=m +CONFIG_INTEL_SMARTCONNECT=m +CONFIG_INTEL_TPMI=m +CONFIG_INTEL_TURBO_MAX_3=y +CONFIG_INTEL_VSEC=m +# CONFIG_MSI_EC is not set +CONFIG_MSI_LAPTOP=m +CONFIG_MSI_WMI=m +CONFIG_PCENGINES_APU2=m +# CONFIG_BARCO_P50_GPIO is not set +CONFIG_SAMSUNG_LAPTOP=m +CONFIG_SAMSUNG_Q10=m +CONFIG_ACPI_TOSHIBA=m +CONFIG_TOSHIBA_BT_RFKILL=m +CONFIG_TOSHIBA_HAPS=m +CONFIG_TOSHIBA_WMI=m +CONFIG_ACPI_CMPC=m +CONFIG_COMPAL_LAPTOP=m +CONFIG_LG_LAPTOP=m +CONFIG_PANASONIC_LAPTOP=m +CONFIG_SONY_LAPTOP=m +CONFIG_SONYPI_COMPAT=y +CONFIG_SYSTEM76_ACPI=m +CONFIG_TOPSTAR_LAPTOP=m +CONFIG_SERIAL_MULTI_INSTANTIATE=m +# CONFIG_MLX_PLATFORM is not set +CONFIG_TOUCHSCREEN_DMI=y +CONFIG_X86_ANDROID_TABLETS=m +CONFIG_FW_ATTR_CLASS=m +CONFIG_INTEL_IPS=m +CONFIG_INTEL_SCU_IPC=y +# CONFIG_INTEL_SCU_PCI is not set +# CONFIG_INTEL_SCU_PLATFORM is not set +CONFIG_SIEMENS_SIMATIC_IPC=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT_APOLLOLAKE=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT_ELKHARTLAKE=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT_F7188X=m +# CONFIG_WINMATE_FM07_KEYS is not set +# CONFIG_SEL3350_PLATFORM is not set +CONFIG_P2SB=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_LMK04832 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_TPS68470 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_XILINX_VCU is not set +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_CLKEVT_I8253=y +CONFIG_I8253_LOCK=y +CONFIG_CLKBLD_I8253=y +# end of Clock Source drivers + +CONFIG_MAILBOX=y +CONFIG_PCC=y +# CONFIG_ALTERA_MBOX is not set +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_DMA_STRICT is not set +CONFIG_IOMMU_DEFAULT_DMA_LAZY=y +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_IOMMU_DMA=y +CONFIG_IOMMU_SVA=y +CONFIG_AMD_IOMMU=y +CONFIG_AMD_IOMMU_V2=y +CONFIG_DMAR_TABLE=y +CONFIG_INTEL_IOMMU=y +CONFIG_INTEL_IOMMU_SVM=y +# CONFIG_INTEL_IOMMU_DEFAULT_ON is not set +CONFIG_INTEL_IOMMU_DEFAULT_ON_INTGPU_OFF=y +# CONFIG_INTEL_IOMMU_DEFAULT_OFF is not set +CONFIG_INTEL_IOMMU_FLOPPY_WA=y +CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON=y +CONFIG_INTEL_IOMMU_PERF_EVENTS=y +# CONFIG_IOMMUFD is not set +CONFIG_IRQ_REMAP=y +CONFIG_HYPERV_IOMMU=y +# CONFIG_VIRTIO_IOMMU is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +CONFIG_SOUNDWIRE=m + +# +# SoundWire Devices +# +# CONFIG_SOUNDWIRE_AMD is not set +CONFIG_SOUNDWIRE_CADENCE=m +CONFIG_SOUNDWIRE_INTEL=m +CONFIG_SOUNDWIRE_QCOM=m +CONFIG_SOUNDWIRE_GENERIC_ALLOCATION=m + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Broadcom SoC drivers +# +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# end of NXP/Freescale QorIQ SoC drivers + +# +# fujitsu SoC drivers +# +# end of fujitsu SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Enable LiteX SoC Builder specific drivers +# +# end of Enable LiteX SoC Builder specific drivers + +# CONFIG_WPCM450_SOC is not set + +# +# Qualcomm SoC drivers +# +CONFIG_QCOM_QMI_HELPERS=m +# end of Qualcomm SoC drivers + +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=m + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +CONFIG_EXTCON_AXP288=m +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_INTEL_INT3496 is not set +CONFIG_EXTCON_INTEL_CHT_WC=m +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_PTN5150 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +# CONFIG_EXTCON_USB_GPIO is not set +CONFIG_EXTCON_USBC_CROS_EC=m +# CONFIG_EXTCON_USBC_TUSB320 is not set +CONFIG_MEMORY=y +CONFIG_IIO=m +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set +CONFIG_IIO_TRIGGERED_EVENT=m + +# +# Accelerometers +# +CONFIG_ADIS16201=m +CONFIG_ADIS16209=m +# CONFIG_ADXL313_I2C is not set +# CONFIG_ADXL313_SPI is not set +CONFIG_ADXL345=m +CONFIG_ADXL345_I2C=m +CONFIG_ADXL345_SPI=m +# CONFIG_ADXL355_I2C is not set +# CONFIG_ADXL355_SPI is not set +# CONFIG_ADXL367_SPI is not set +# CONFIG_ADXL367_I2C is not set +CONFIG_ADXL372=m +CONFIG_ADXL372_SPI=m +CONFIG_ADXL372_I2C=m +CONFIG_BMA180=m +CONFIG_BMA220=m +CONFIG_BMA400=m +CONFIG_BMA400_I2C=m +CONFIG_BMA400_SPI=m +CONFIG_BMC150_ACCEL=m +CONFIG_BMC150_ACCEL_I2C=m +CONFIG_BMC150_ACCEL_SPI=m +# CONFIG_BMI088_ACCEL is not set +CONFIG_DA280=m +CONFIG_DA311=m +# CONFIG_DMARD06 is not set +CONFIG_DMARD09=m +CONFIG_DMARD10=m +# CONFIG_FXLS8962AF_I2C is not set +# CONFIG_FXLS8962AF_SPI is not set +CONFIG_HID_SENSOR_ACCEL_3D=m +CONFIG_IIO_CROS_EC_ACCEL_LEGACY=m +CONFIG_IIO_ST_ACCEL_3AXIS=m +CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m +CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m +# CONFIG_IIO_KX022A_SPI is not set +# CONFIG_IIO_KX022A_I2C is not set +CONFIG_KXSD9=m +CONFIG_KXSD9_SPI=m +CONFIG_KXSD9_I2C=m +CONFIG_KXCJK1013=m +CONFIG_MC3230=m +CONFIG_MMA7455=m +CONFIG_MMA7455_I2C=m +CONFIG_MMA7455_SPI=m +CONFIG_MMA7660=m +CONFIG_MMA8452=m +CONFIG_MMA9551_CORE=m +CONFIG_MMA9551=m +CONFIG_MMA9553=m +# CONFIG_MSA311 is not set +CONFIG_MXC4005=m +CONFIG_MXC6255=m +CONFIG_SCA3000=m +# CONFIG_SCA3300 is not set +CONFIG_STK8312=m +CONFIG_STK8BA50=m +# end of Accelerometers + +# +# Analog to digital converters +# +CONFIG_AD_SIGMA_DELTA=m +# CONFIG_AD4130 is not set +CONFIG_AD7091R5=m +CONFIG_AD7124=m +CONFIG_AD7192=m +CONFIG_AD7266=m +# CONFIG_AD7280 is not set +CONFIG_AD7291=m +CONFIG_AD7292=m +CONFIG_AD7298=m +CONFIG_AD7476=m +CONFIG_AD7606=m +CONFIG_AD7606_IFACE_PARALLEL=m +CONFIG_AD7606_IFACE_SPI=m +CONFIG_AD7766=m +CONFIG_AD7768_1=m +CONFIG_AD7780=m +CONFIG_AD7791=m +CONFIG_AD7793=m +CONFIG_AD7887=m +CONFIG_AD7923=m +CONFIG_AD7949=m +CONFIG_AD799X=m +CONFIG_AXP20X_ADC=m +CONFIG_AXP288_ADC=m +CONFIG_CC10001_ADC=m +# CONFIG_ENVELOPE_DETECTOR is not set +CONFIG_HI8435=m +CONFIG_HX711=m +CONFIG_INA2XX_ADC=m +CONFIG_LTC2471=m +CONFIG_LTC2485=m +CONFIG_LTC2496=m +CONFIG_LTC2497=m +CONFIG_MAX1027=m +CONFIG_MAX11100=m +CONFIG_MAX1118=m +# CONFIG_MAX11205 is not set +# CONFIG_MAX11410 is not set +CONFIG_MAX1241=m +CONFIG_MAX1363=m +CONFIG_MAX9611=m +CONFIG_MCP320X=m +CONFIG_MCP3422=m +CONFIG_MCP3911=m +CONFIG_NAU7802=m +# CONFIG_RICHTEK_RTQ6056 is not set +# CONFIG_SD_ADC_MODULATOR is not set +CONFIG_TI_ADC081C=m +CONFIG_TI_ADC0832=m +CONFIG_TI_ADC084S021=m +CONFIG_TI_ADC12138=m +CONFIG_TI_ADC108S102=m +CONFIG_TI_ADC128S052=m +CONFIG_TI_ADC161S626=m +CONFIG_TI_ADS1015=m +# CONFIG_TI_ADS7924 is not set +# CONFIG_TI_ADS1100 is not set +CONFIG_TI_ADS7950=m +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_ADS131E08 is not set +# CONFIG_TI_LMP92064 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_TI_TSC2046 is not set +# CONFIG_VF610_ADC is not set +CONFIG_VIPERBOARD_ADC=m +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog to digital and digital to analog converters +# +# CONFIG_AD74115 is not set +# CONFIG_AD74413R is not set +# end of Analog to digital and digital to analog converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_ADA4250 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_PMS7003 is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SCD4X is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SENSIRION_SGP40 is not set +# CONFIG_SPS30_I2C is not set +# CONFIG_SPS30_SERIAL is not set +# CONFIG_SENSEAIR_SUNRISE_CO2 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +CONFIG_IIO_CROS_EC_SENSORS_CORE=m +CONFIG_IIO_CROS_EC_SENSORS=m +CONFIG_IIO_CROS_EC_SENSORS_LID_ANGLE=m + +# +# Hid Sensor IIO Common +# +CONFIG_HID_SENSOR_IIO_COMMON=m +CONFIG_HID_SENSOR_IIO_TRIGGER=m +# end of Hid Sensor IIO Common + +CONFIG_IIO_INV_SENSORS_TIMESTAMP=m +CONFIG_IIO_MS_SENSORS_I2C=m + +# +# IIO SCMI Sensors +# +# end of IIO SCMI Sensors + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +CONFIG_IIO_ST_SENSORS_I2C=m +CONFIG_IIO_ST_SENSORS_SPI=m +CONFIG_IIO_ST_SENSORS_CORE=m + +# +# Digital to analog converters +# +# CONFIG_AD3552R is not set +CONFIG_AD5064=m +CONFIG_AD5360=m +CONFIG_AD5380=m +CONFIG_AD5421=m +CONFIG_AD5446=m +CONFIG_AD5449=m +CONFIG_AD5592R_BASE=m +CONFIG_AD5592R=m +CONFIG_AD5593R=m +CONFIG_AD5504=m +CONFIG_AD5624R_SPI=m +# CONFIG_LTC2688 is not set +CONFIG_AD5686=m +CONFIG_AD5686_SPI=m +CONFIG_AD5696_I2C=m +CONFIG_AD5755=m +CONFIG_AD5758=m +CONFIG_AD5761=m +CONFIG_AD5764=m +# CONFIG_AD5766 is not set +CONFIG_AD5770R=m +CONFIG_AD5791=m +# CONFIG_AD7293 is not set +CONFIG_AD7303=m +CONFIG_AD8801=m +# CONFIG_DPOT_DAC is not set +CONFIG_DS4424=m +CONFIG_LTC1660=m +CONFIG_LTC2632=m +CONFIG_M62332=m +CONFIG_MAX517=m +# CONFIG_MAX5522 is not set +# CONFIG_MAX5821 is not set +CONFIG_MCP4725=m +# CONFIG_MCP4728 is not set +CONFIG_MCP4922=m +CONFIG_TI_DAC082S085=m +CONFIG_TI_DAC5571=m +CONFIG_TI_DAC7311=m +CONFIG_TI_DAC7612=m +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Filters +# +# CONFIG_ADMV8818 is not set +# end of Filters + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# CONFIG_ADF4377 is not set +# CONFIG_ADMV1013 is not set +# CONFIG_ADMV1014 is not set +# CONFIG_ADMV4420 is not set +# CONFIG_ADRF6780 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +CONFIG_ADIS16080=m +CONFIG_ADIS16130=m +CONFIG_ADIS16136=m +CONFIG_ADIS16260=m +CONFIG_ADXRS290=m +CONFIG_ADXRS450=m +CONFIG_BMG160=m +CONFIG_BMG160_I2C=m +CONFIG_BMG160_SPI=m +CONFIG_FXAS21002C=m +CONFIG_FXAS21002C_I2C=m +CONFIG_FXAS21002C_SPI=m +CONFIG_HID_SENSOR_GYRO_3D=m +CONFIG_MPU3050=m +CONFIG_MPU3050_I2C=m +CONFIG_IIO_ST_GYRO_3AXIS=m +CONFIG_IIO_ST_GYRO_I2C_3AXIS=m +CONFIG_IIO_ST_GYRO_SPI_3AXIS=m +CONFIG_ITG3200=m +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +# CONFIG_HID_SENSOR_HUMIDITY is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +CONFIG_ADIS16460=m +CONFIG_ADIS16475=m +CONFIG_ADIS16480=m +CONFIG_BMI160=m +CONFIG_BMI160_I2C=m +CONFIG_BMI160_SPI=m +# CONFIG_BOSCH_BNO055_SERIAL is not set +# CONFIG_BOSCH_BNO055_I2C is not set +CONFIG_FXOS8700=m +CONFIG_FXOS8700_I2C=m +CONFIG_FXOS8700_SPI=m +CONFIG_KMX61=m +CONFIG_INV_ICM42600=m +CONFIG_INV_ICM42600_I2C=m +CONFIG_INV_ICM42600_SPI=m +CONFIG_INV_MPU6050_IIO=m +CONFIG_INV_MPU6050_I2C=m +CONFIG_INV_MPU6050_SPI=m +CONFIG_IIO_ST_LSM6DSX=m +CONFIG_IIO_ST_LSM6DSX_I2C=m +CONFIG_IIO_ST_LSM6DSX_SPI=m +# CONFIG_IIO_ST_LSM9DS0 is not set +# end of Inertial measurement units + +CONFIG_IIO_ADIS_LIB=m +CONFIG_IIO_ADIS_LIB_BUFFER=y + +# +# Light sensors +# +CONFIG_ACPI_ALS=m +CONFIG_ADJD_S311=m +CONFIG_ADUX1020=m +CONFIG_AL3010=m +CONFIG_AL3320A=m +CONFIG_APDS9300=m +CONFIG_APDS9960=m +CONFIG_AS73211=m +CONFIG_BH1750=m +CONFIG_BH1780=m +CONFIG_CM32181=m +CONFIG_CM3232=m +CONFIG_CM3323=m +# CONFIG_CM3605 is not set +CONFIG_CM36651=m +CONFIG_IIO_CROS_EC_LIGHT_PROX=m +CONFIG_GP2AP002=m +CONFIG_GP2AP020A00F=m +CONFIG_SENSORS_ISL29018=m +CONFIG_SENSORS_ISL29028=m +CONFIG_ISL29125=m +CONFIG_HID_SENSOR_ALS=m +CONFIG_HID_SENSOR_PROX=m +CONFIG_JSA1212=m +# CONFIG_ROHM_BU27008 is not set +# CONFIG_ROHM_BU27034 is not set +CONFIG_RPR0521=m +CONFIG_LTR501=m +# CONFIG_LTRF216A is not set +CONFIG_LV0104CS=m +CONFIG_MAX44000=m +CONFIG_MAX44009=m +CONFIG_NOA1305=m +CONFIG_OPT3001=m +# CONFIG_OPT4001 is not set +CONFIG_PA12203001=m +CONFIG_SI1133=m +CONFIG_SI1145=m +CONFIG_STK3310=m +CONFIG_ST_UVIS25=m +CONFIG_ST_UVIS25_I2C=m +CONFIG_ST_UVIS25_SPI=m +CONFIG_TCS3414=m +CONFIG_TCS3472=m +CONFIG_SENSORS_TSL2563=m +CONFIG_TSL2583=m +# CONFIG_TSL2591 is not set +CONFIG_TSL2772=m +CONFIG_TSL4531=m +CONFIG_US5182D=m +CONFIG_VCNL4000=m +CONFIG_VCNL4035=m +CONFIG_VEML6030=m +CONFIG_VEML6070=m +CONFIG_VL6180=m +CONFIG_ZOPT2201=m +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +CONFIG_AK8975=m +CONFIG_AK09911=m +CONFIG_BMC150_MAGN=m +CONFIG_BMC150_MAGN_I2C=m +CONFIG_BMC150_MAGN_SPI=m +CONFIG_MAG3110=m +CONFIG_HID_SENSOR_MAGNETOMETER_3D=m +CONFIG_MMC35240=m +CONFIG_IIO_ST_MAGN_3AXIS=m +CONFIG_IIO_ST_MAGN_I2C_3AXIS=m +CONFIG_IIO_ST_MAGN_SPI_3AXIS=m +CONFIG_SENSORS_HMC5843=m +CONFIG_SENSORS_HMC5843_I2C=m +CONFIG_SENSORS_HMC5843_SPI=m +CONFIG_SENSORS_RM3100=m +CONFIG_SENSORS_RM3100_I2C=m +CONFIG_SENSORS_RM3100_SPI=m +# CONFIG_TI_TMAG5273 is not set +# CONFIG_YAMAHA_YAS530 is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +CONFIG_HID_SENSOR_INCLINOMETER_3D=m +CONFIG_HID_SENSOR_DEVICE_ROTATION=m +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE is not set +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5110 is not set +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# CONFIG_X9250 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +CONFIG_ABP060MG=m +CONFIG_BMP280=m +CONFIG_BMP280_I2C=m +CONFIG_BMP280_SPI=m +CONFIG_IIO_CROS_EC_BARO=m +CONFIG_DLHL60D=m +CONFIG_DPS310=m +CONFIG_HID_SENSOR_PRESS=m +CONFIG_HP03=m +CONFIG_ICP10100=m +CONFIG_MPL115=m +CONFIG_MPL115_I2C=m +CONFIG_MPL115_SPI=m +CONFIG_MPL3115=m +# CONFIG_MPRLS0025PA is not set +CONFIG_MS5611=m +# CONFIG_MS5611_I2C is not set +# CONFIG_MS5611_SPI is not set +CONFIG_MS5637=m +CONFIG_IIO_ST_PRESS=m +CONFIG_IIO_ST_PRESS_I2C=m +CONFIG_IIO_ST_PRESS_SPI=m +CONFIG_T5403=m +CONFIG_HP206C=m +CONFIG_ZPA2326=m +CONFIG_ZPA2326_I2C=m +CONFIG_ZPA2326_SPI=m +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_CROS_EC_MKBP_PROXIMITY is not set +# CONFIG_IRSD200 is not set +CONFIG_ISL29501=m +CONFIG_LIDAR_LITE_V2=m +CONFIG_MB1232=m +CONFIG_PING=m +CONFIG_RFD77402=m +CONFIG_SRF04=m +CONFIG_SX_COMMON=m +CONFIG_SX9310=m +# CONFIG_SX9324 is not set +# CONFIG_SX9360 is not set +# CONFIG_SX9500 is not set +CONFIG_SRF08=m +CONFIG_VCNL3020=m +CONFIG_VL53L0X_I2C=m +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +CONFIG_LTC2983=m +CONFIG_MAXIM_THERMOCOUPLE=m +CONFIG_HID_SENSOR_TEMP=m +CONFIG_MLX90614=m +CONFIG_MLX90632=m +CONFIG_TMP006=m +CONFIG_TMP007=m +# CONFIG_TMP117 is not set +CONFIG_TSYS01=m +CONFIG_TSYS02D=m +# CONFIG_MAX30208 is not set +CONFIG_MAX31856=m +# CONFIG_MAX31865 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +# CONFIG_PWM_CLK is not set +CONFIG_PWM_CRC=y +CONFIG_PWM_CROS_EC=m +# CONFIG_PWM_DWC is not set +CONFIG_PWM_LPSS=m +# CONFIG_PWM_LPSS_PCI is not set +CONFIG_PWM_LPSS_PLATFORM=m +# CONFIG_PWM_PCA9685 is not set + +# +# IRQ chip support +# +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_SIMPLE is not set +# CONFIG_RESET_TI_SYSCON is not set +# CONFIG_RESET_TI_TPS380X is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_USB_LGM_PHY is not set +# CONFIG_PHY_CAN_TRANSCEIVER is not set + +# +# PHY drivers for Broadcom platforms +# +# CONFIG_BCM_KONA_USB2_PHY is not set +# end of PHY drivers for Broadcom platforms + +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_INTEL_LGM_EMMC is not set +# end of PHY Subsystem + +CONFIG_POWERCAP=y +CONFIG_INTEL_RAPL_CORE=m +CONFIG_INTEL_RAPL=m +CONFIG_INTEL_RAPL_TPMI=m +CONFIG_IDLE_INJECT=y +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# end of Performance monitor support + +CONFIG_RAS=y +CONFIG_RAS_CEC=y +# CONFIG_RAS_CEC_DEBUG is not set +CONFIG_USB4=m +# CONFIG_USB4_DEBUGFS_WRITE is not set +# CONFIG_USB4_DMA_TEST is not set + +# +# Android +# +CONFIG_ANDROID_BINDER_IPC=m +# CONFIG_ANDROID_BINDERFS is not set +CONFIG_ANDROID_BINDER_DEVICES="binder" +# CONFIG_ANDROID_BINDER_IPC_SELFTEST is not set +# end of Android + +CONFIG_LIBNVDIMM=m +CONFIG_BLK_DEV_PMEM=m +CONFIG_ND_CLAIM=y +CONFIG_ND_BTT=m +CONFIG_BTT=y +CONFIG_ND_PFN=m +CONFIG_NVDIMM_PFN=y +CONFIG_NVDIMM_DAX=y +CONFIG_NVDIMM_KEYS=y +# CONFIG_NVDIMM_SECURITY_TEST is not set +CONFIG_DAX=y +CONFIG_DEV_DAX=m +CONFIG_DEV_DAX_PMEM=m +CONFIG_DEV_DAX_HMEM=m +CONFIG_DEV_DAX_CXL=m +CONFIG_DEV_DAX_HMEM_DEVICES=y +CONFIG_DEV_DAX_KMEM=m +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y + +# +# Layout Types +# +# CONFIG_NVMEM_LAYOUT_SL28_VPD is not set +# CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +# end of Layout Types + +# CONFIG_NVMEM_RMEM is not set + +# +# HW tracing support +# +CONFIG_STM=m +CONFIG_STM_PROTO_BASIC=m +CONFIG_STM_PROTO_SYS_T=m +CONFIG_STM_DUMMY=m +CONFIG_STM_SOURCE_CONSOLE=m +CONFIG_STM_SOURCE_HEARTBEAT=m +CONFIG_STM_SOURCE_FTRACE=m +CONFIG_INTEL_TH=m +CONFIG_INTEL_TH_PCI=m +CONFIG_INTEL_TH_ACPI=m +CONFIG_INTEL_TH_GTH=m +CONFIG_INTEL_TH_STH=m +CONFIG_INTEL_TH_MSU=m +CONFIG_INTEL_TH_PTI=m +# CONFIG_INTEL_TH_DEBUG is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_TEE is not set +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +CONFIG_SLIMBUS=m +# CONFIG_SLIM_QCOM_CTRL is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set +# CONFIG_PECI is not set +# CONFIG_HTE is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_BUFFER_HEAD=y +CONFIG_LEGACY_DIRECT_IO=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=m +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=m +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=m +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +CONFIG_JFS_SECURITY=y +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_XFS_FS=m +CONFIG_XFS_SUPPORT_V4=y +CONFIG_XFS_SUPPORT_ASCII_CI=y +CONFIG_XFS_QUOTA=y +CONFIG_XFS_POSIX_ACL=y +CONFIG_XFS_RT=y +# CONFIG_XFS_ONLINE_SCRUB is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +CONFIG_GFS2_FS=m +CONFIG_GFS2_FS_LOCKING_DLM=y +CONFIG_OCFS2_FS=m +CONFIG_OCFS2_FS_O2CB=m +CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m +CONFIG_OCFS2_FS_STATS=y +CONFIG_OCFS2_DEBUG_MASKLOG=y +# CONFIG_OCFS2_DEBUG_FS is not set +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +CONFIG_NILFS2_FS=m +CONFIG_F2FS_FS=m +CONFIG_F2FS_STAT_FS=y +CONFIG_F2FS_FS_XATTR=y +CONFIG_F2FS_FS_POSIX_ACL=y +CONFIG_F2FS_FS_SECURITY=y +# CONFIG_F2FS_CHECK_FS is not set +# CONFIG_F2FS_FAULT_INJECTION is not set +CONFIG_F2FS_FS_COMPRESSION=y +CONFIG_F2FS_FS_LZO=y +CONFIG_F2FS_FS_LZORLE=y +CONFIG_F2FS_FS_LZ4=y +CONFIG_F2FS_FS_LZ4HC=y +CONFIG_F2FS_FS_ZSTD=y +CONFIG_F2FS_IOSTAT=y +# CONFIG_F2FS_UNFAIR_RWSEM is not set +CONFIG_ZONEFS_FS=m +CONFIG_FS_DAX=y +CONFIG_FS_DAX_PMD=y +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_FILE_LOCKING=y +CONFIG_FS_ENCRYPTION=y +CONFIG_FS_ENCRYPTION_ALGS=m +CONFIG_FS_VERITY=y +CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=m +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=m +CONFIG_QUOTACTL=y +CONFIG_AUTOFS_FS=m +CONFIG_FUSE_FS=y +CONFIG_CUSE=m +CONFIG_VIRTIO_FS=y +CONFIG_FUSE_DAX=y +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set +# CONFIG_OVERLAY_FS_DEBUG is not set + +# +# Caches +# +CONFIG_NETFS_SUPPORT=m +CONFIG_NETFS_STATS=y +CONFIG_FSCACHE=m +CONFIG_FSCACHE_STATS=y +# CONFIG_FSCACHE_DEBUG is not set +CONFIG_CACHEFILES=m +# CONFIG_CACHEFILES_DEBUG is not set +# CONFIG_CACHEFILES_ERROR_INJECTION is not set +# CONFIG_CACHEFILES_ONDEMAND is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +CONFIG_FAT_DEFAULT_UTF8=y +CONFIG_EXFAT_FS=m +CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_CHILDREN=y +CONFIG_PROC_PID_ARCH_STATUS=y +CONFIG_PROC_CPU_RESCTRL=y +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +CONFIG_TMPFS_INODE64=y +# CONFIG_TMPFS_QUOTA is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=m +CONFIG_EFIVAR_FS=m +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +CONFIG_ORANGEFS_FS=m +CONFIG_ADFS_FS=m +# CONFIG_ADFS_FS_RW is not set +CONFIG_AFFS_FS=m +CONFIG_ECRYPT_FS=m +CONFIG_ECRYPT_FS_MESSAGING=y +CONFIG_HFS_FS=m +CONFIG_HFSPLUS_FS=m +CONFIG_BEFS_FS=m +# CONFIG_BEFS_DEBUG is not set +CONFIG_BFS_FS=m +CONFIG_EFS_FS=m +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +CONFIG_UBIFS_FS=m +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UBIFS_FS_ZSTD=y +# CONFIG_UBIFS_ATIME_SUPPORT is not set +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_SECURITY=y +# CONFIG_UBIFS_FS_AUTHENTICATION is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=m +# CONFIG_SQUASHFS_FILE_CACHE is not set +CONFIG_SQUASHFS_FILE_DIRECT=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +# CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT is not set +# CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE is not set +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +CONFIG_VXFS_FS=m +CONFIG_MINIX_FS=m +CONFIG_OMFS_FS=m +CONFIG_HPFS_FS=m +CONFIG_QNX4FS_FS=m +CONFIG_QNX6FS_FS=m +# CONFIG_QNX6FS_DEBUG is not set +CONFIG_ROMFS_FS=m +# CONFIG_ROMFS_BACKED_BY_BLOCK is not set +# CONFIG_ROMFS_BACKED_BY_MTD is not set +CONFIG_ROMFS_BACKED_BY_BOTH=y +CONFIG_ROMFS_ON_BLOCK=y +CONFIG_ROMFS_ON_MTD=y +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240 +CONFIG_PSTORE_COMPRESS=y +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_FTRACE is not set +CONFIG_PSTORE_RAM=m +CONFIG_PSTORE_ZONE=m +CONFIG_PSTORE_BLK=m +CONFIG_PSTORE_BLK_BLKDEV="" +CONFIG_PSTORE_BLK_KMSG_SIZE=64 +CONFIG_PSTORE_BLK_MAX_REASON=2 +CONFIG_SYSV_FS=m +CONFIG_UFS_FS=m +# CONFIG_UFS_FS_WRITE is not set +# CONFIG_UFS_DEBUG is not set +CONFIG_EROFS_FS=m +# CONFIG_EROFS_FS_DEBUG is not set +CONFIG_EROFS_FS_XATTR=y +CONFIG_EROFS_FS_POSIX_ACL=y +CONFIG_EROFS_FS_SECURITY=y +CONFIG_EROFS_FS_ZIP=y +# CONFIG_EROFS_FS_ZIP_LZMA is not set +# CONFIG_EROFS_FS_ZIP_DEFLATE is not set +# CONFIG_EROFS_FS_PCPU_KTHREAD is not set +CONFIG_VBOXSF_FS=m +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=m +CONFIG_NFS_V2=m +CONFIG_NFS_V3=m +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=m +CONFIG_NFS_SWAP=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=m +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_NFS_FSCACHE=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DEBUG=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +CONFIG_NFS_V4_2_READ_PLUS=y +CONFIG_NFSD=m +# CONFIG_NFSD_V2 is not set +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_PNFS=y +CONFIG_NFSD_BLOCKLAYOUT=y +# CONFIG_NFSD_SCSILAYOUT is not set +# CONFIG_NFSD_FLEXFILELAYOUT is not set +# CONFIG_NFSD_V4_2_INTER_SSC is not set +CONFIG_NFSD_V4_SECURITY_LABEL=y +CONFIG_GRACE_PERIOD=m +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_NFS_V4_2_SSC_HELPER=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_SUNRPC_SWAP=y +CONFIG_RPCSEC_GSS_KRB5=m +CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA1=y +# CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_CAMELLIA is not set +# CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA2 is not set +CONFIG_SUNRPC_DEBUG=y +CONFIG_SUNRPC_XPRT_RDMA=m +CONFIG_CEPH_FS=m +CONFIG_CEPH_FSCACHE=y +CONFIG_CEPH_FS_POSIX_ACL=y +# CONFIG_CEPH_FS_SECURITY_LABEL is not set +CONFIG_CIFS=m +CONFIG_CIFS_STATS2=y +CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +CONFIG_CIFS_DEBUG=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set +CONFIG_CIFS_DFS_UPCALL=y +# CONFIG_CIFS_SWN_UPCALL is not set +# CONFIG_CIFS_SMB_DIRECT is not set +CONFIG_CIFS_FSCACHE=y +CONFIG_SMB_SERVER=m +# CONFIG_SMB_SERVER_SMBDIRECT is not set +CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y +# CONFIG_SMB_SERVER_KERBEROS5 is not set +CONFIG_SMBFS=m +CONFIG_CODA_FS=m +CONFIG_AFS_FS=m +# CONFIG_AFS_DEBUG is not set +CONFIG_AFS_FSCACHE=y +# CONFIG_AFS_DEBUG_CURSOR is not set +CONFIG_9P_FS=m +CONFIG_9P_FSCACHE=y +CONFIG_9P_FS_POSIX_ACL=y +CONFIG_9P_FS_SECURITY=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_MAC_ROMAN=m +CONFIG_NLS_MAC_CELTIC=m +CONFIG_NLS_MAC_CENTEURO=m +CONFIG_NLS_MAC_CROATIAN=m +CONFIG_NLS_MAC_CYRILLIC=m +CONFIG_NLS_MAC_GAELIC=m +CONFIG_NLS_MAC_GREEK=m +CONFIG_NLS_MAC_ICELAND=m +CONFIG_NLS_MAC_INUIT=m +CONFIG_NLS_MAC_ROMANIAN=m +CONFIG_NLS_MAC_TURKISH=m +CONFIG_NLS_UTF8=m +CONFIG_NLS_UCS2_UTILS=m +CONFIG_DLM=m +CONFIG_DLM_DEBUG=y +CONFIG_UNICODE=y +# CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +CONFIG_PERSISTENT_KEYRINGS=y +# CONFIG_TRUSTED_KEYS is not set +CONFIG_ENCRYPTED_KEYS=y +# CONFIG_USER_DECRYPTED_DATA is not set +CONFIG_KEY_DH_OPERATIONS=y +CONFIG_SECURITY_DMESG_RESTRICT=y +CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_INFINIBAND is not set +CONFIG_SECURITY_NETWORK_XFRM=y +CONFIG_SECURITY_PATH=y +CONFIG_INTEL_TXT=y +CONFIG_LSM_MMAP_MIN_ADDR=65536 +CONFIG_HARDENED_USERCOPY=y +CONFIG_FORTIFY_SOURCE=y +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_SECURITY_SELINUX=y +# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 +CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 +# CONFIG_SECURITY_SELINUX_DEBUG is not set +# CONFIG_SECURITY_SMACK is not set +CONFIG_SECURITY_TOMOYO=y +CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048 +CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024 +# CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set +CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init" +CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init" +# CONFIG_SECURITY_TOMOYO_INSECURE_BUILTIN_SETTING is not set +CONFIG_SECURITY_APPARMOR=y +# CONFIG_SECURITY_APPARMOR_DEBUG is not set +CONFIG_SECURITY_APPARMOR_INTROSPECT_POLICY=y +CONFIG_SECURITY_APPARMOR_HASH=y +CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y +CONFIG_SECURITY_APPARMOR_EXPORT_BINARY=y +CONFIG_SECURITY_APPARMOR_PARANOID_LOAD=y +# CONFIG_SECURITY_LOADPIN is not set +CONFIG_SECURITY_YAMA=y +# CONFIG_SECURITY_SAFESETID is not set +CONFIG_SECURITY_LOCKDOWN_LSM=y +CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y +CONFIG_LOCK_DOWN_KERNEL_FORCE_NONE=y +# CONFIG_LOCK_DOWN_KERNEL_FORCE_INTEGRITY is not set +# CONFIG_LOCK_DOWN_KERNEL_FORCE_CONFIDENTIALITY is not set +CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT=y +CONFIG_SECURITY_LANDLOCK=y +CONFIG_INTEGRITY=y +CONFIG_INTEGRITY_SIGNATURE=y +CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y +# CONFIG_INTEGRITY_TRUSTED_KEYRING is not set +CONFIG_INTEGRITY_PLATFORM_KEYRING=y +CONFIG_INTEGRITY_MACHINE_KEYRING=y +# CONFIG_INTEGRITY_CA_MACHINE_KEYRING is not set +CONFIG_LOAD_UEFI_KEYS=y +CONFIG_INTEGRITY_AUDIT=y +CONFIG_IMA=y +# CONFIG_IMA_KEXEC is not set +CONFIG_IMA_MEASURE_PCR_IDX=10 +CONFIG_IMA_LSM_RULES=y +# CONFIG_IMA_NG_TEMPLATE is not set +CONFIG_IMA_SIG_TEMPLATE=y +CONFIG_IMA_DEFAULT_TEMPLATE="ima-sig" +# CONFIG_IMA_DEFAULT_HASH_SHA1 is not set +CONFIG_IMA_DEFAULT_HASH_SHA256=y +# CONFIG_IMA_DEFAULT_HASH_SHA512 is not set +CONFIG_IMA_DEFAULT_HASH="sha256" +# CONFIG_IMA_WRITE_POLICY is not set +# CONFIG_IMA_READ_POLICY is not set +CONFIG_IMA_APPRAISE=y +CONFIG_IMA_ARCH_POLICY=y +# CONFIG_IMA_APPRAISE_BUILD_POLICY is not set +CONFIG_IMA_APPRAISE_BOOTPARAM=y +# CONFIG_IMA_APPRAISE_MODSIG is not set +# CONFIG_IMA_KEYRINGS_PERMIT_SIGNED_BY_BUILTIN_OR_SECONDARY is not set +CONFIG_IMA_MEASURE_ASYMMETRIC_KEYS=y +CONFIG_IMA_QUEUE_EARLY_BOOT_KEYS=y +CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT=y +# CONFIG_IMA_DISABLE_HTABLE is not set +CONFIG_EVM=y +CONFIG_EVM_ATTR_FSUUID=y +# CONFIG_EVM_ADD_XATTRS is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_APPARMOR=y +# CONFIG_DEFAULT_SECURITY_DAC is not set +CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,apparmor,selinux,smack,tomoyo,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y +# CONFIG_INIT_STACK_NONE is not set +# CONFIG_INIT_STACK_ALL_PATTERN is not set +CONFIG_INIT_STACK_ALL_ZERO=y +CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y +# CONFIG_ZERO_CALL_USED_REGS is not set +# end of Memory initialization + +# +# Hardening of kernel data structures +# +CONFIG_LIST_HARDENED=y +CONFIG_BUG_ON_DATA_CORRUPTION=y +# end of Hardening of kernel data structures + +CONFIG_RANDSTRUCT_NONE=y +# end of Kernel hardening options +# end of Security options + +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_ASYNC_PQ=m +CONFIG_ASYNC_RAID6_RECOV=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_FIPS=y +CONFIG_CRYPTO_FIPS_NAME="Linux Kernel Cryptographic API" +# CONFIG_CRYPTO_FIPS_CUSTOM_VERSION is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SIG2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_USER=m +# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set +# CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_NULL2=m +CONFIG_CRYPTO_PCRYPT=m +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_SIMD=m +CONFIG_CRYPTO_ENGINE=m +# end of Crypto core or helper + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_DH=y +# CONFIG_CRYPTO_DH_RFC7919_GROUPS is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=m +CONFIG_CRYPTO_ECDSA=y +CONFIG_CRYPTO_ECRDSA=m +# CONFIG_CRYPTO_SM2 is not set +CONFIG_CRYPTO_CURVE25519=m +# end of Public-key cryptography + +# +# Block ciphers +# +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_AES_TI=m +# CONFIG_CRYPTO_ARIA is not set +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_BLOWFISH_COMMON=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST_COMMON=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_SERPENT=m +# CONFIG_CRYPTO_SM4_GENERIC is not set +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +# end of Block ciphers + +# +# Length-preserving ciphers and modes +# +CONFIG_CRYPTO_ADIANTUM=m +CONFIG_CRYPTO_CHACHA20=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CFB=m +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_HCTR2 is not set +CONFIG_CRYPTO_KEYWRAP=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_OFB=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m +CONFIG_CRYPTO_NHPOLY1305=m +# end of Length-preserving ciphers and modes + +# +# AEAD (authenticated encryption with associated data) ciphers +# +CONFIG_CRYPTO_AEGIS128=m +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_GENIV=m +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_ECHAINIV=m +CONFIG_CRYPTO_ESSIV=m +# end of AEAD (authenticated encryption with associated data) ciphers + +# +# Hashes, digests, and MACs +# +CONFIG_CRYPTO_BLAKE2B=m +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_GHASH=m +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_POLY1305=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA3=y +# CONFIG_CRYPTO_SM3_GENERIC is not set +CONFIG_CRYPTO_STREEBOG=m +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_XXHASH=m +# end of Hashes, digests, and MACs + +# +# CRCs (cyclic redundancy checks) +# +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_CRC32=m +CONFIG_CRYPTO_CRCT10DIF=m +CONFIG_CRYPTO_CRC64_ROCKSOFT=m +# end of CRCs (cyclic redundancy checks) + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set +CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_LZ4HC=m +CONFIG_CRYPTO_ZSTD=m +# end of Compression + +# +# Random number generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_HASH=y +CONFIG_CRYPTO_DRBG_CTR=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_KDF800108_CTR=y +# end of Random number generation + +# +# Userspace interface +# +CONFIG_CRYPTO_USER_API=m +CONFIG_CRYPTO_USER_API_HASH=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +CONFIG_CRYPTO_USER_API_RNG=m +# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set +CONFIG_CRYPTO_USER_API_AEAD=m +# CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE is not set +# CONFIG_CRYPTO_STATS is not set +# end of Userspace interface + +CONFIG_CRYPTO_HASH_INFO=y + +# +# Accelerated Cryptographic Algorithms for CPU (x86) +# +CONFIG_CRYPTO_CURVE25519_X86=m +CONFIG_CRYPTO_AES_NI_INTEL=m +CONFIG_CRYPTO_BLOWFISH_X86_64=m +CONFIG_CRYPTO_CAMELLIA_X86_64=m +CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64=m +CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64=m +CONFIG_CRYPTO_CAST5_AVX_X86_64=m +CONFIG_CRYPTO_CAST6_AVX_X86_64=m +CONFIG_CRYPTO_DES3_EDE_X86_64=m +CONFIG_CRYPTO_SERPENT_SSE2_X86_64=m +CONFIG_CRYPTO_SERPENT_AVX_X86_64=m +CONFIG_CRYPTO_SERPENT_AVX2_X86_64=m +# CONFIG_CRYPTO_SM4_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_SM4_AESNI_AVX2_X86_64 is not set +CONFIG_CRYPTO_TWOFISH_X86_64=m +CONFIG_CRYPTO_TWOFISH_X86_64_3WAY=m +CONFIG_CRYPTO_TWOFISH_AVX_X86_64=m +# CONFIG_CRYPTO_ARIA_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_ARIA_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_ARIA_GFNI_AVX512_X86_64 is not set +CONFIG_CRYPTO_CHACHA20_X86_64=m +CONFIG_CRYPTO_AEGIS128_AESNI_SSE2=m +CONFIG_CRYPTO_NHPOLY1305_SSE2=m +CONFIG_CRYPTO_NHPOLY1305_AVX2=m +CONFIG_CRYPTO_BLAKE2S_X86=y +# CONFIG_CRYPTO_POLYVAL_CLMUL_NI is not set +CONFIG_CRYPTO_POLY1305_X86_64=m +CONFIG_CRYPTO_SHA1_SSSE3=m +CONFIG_CRYPTO_SHA256_SSSE3=m +CONFIG_CRYPTO_SHA512_SSSE3=m +# CONFIG_CRYPTO_SM3_AVX_X86_64 is not set +CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m +CONFIG_CRYPTO_CRC32C_INTEL=m +CONFIG_CRYPTO_CRC32_PCLMUL=m +CONFIG_CRYPTO_CRCT10DIF_PCLMUL=m +# end of Accelerated Cryptographic Algorithms for CPU (x86) + +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_DEV_PADLOCK=m +CONFIG_CRYPTO_DEV_PADLOCK_AES=m +CONFIG_CRYPTO_DEV_PADLOCK_SHA=m +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +CONFIG_CRYPTO_DEV_CCP=y +CONFIG_CRYPTO_DEV_CCP_DD=m +CONFIG_CRYPTO_DEV_SP_CCP=y +CONFIG_CRYPTO_DEV_CCP_CRYPTO=m +CONFIG_CRYPTO_DEV_SP_PSP=y +# CONFIG_CRYPTO_DEV_CCP_DEBUGFS is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +CONFIG_CRYPTO_DEV_QAT=m +CONFIG_CRYPTO_DEV_QAT_DH895xCC=m +CONFIG_CRYPTO_DEV_QAT_C3XXX=m +CONFIG_CRYPTO_DEV_QAT_C62X=m +# CONFIG_CRYPTO_DEV_QAT_4XXX is not set +CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m +CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m +CONFIG_CRYPTO_DEV_QAT_C62XVF=m +CONFIG_CRYPTO_DEV_CHELSIO=m +CONFIG_CRYPTO_DEV_VIRTIO=m +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS8_PRIVATE_KEY_PARSER=m +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +CONFIG_SIGNED_PE_FILE_VERIFICATION=y +# CONFIG_FIPS_SIGNATURE_SELFTEST is not set + +# +# Certificates for signature checking +# +# CONFIG_MODULE_SIG_KEY_TYPE_RSA is not set +CONFIG_MODULE_SIG_KEY_TYPE_ECDSA=y +CONFIG_SYSTEM_TRUSTED_KEYRING=y +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +CONFIG_SECONDARY_TRUSTED_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" +# CONFIG_SYSTEM_REVOCATION_LIST is not set +# CONFIG_SYSTEM_BLACKLIST_AUTH_UPDATE is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_CORDIC=m +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=m +CONFIG_CRYPTO_LIB_GF128MUL=m +CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA=m +CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_DES=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 +CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + +CONFIG_CRC_CCITT=y +CONFIG_CRC16=m +CONFIG_CRC_T10DIF=m +CONFIG_CRC64_ROCKSOFT=m +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC64=m +# CONFIG_CRC4 is not set +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m +CONFIG_CRC8=m +CONFIG_XXHASH=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_COMPRESS=m +CONFIG_LZ4HC_COMPRESS=m +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +# CONFIG_XZ_DEC_ARM is not set +# CONFIG_XZ_DEC_ARMTHUMB is not set +# CONFIG_XZ_DEC_SPARC is not set +# CONFIG_XZ_DEC_MICROLZMA is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_REED_SOLOMON=m +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_REED_SOLOMON_DEC16=y +CONFIG_BCH=m +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_BTREE=y +CONFIG_INTERVAL_TREE=y +CONFIG_XARRAY_MULTI=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_FLAGS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y +CONFIG_SWIOTLB=y +# CONFIG_SWIOTLB_DYNAMIC is not set +CONFIG_DMA_COHERENT_POOL=y +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +CONFIG_IOMMU_HELPER=y +CONFIG_CHECK_SIGNATURE=y +CONFIG_CPUMASK_OFFSTACK=y +# CONFIG_FORCE_NR_CPUS is not set +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_LRU_CACHE=m +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_SIGNATURE=y +CONFIG_DIMLIB=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_6x10 is not set +# CONFIG_FONT_10x18 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +CONFIG_FONT_TER16x32=y +# CONFIG_FONT_6x8 is not set +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_PMEM_API=y +CONFIG_MEMREGION=y +CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION=y +CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y +CONFIG_ARCH_HAS_COPY_MC=y +CONFIG_ARCH_STACKWALK=y +CONFIG_STACKDEPOT=y +CONFIG_SBITMAP=y +# end of Library routines + +CONFIG_PLDMFW=y + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +# CONFIG_STACKTRACE_BUILD_ID is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +CONFIG_BOOT_PRINTK_DELAY=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +CONFIG_AS_HAS_NON_CONST_LEB128=y +# CONFIG_DEBUG_INFO_NONE is not set +CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_DWARF5 is not set +# CONFIG_DEBUG_INFO_REDUCED is not set +CONFIG_DEBUG_INFO_COMPRESSED_NONE=y +# CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set +# CONFIG_DEBUG_INFO_COMPRESSED_ZSTD is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +CONFIG_DEBUG_INFO_BTF=y +CONFIG_PAHOLE_HAS_SPLIT_BTF=y +CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y +CONFIG_DEBUG_INFO_BTF_MODULES=y +CONFIG_MODULE_ALLOW_BTF_MISMATCH=y +# CONFIG_GDB_SCRIPTS is not set +CONFIG_FRAME_WARN=2048 +CONFIG_STRIP_ASM_SYMS=y +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B is not set +CONFIG_OBJTOOL=y +# CONFIG_VMLINUX_MAP is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x01b6 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_HAVE_ARCH_KCSAN=y +CONFIG_HAVE_KCSAN_COMPILER=y +# CONFIG_KCSAN is not set +# end of Generic Kernel Debugging Instruments + +# +# Networking Debugging +# +# CONFIG_NET_DEV_REFCNT_TRACKER is not set +# CONFIG_NET_NS_REFCNT_TRACKER is not set +# CONFIG_DEBUG_NET is not set +# end of Networking Debugging + +# +# Memory Debugging +# +CONFIG_PAGE_EXTENSION=y +# CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_TABLE_CHECK is not set +CONFIG_PAGE_POISONING=y +# CONFIG_DEBUG_PAGE_REF is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +CONFIG_DEBUG_WX=y +CONFIG_GENERIC_PTDUMP=y +CONFIG_PTDUMP_CORE=y +# CONFIG_PTDUMP_DEBUGFS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_PER_VMA_LOCK_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SHRINKER_DEBUG is not set +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_SCHED_STACK_END_CHECK=y +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +CONFIG_KFENCE=y +CONFIG_KFENCE_SAMPLE_INTERVAL=0 +CONFIG_KFENCE_NUM_OBJECTS=255 +# CONFIG_KFENCE_DEFERRABLE is not set +# CONFIG_KFENCE_STATIC_KEYS is not set +CONFIG_KFENCE_STRESS_TEST_FAULTS=0 +CONFIG_HAVE_ARCH_KMSAN=y +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_LOCKUP_DETECTOR=y +CONFIG_SOFTLOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y +CONFIG_HARDLOCKUP_DETECTOR=y +# CONFIG_HARDLOCKUP_DETECTOR_PREFER_BUDDY is not set +CONFIG_HARDLOCKUP_DETECTOR_PERF=y +# CONFIG_HARDLOCKUP_DETECTOR_BUDDY is not set +# CONFIG_HARDLOCKUP_DETECTOR_ARCH is not set +CONFIG_HARDLOCKUP_DETECTOR_COUNTS_HRTIMER=y +CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y +# CONFIG_BOOTPARAM_HARDLOCKUP_PANIC is not set +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_WQ_CPU_INTENSIVE_REPORT is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +CONFIG_SCHEDSTATS=y +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set +# CONFIG_DEBUG_PREEMPT is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_NMI_CHECK_CPU is not set +# CONFIG_DEBUG_IRQFLAGS is not set +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set + +# +# Debug kernel data structures +# +CONFIG_DEBUG_LIST=y +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_MAPLE_TREE is not set +# end of Debug kernel data structures + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 +# CONFIG_RCU_CPU_STALL_CPUTIME is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_DEBUG_CGROUP_REF is not set +CONFIG_USER_STACKTRACE_SUPPORT=y +CONFIG_NOP_TRACER=y +CONFIG_HAVE_RETHOOK=y +CONFIG_RETHOOK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y +CONFIG_HAVE_DYNAMIC_FTRACE_NO_PATCHABLE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_FENTRY=y +CONFIG_HAVE_OBJTOOL_MCOUNT=y +CONFIG_HAVE_OBJTOOL_NOP_MCOUNT=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y +CONFIG_BUILDTIME_MCOUNT_SORT=y +CONFIG_TRACER_MAX_TRACE=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_BOOTTIME_TRACING is not set +CONFIG_FUNCTION_TRACER=y +CONFIG_FUNCTION_GRAPH_TRACER=y +# CONFIG_FUNCTION_GRAPH_RETVAL is not set +CONFIG_DYNAMIC_FTRACE=y +CONFIG_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y +CONFIG_DYNAMIC_FTRACE_WITH_ARGS=y +CONFIG_FPROBE=y +# CONFIG_FUNCTION_PROFILER is not set +CONFIG_STACK_TRACER=y +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_HWLAT_TRACER is not set +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set +CONFIG_MMIOTRACE=y +CONFIG_FTRACE_SYSCALLS=y +CONFIG_TRACER_SNAPSHOT=y +# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_FPROBE_EVENTS=y +CONFIG_PROBE_EVENTS_BTF_ARGS=y +CONFIG_KPROBE_EVENTS=y +# CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set +CONFIG_UPROBE_EVENTS=y +CONFIG_BPF_EVENTS=y +CONFIG_DYNAMIC_EVENTS=y +CONFIG_PROBE_EVENTS=y +CONFIG_FTRACE_MCOUNT_RECORD=y +CONFIG_FTRACE_MCOUNT_USE_CC=y +CONFIG_TRACING_MAP=y +CONFIG_SYNTH_EVENTS=y +# CONFIG_USER_EVENTS is not set +CONFIG_HIST_TRIGGERS=y +# CONFIG_TRACE_EVENT_INJECT is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_TRACE_EVAL_MAP_FILE is not set +# CONFIG_FTRACE_RECORD_RECURSION is not set +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_FTRACE_SORT_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set +# CONFIG_MMIOTRACE_TEST is not set +# CONFIG_PREEMPTIRQ_DELAY_TEST is not set +# CONFIG_SYNTH_EVENT_GEN_TEST is not set +# CONFIG_KPROBE_EVENT_GEN_TEST is not set +# CONFIG_HIST_TRIGGERS_DEBUG is not set +# CONFIG_RV is not set +# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +CONFIG_IO_STRICT_DEVMEM=y + +# +# x86 Debugging +# +# CONFIG_X86_VERBOSE_BOOTUP is not set +CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK_DBGP is not set +# CONFIG_EARLY_PRINTK_USB_XDBC is not set +# CONFIG_EFI_PGT_DUMP is not set +# CONFIG_DEBUG_TLBFLUSH is not set +# CONFIG_IOMMU_DEBUG is not set +CONFIG_HAVE_MMIOTRACE_SUPPORT=y +# CONFIG_X86_DECODER_SELFTEST is not set +CONFIG_IO_DELAY_0X80=y +# CONFIG_IO_DELAY_0XED is not set +# CONFIG_IO_DELAY_UDELAY is not set +# CONFIG_IO_DELAY_NONE is not set +# CONFIG_DEBUG_BOOT_PARAMS is not set +# CONFIG_CPA_DEBUG is not set +# CONFIG_DEBUG_ENTRY is not set +# CONFIG_DEBUG_NMI_SELFTEST is not set +CONFIG_X86_DEBUG_FPU=y +# CONFIG_PUNIT_ATOM_DEBUG is not set +CONFIG_UNWINDER_ORC=y +# CONFIG_UNWINDER_FRAME_POINTER is not set +# end of x86 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +CONFIG_NOTIFIER_ERROR_INJECTION=m +CONFIG_PM_NOTIFIER_ERROR_INJECT=m +# CONFIG_NETDEV_NOTIFIER_ERROR_INJECT is not set +# CONFIG_FUNCTION_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_TEST_DHRY is not set +# CONFIG_LKDTM is not set +# CONFIG_TEST_MIN_HEAP is not set +# CONFIG_TEST_DIV64 is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_TEST_REF_TRACKER is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_ASYNC_RAID6_TEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_STRING_SELFTEST is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_SCANF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_MAPLE_TREE is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +CONFIG_TEST_USER_COPY=m +CONFIG_TEST_BPF=m +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +CONFIG_TEST_FIRMWARE=m +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +CONFIG_TEST_STATIC_KEYS=m +# CONFIG_TEST_DYNAMIC_DEBUG is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_LIVEPATCH is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_FPU is not set +# CONFIG_TEST_CLOCKSOURCE_WATCHDOG is not set +CONFIG_ARCH_USE_MEMTEST=y +CONFIG_MEMTEST=y +# CONFIG_HYPERV_TESTING is not set +# end of Kernel Testing and Coverage + +# +# Rust hacking +# +# end of Rust hacking +# end of Kernel hacking \ No newline at end of file diff --git a/scripts/package/truenas/postinst b/scripts/package/truenas/postinst new file mode 100644 index 000000000000..8aab94aa57a1 --- /dev/null +++ b/scripts/package/truenas/postinst @@ -0,0 +1,22 @@ +#!/bin/sh -e + +image_path=/boot/vmlinuz-$version + +if [ "$1" != configure ]; then + exit 0 +fi + +depmod $version + +if [ -f /lib/modules/$version/.fresh-install ]; then + change=install +else + change=upgrade +fi +linux-update-symlinks $change $version $image_path +rm -f /lib/modules/$version/.fresh-install + +if [ -d /etc/kernel/postinst.d ]; then + DEB_MAINT_PARAMS="$*" run-parts --report --exit-on-error --arg=$version \ + --arg=$image_path /etc/kernel/postinst.d +fi diff --git a/scripts/package/truenas/postrm b/scripts/package/truenas/postrm new file mode 100644 index 000000000000..ddd9b9a391b0 --- /dev/null +++ b/scripts/package/truenas/postrm @@ -0,0 +1,30 @@ +#!/bin/sh -e + +image_path=/boot/vmlinuz-$version + +rm -f /lib/modules/$version/.fresh-install + +if [ "$1" != upgrade ] && command -v linux-update-symlinks >/dev/null; then + linux-update-symlinks remove $version $image_path +fi + +if [ -d /etc/kernel/postrm.d ]; then + DEB_MAINT_PARAMS="$*" run-parts --report --exit-on-error --arg=$version \ + --arg=$image_path /etc/kernel/postrm.d +fi + +if [ "$1" = purge ]; then + for extra_file in modules.dep modules.isapnpmap modules.pcimap \ + modules.usbmap modules.parportmap \ + modules.generic_string modules.ieee1394map \ + modules.ieee1394map modules.pnpbiosmap \ + modules.alias modules.ccwmap modules.inputmap \ + modules.symbols modules.ofmap \ + modules.seriomap modules.\*.bin \ + modules.softdep modules.devname; do + eval rm -f /lib/modules/$version/$extra_file + done + rmdir /lib/modules/$version || true +fi + +exit 0 diff --git a/scripts/package/truenas/preinst b/scripts/package/truenas/preinst new file mode 100644 index 000000000000..570c0c23b300 --- /dev/null +++ b/scripts/package/truenas/preinst @@ -0,0 +1,20 @@ +#!/bin/sh -e + +image_path=/boot/vmlinuz-$version + +if [ "$1" = abort-upgrade ]; then + exit 0 +fi + +if [ "$1" = install ]; then + # Create a flag file for postinst + mkdir -p /lib/modules/$version + touch /lib/modules/$version/.fresh-install +fi + +if [ -d /etc/kernel/preinst.d ]; then + DEB_MAINT_PARAMS="$*" run-parts --report --exit-on-error --arg=$version \ + --arg=$image_path /etc/kernel/preinst.d +fi + +exit 0 diff --git a/scripts/package/truenas/prerm b/scripts/package/truenas/prerm new file mode 100644 index 000000000000..48aa54f4aff8 --- /dev/null +++ b/scripts/package/truenas/prerm @@ -0,0 +1,16 @@ +#!/bin/sh -e + +image_path=/boot/vmlinuz-$version + +if [ "$1" != remove ]; then + exit 0 +fi + +linux-check-removal $version + +if [ -d /etc/kernel/prerm.d ]; then + DEB_MAINT_PARAMS="$*" run-parts --report --exit-on-error --arg=$version \ + --arg=$image_path /etc/kernel/prerm.d +fi + +exit 0 diff --git a/scripts/package/truenas/tn-debug.config b/scripts/package/truenas/tn-debug.config new file mode 100644 index 000000000000..4955ed5fd108 --- /dev/null +++ b/scripts/package/truenas/tn-debug.config @@ -0,0 +1,18 @@ +CONFIG_KGDB=y +CONFIG_KGDB_KDB=y +CONFIG_KDB_KEYBOARD=y +CONFIG_KGDB_SERIAL_CONSOLE=y +CONFIG_GDB_SCRIPTS=y +CONFIG_DEBUG_INFO_NONE=n +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_INFO_BTF=y +CONFIG_DEBUG_INFO_BTF_MODULES=y +CONFIG_DEBUG_INFO_REDUCED=n +CONFIG_DEBUG_KERNEL=y +CONFIG_FRAME_POINTER=y +CONFIG_RANDOMIZE_BASE=n +CONFIG_RANDOMIZE_MEMORY=n +CONFIG_STRICT_KERNEL_RWX=n +CONFIG_DEBUG_RODATA=n +CONFIG_DEBUG_INFO_DWARF5=y +CONFIG_KALLSYMS=y diff --git a/scripts/package/truenas/tn-production.config b/scripts/package/truenas/tn-production.config new file mode 100644 index 000000000000..f422b00a40ff --- /dev/null +++ b/scripts/package/truenas/tn-production.config @@ -0,0 +1,28 @@ +# +# Disable debug options +# +CONFIG_SLUB_DEBUG=n +CONFIG_PM_DEBUG=n +CONFIG_PM_ADVANCED_DEBUG=n +CONFIG_PM_SLEEP_DEBUG=n +CONFIG_BLK_DEBUG_FS=n +CONFIG_AIC7XXX_DEBUG_ENABLE=n +CONFIG_AIC79XX_DEBUG_ENABLE=n +CONFIG_MLX4_DEBUG=n +CONFIG_INFINIBAND_MTHCA_DEBUG=n +CONFIG_INFINIBAND_IPOIB_DEBUG=n +CONFIG_OCFS2_DEBUG_MASKLOG=n +CONFIG_CIFS_DEBUG=n +CONFIG_DLM_DEBUG=n +CONFIG_DEBUG_MEMORY_INIT=n +CONFIG_SCHED_DEBUG=n +CONFIG_DEBUG_LIST=n +CONFIG_X86_DEBUG_FPU=n +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=6 + +# +# Enable debug info +# +CONFIG_DEBUG_INFO_NONE=n +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_INFO_BTF=y diff --git a/scripts/package/truenas/truenas.config b/scripts/package/truenas/truenas.config new file mode 100644 index 000000000000..a48d4903a6a3 --- /dev/null +++ b/scripts/package/truenas/truenas.config @@ -0,0 +1,161 @@ +# +# General setup +# +CONFIG_LOCALVERSION="+truenas" +CONFIG_TRUENAS=y +# end of General setup + +# +# Processor type and features +# +CONFIG_ARCH_FORCE_MAX_ORDER=14 +# end of Processor type and features + +# CONFIG_MODULE_SIG_ALL is not set + +# +# Memory Management options +# +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=19 +CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_CMA_ALIGNMENT=12 +# end of Memory Management options + +# +# Device Drivers +# + +# +# Generic fallback / legacy drivers +# +CONFIG_NTB_NETDEV=m + +# +# SCSI device support +# +# CONFIG_SCSI_CHELSIO_FCOE is not set +# end of SCSI device support + +# CONFIG_CHELSIO_T4_FCOE is not set + +CONFIG_NTB=m +CONFIG_NTB_AMD=m +CONFIG_NTB_MSI=y +CONFIG_NTB_INTEL=m +CONFIG_NTB_PLX=m +CONFIG_NTB_PINGPONG=m +CONFIG_NTB_TOOL=m +CONFIG_NTB_PERF=m +CONFIG_NTB_MSI_TEST=m +CONFIG_NTB_SPLIT=m +CONFIG_NTB_TRANSPORT=m +# end of Device Drivers + +# +# Certificates for signature checking +# +CONFIG_MODULE_SIG_KEY="" +CONFIG_SYSTEM_TRUSTED_KEYS="debian/certs/debian-uefi-certs.pem" +# end of Certificates for signature checking + +# +# Library routines +# +CONFIG_DMA_CMA=y +# end of Library routines + +# +# Override SATA Link Power Management Policy for "mobile" chipsets from Debian. +# ATA_LPM_UNKNOWN is the default for non-mobile chipsets, aka "max_performance". +# +CONFIG_SATA_MOBILE_LPM_POLICY=0 + +# +# Disable init_on_alloc to improve ZFS performance. ZFS allocates and frees +# pages frequently, and init_on_alloc zeroes out the pages during allocation. +# Disabling init_on_alloc should improve ZFS performance. +# +CONFIG_INIT_ON_ALLOC_DEFAULT_ON=n + +# +# Allow userspace (root) access to all IO memory. /dev/mem allows +# userspace access to memory ranges that may or may not be actively +# used by a driver. Required for plx_eeprom utility. +# +CONFIG_IO_STRICT_DEVMEM=n + +# +# Disable Bluetooth +# +CONFIG_BT=n + +# +# Disable NFC +# +CONFIG_NFC=n + +# +# Disable CAN +# +CONFIG_CAN=n + +# +# Disable WiFi and Wireless +# +CONFIG_WLAN=n +CONFIG_WIRELESS=n + +# +# Disable Joystick +# +CONFIG_INPUT_JOYSTICK=n + +# +# Disable Sony MemoryStick +# +CONFIG_MEMSTICK=n + +# +# Disable SoundWire +# +CONFIG_SOUNDWIRE=n + +# +# Disable Chelsio T4 DCB +# Users with Chelsio T4 are being spammed on the console about TX Packet +# without VLAN Tag on DCB Link +# +CONFIG_CHELSIO_T4_DCB=n + +# +# Debian has defaulted to compressing the modules in XZ format. This +# introduces some changes that are not desired. The debug info/symbols +# for modules are not stripped anymore. As a result, the size of modules +# increases ten folds. Previosuly, the debug symbols for modules and +# kernel were packaged separately in a -dbg package. But after this +# config update, -dbg package only contains symbols for kernel binary +# itself. Kernel modules have in built debug symbols. The size of ISO +# image increses 3-4 times because of this. Revert to preveious state +# for this config. +# +CONFIG_MODULE_COMPRESS_NONE=y +CONFIG_MODULE_COMPRESS_XZ=n + +# +# Temporary disable new Multi-Gen LRU, trying to evict and swap out +# too much of page cache when ARC consumes the most of memory, making +# WebUI, middleware and random user-space applications unresponsive. +CONFIG_LRU_GEN_ENABLED=n + +# +# Disable Multiple Device (md) driver. TrueNAS does not utilize this +# driver and we don't support this in the field either. +CONFIG_MD=n + +# +# Compile Linux kernel with warnings as errors +# +CONFIG_WERROR=y