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Peter Hedinger 2014-12-12 12:51:52 GMT
The RGMII layer is using two ports with interrupts for the RXER and RXDV. When there are 8 cores active then it is not possible to guarantee that the interrupt from the error port will taken because the interrupt goes in an issue slot and the thread only gets to issue every other byte. By the time the interrupt from the error tries to fire the DV interrupt has come along and taken priority.
Since the RXER is PORT_1A (0x10200) and RXDV is PORT_1B (0x10000) the DV will always take priority. If we had noticed this earlier we should have swapped the ports so that the error port was higher priority.
Peter Hedinger 2014-12-15 10:19:42 GMT
It looks like it is also possible for an error on the last but one byte can also fail to be detected because of where the instructions are in the pipe meaning that the error interrupt is squashed by the end of frame interrupt.
The text was updated successfully, but these errors were encountered:
http://bugzilla.xmos.local/show_bug.cgi?id=16233
Peter Hedinger 2014-12-12 12:51:52 GMT
The RGMII layer is using two ports with interrupts for the RXER and RXDV. When there are 8 cores active then it is not possible to guarantee that the interrupt from the error port will taken because the interrupt goes in an issue slot and the thread only gets to issue every other byte. By the time the interrupt from the error tries to fire the DV interrupt has come along and taken priority.
Since the RXER is PORT_1A (0x10200) and RXDV is PORT_1B (0x10000) the DV will always take priority. If we had noticed this earlier we should have swapped the ports so that the error port was higher priority.
Peter Hedinger 2014-12-15 10:19:42 GMT
It looks like it is also possible for an error on the last but one byte can also fail to be detected because of where the instructions are in the pipe meaning that the error interrupt is squashed by the end of frame interrupt.
The text was updated successfully, but these errors were encountered: