fix(zacas): fix check exception for amocas.

Check illegal instruction before trigger check and misalign check. check misalign for 128-bit amocas.q
OpenXiangShan · Dec 3, 2024 · 76ffe24 · 76ffe24
1 parent 1761183
commit 76ffe24
Showing 1 changed file with 9 additions and 6 deletions.
diff --git a/src/isa/riscv64/instr/rva/amo.c b/src/isa/riscv64/instr/rva/amo.c
@@ -24,6 +24,15 @@ __attribute__((cold))
 def_rtl(amo_slow_path, rtlreg_t *dest, const rtlreg_t *src1, const rtlreg_t *src2) {
   uint32_t funct5 = s->isa.instr.r.funct7 >> 2;
   int width = s->isa.instr.r.funct3 & 1 ? 8 : 4;
+  width = BITS(s->isa.instr.r.funct3, 2, 2) == 0 ? width : 16;
+
+  if (funct5 == 0b00101) { // amocas
+    int rd = s->isa.instr.r.rd;
+    int rs2 = s->isa.instr.r.rs2;
+    if (width == 16 && ((rd % 2 == 1) || (rs2 % 2 == 1))) { // amocas.q 128-bit
+      longjmp_exception(EX_II);
+    }
+  }
 
 #ifdef CONFIG_TDATA1_MCONTROL6
   trig_action_t action = TRIG_ACTION_NONE;
@@ -90,12 +99,6 @@ def_rtl(amo_slow_path, rtlreg_t *dest, const rtlreg_t *src1, const rtlreg_t *src
 
 #ifdef CONFIG_RV_ZACAS
   if (funct5 == 0b00101) { // amocas
-    width = BITS(s->isa.instr.r.funct3, 2, 2) == 0 ? width : 16;
-    int rd = s->isa.instr.r.rd;
-    int rs2 = s->isa.instr.r.rs2;
-    if (width == 16 && ((rd % 2 == 1) || (rs2 % 2 == 1))) {
-      longjmp_exception(EX_II);
-    }
     cpu.amo = true;
     switch (width) {
       case 4: