fix(dbltrp): align logic of sdt with xiangshan #60
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lewislzh
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* align vsstatus.sdt/henvcfg.DTE interaction logic with xiangshan
* as vsstatus is not aliase of otther CSR fields and SDT is controlled
by henvcfg.DTE. According to the manual, when the read/write property
of **sdt** changes from **RO** to **RW**, its immediate value becomes
**UNSPECIFIED** but valid. XiangShan adopts the simplest hardware
implementation, allowing **vsstatus.sdt** to be written when **DTE**
is disabled, while reads are masked by **DTE**. In contrast, Spike
employs a design where both reads and writes are masked. To align the
behavior of **vsstatus.sdt** in Spike with XiangShan during comparison,
we adjust Spike's write behavior under **DTE**-disabled conditions to match XiangShan's.
* add mstatus.sdt/sie, mstatus.mdt/mie missing interatcion logic.
when sdt/mdt write 1, sie/mie will clear.
huxuan0307
approved these changes
Nov 28, 2024
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