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Xor pre flag test case bug #94

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Xor pre flag test case bug #94

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040f502
adds andPreFlagTestCase
Oct 27, 2022
b16a13e
demonstrates bug with xorPreFlagTestCase
Oct 27, 2022
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29 changes: 29 additions & 0 deletions test/TinyRAM/Spec/EndToEndSpec.hs
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Original file line number Diff line number Diff line change
Expand Up @@ -37,13 +37,15 @@ spec = describe "TinyRAM end to end" $ do
andTestCase
andTestNegativeCase
--andFlagTestCase bugged reported
andPreFlagTestCase
cjmpTestCase
jmpTestExampleNonTermCase
negativeTestCase
negative8bitTestCase
orTestCase
orFlagTestCase
--xorTestCase --bugged reported
xorPreFlagTestCase
addTestNegativeTestCase
subTestCase
--notTestCase --negative answer bugged
Expand Down Expand Up @@ -194,6 +196,20 @@ andTestCase =
-- answer <- execute program (InputTape []) (InputTape [])
-- answer `shouldBe` Right 0

andPreFlagTestCase :: Spec
andPreFlagTestCase =
it "answers 0" $ do
let program =
construct
[ Mov (reg' 0) (imm 0),
Cmov (reg' 0) (imm 1),
Mov (reg' 2) (imm 58),
And (reg' 3) (reg' 2) (imm 15),
Answer (reg 0)
]
answer <- execute program (InputTape []) (InputTape [])
answer `shouldBe` Right 0

--; TinyRAM V=1.000 W=16 K=16
--mov r2, 58
--and r1, r2, -15
Expand Down Expand Up @@ -741,6 +757,19 @@ orFlagTestCase =
-- answer <- execute program (InputTape []) (InputTape [])
-- answer `shouldBe` Right 15

xorPreFlagTestCase :: Spec
xorPreFlagTestCase =
it "answers 15" $ do
let program =
construct
[ Mov (reg' 2) (imm 15),
Cmov (reg' 0) (imm 1),
Xor (reg' 0) (reg' 2) (reg 2),
Answer (reg 0)
]
answer <- execute program (InputTape []) (InputTape [])
answer `shouldBe` Right 15

addTestNegativeTestCase :: Spec
addTestNegativeTestCase =
it "answers 3" $ do
Expand Down