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Update testbench so with RAM code, passing.
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bsdevlin authored and bsdevlin committed Sep 28, 2019
1 parent 56e79da commit 3902713
Showing 1 changed file with 8 additions and 7 deletions.
15 changes: 8 additions & 7 deletions zcash_fpga/src/tb/bls12_381_top_tb.sv
Original file line number Diff line number Diff line change
Expand Up @@ -844,15 +844,16 @@ task init_ram();
$fclose(fd);
end

// Now shift in data
for (int j = ((max_rams*381+31)/32); j >= 0; j--) begin
axi_lite_if.poke(.addr(32'h18), .data(dat_flat[j*32 +: 32]));
axi_lite_if.poke(.addr(32'h1c), .data(32'h02));
if (eod == 0) begin
// Now shift in data
for (int j = ((max_rams*381+31)/32); j >= 0; j--) begin
axi_lite_if.poke(.addr(32'h18), .data(dat_flat[j*32 +: 32]));
axi_lite_if.poke(.addr(32'h1c), .data(32'h02));
end
axi_lite_if.poke(.addr(32'h1c), .data(32'h01));
nxt_line++;
end

axi_lite_if.poke(.addr(32'h1c), .data(32'h01));
nxt_line++;

end

$display("INFO: Finished writing all RAMS", dat);
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