Do not re-enable the timer when the user request a PWM frequency of 0. #56
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
This is a tentative fix for for issue #55. I tested that this fix it on a SAMD10 chip (that, setting the PWM freq to 0 will now fully stop the PWM output). I did not test it on SAMD09 or SAMD21 chips (as I don’t have compatible hardware to test).
I’m not entirely convinced by this PR, because it might be more logical to stop the output with a call to setting the PMW value rather than the frequency. However, the current
PWMWrite
method in the firmware does not disable the PMW output (as opposed to thesetFreq
method that I’m changing), so this PR is a smaller change.