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update(port/ohci): update ohci common code
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# Note | ||
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This OHCI is a companion controller of EHCI. | ||
This OHCI is a companion controller of EHCI. But you can use OHCI only without CONFIG_USB_EHCI_WITH_OHCI definition. | ||
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**And you need to pay for using OHCI driver**. | ||
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## Support Chip List | ||
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### AllwinnerTech | ||
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- F133 | ||
- F133(EHCI + OHCI) | ||
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### Nuvoton | ||
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- Nuvoton all series | ||
- Nuvoton all series(EHCI + OHCI, OHCI only) | ||
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### Artinchip | ||
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- d13x, d21x | ||
- d13x, d21x(EHCI + OHCI) | ||
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### NXP | ||
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- LPC4X/LPC5X(OHCI only) |
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#include "fsl_device_registers.h" | ||
#include "fsl_power.h" | ||
#include "usbh_core.h" | ||
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#if defined(CONFIG_USB_EHCI_WITH_OHCI) | ||
#error "lpc does not have ehci" | ||
#endif | ||
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void usb_hc_low_level_init(struct usbh_bus *bus) | ||
{ | ||
#if ((defined FSL_FEATURE_SOC_SYSMPU_COUNT) && (FSL_FEATURE_SOC_SYSMPU_COUNT)) | ||
SYSMPU_Enable(SYSMPU, 0); | ||
#endif /* FSL_FEATURE_SOC_SYSMPU_COUNT */ | ||
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NVIC_ClearPendingIRQ(USB0_IRQn); | ||
NVIC_ClearPendingIRQ(USB0_NEEDCLK_IRQn); | ||
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POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*< Turn on USB0 Phy */ | ||
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RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn); | ||
RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn); | ||
RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn); | ||
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CLOCK_EnableUsbfs0HostClock(kCLOCK_UsbfsSrcPll1, 48000000U); | ||
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NVIC_SetPriority(USB0_IRQn, 3); | ||
EnableIRQ(USB0_IRQn); | ||
} | ||
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void usb_hc_low_level_deinit(struct usbh_bus *bus) | ||
{ | ||
DisableIRQ(USB0_IRQn); | ||
} | ||
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void USB0_IRQHandler(void) | ||
{ | ||
extern void USBH_IRQHandler(uint8_t busid); | ||
USBH_IRQHandler(0); | ||
} |
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