Stm32f429 otgfs (#14)

Merge branch stm32f429_otgfs
Github issue #9

Makefile

@@ -48,6 +48,8 @@ help all:
 	@echo '  32l476rg-nucleo'
 	@echo '  stm32l476rg   CDC loopback demo for STM32L476xG based boards'
 	@echo '  stm32l052x8   CDC loopback demo for STM32L052x8 based boards'
+	@echo '  32f429zi-nucleo'
+	@echo '  stm32f429xi   CDC loopback demo for STM32F429xI based boards'
 	@echo '  doc           DOXYGEN documentation'
 	@echo '  module        static library module using following envars (defaults)'
 	@echo '                MODULE  module name (libusb.a)'
@@ -136,4 +138,10 @@ stm32l476xg 32l476rg-nucleo:
 	@$(MAKE) clean demo STARTUP='$(CMSISDEV)/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l476xx.s' \
 						LDSCRIPT='demo/stm32l476xg.ld' \
 						DEFINES='STM32L4 STM32L476xx USBD_SOF_DISABLED' \
-						CFLAGS='-mcpu=cortex-m4 -mthumb'
+						CFLAGS='-mcpu=cortex-m4 -mthumb'
+
+stm32f429xi 32f429zi-nucleo:
+	@$(MAKE) clean demo STARTUP='$(CMSISDEV)/ST/STM32F4xx/Source/Templates/gcc/startup_stm32f429xx.s' \
+						LDSCRIPT='demo/stm32f429xi.ld' \
+						DEFINES='STM32F4 STM32F429xx USBD_SOF_DISABLED' \
+						CFLAGS='-mcpu=cortex-m4 -mthumb'

demo/cdc_loop.c

@@ -297,6 +297,9 @@ static void cdc_init_usbd(void) {
 #elif defined(STM32F103x6)
     #define USB_HANDLER     USB_LP_CAN1_RX0_IRQHandler
     #define USB_NVIC_IRQ    USB_LP_CAN1_RX0_IRQn
+#elif defined(STM32F429xx)
+    #define USB_HANDLER     OTG_FS_IRQHandler
+    #define USB_NVIC_IRQ    OTG_FS_IRQn
 #else
     #error Not supported
 #endif

demo/cdc_startup.c

@@ -91,6 +91,24 @@ static void cdc_init_rcc (void) {
     /* switch to PLL */
     _BMD(RCC->CFGR, RCC_CFGR_SW, RCC_CFGR_SW_PLL);
     _WVL(RCC->CFGR, RCC_CFGR_SWS, RCC_CFGR_SWS_PLL);
+
+#elif defined(STM32F429xx)
+    /* set flash latency 2WS */
+    _BMD(FLASH->ACR, FLASH_ACR_LATENCY, FLASH_ACR_LATENCY_2WS);
+    /* setting up PLL 16MHz HSI, VCO=144MHz, PLLP = 72MHz PLLQ = 48MHz  */
+    _BMD(RCC->PLLCFGR,
+        RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLQ | RCC_PLLCFGR_PLLP,
+        _VAL2FLD(RCC_PLLCFGR_PLLM, 8) | _VAL2FLD(RCC_PLLCFGR_PLLN, 72) | _VAL2FLD(RCC_PLLCFGR_PLLQ, 3));
+    /* enabling PLL */
+    _BST(RCC->CR, RCC_CR_PLLON);
+    _WBS(RCC->CR, RCC_CR_PLLRDY);
+    /* switching to PLL */
+    _BMD(RCC->CFGR, RCC_CFGR_SW, RCC_CFGR_SW_PLL);
+    _WVL(RCC->CFGR, RCC_CFGR_SWS, RCC_CFGR_SWS_PLL);
+    /* enabling GPIOA and setting PA11 and PA12 to AF10 (USB_FS) */
+    _BST(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);
+    _BST(GPIOA->AFR[1], (0x0A << 12) | (0x0A << 16));
+    _BMD(GPIOA->MODER, (0x03 << 22) | (0x03 << 24), (0x02 << 22) | (0x02 << 24));
 #else
     #error Not supported
 #endif

demo/stm32f429xi.ld

@@ -0,0 +1,95 @@
+ENTRY(Reset_Handler)
+MEMORY
+{
+    ROM    (rx): ORIGIN = 0x08000000, LENGTH = 2048K
+    BANK0  (rx): ORIGIN = 0x08000000, LENGTH = 1024K
+    BANK1  (rx): ORIGIN = 0x08100000, LENGTH = 1024K
+    RAM   (rwx): ORIGIN = 0x20000000, LENGTH = 192K
+    SRAM1 (rwx): ORIGIN = 0x20000000, LENGTH = 112K
+    SRAM2 (rwx): ORIGIN = 0x2001C000, LENGTH = 16K
+    SRAM3 (rwx): ORIGIN = 0x20020000, LENGTH = 64K
+    CMRAM (rwx): ORIGIN = 0x10000000, LENGTH = 64K
+}
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.isr_vector))
+		*(.text*)
+		KEEP(*(.init))  KEEP(*(.fini))
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+		*crtbegin.o(.dtors)
+		*crtbegin?.o(.dtors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o).dtors)
+		*(SORT(.dtors.*))
+		*(.dtors)
+		*(.rodata*)
+		KEEP(*(.eh_frame*))
+	} > ROM
+    .ARM.extab :
+    {
+    	*(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > ROM
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > ROM
+	__exidx_end = .;
+	__etext = .;
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+		. = ALIGN(4);
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+		. = ALIGN(4);
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+		. = ALIGN(4);
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+		. = ALIGN(4);
+		__data_end__ = .;
+	} > RAM
+	.bss (NOLOAD) :
+	{
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		__bss_end__ = .;
+	} > RAM
+	.heap (NOLOAD) :
+	{
+		__end__ = .;
+		*(.heap*)
+		__HeapLimit = .;
+	} > RAM
+	.stack_dummy (NOLOAD) :
+	{
+		*(.stack)
+	} > RAM
+
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+
+	PROVIDE(_estack = __stack);
+	PROVIDE(_sidata = __etext);
+	PROVIDE(_sdata = __data_start__);
+	PROVIDE(_edata = __data_end__);
+	PROVIDE(_sbss = __bss_start__);
+	PROVIDE(_ebss = __bss_end__);
+}

inc/usb.h

@@ -61,7 +61,7 @@
     #endif
     #endif
 
-#elif defined(STM32L476xx)
+#elif defined(STM32L475xx) || defined(STM32L476xx)
 
     #define USBD_STM32L476
 
@@ -70,6 +70,15 @@
     #define usbd_hw usbd_otgfs
     #endif
 
+#elif defined(STM32F429xx)
+
+    #define USBD_STM32F429
+
+    #if !defined(__ASSEMBLER__)
+    extern const struct usbd_driver usbd_otgfs;
+    #define usbd_hw usbd_otgfs
+    #endif
+
 #elif defined(STM32F102x6) || defined(STM32F102xB) || \
       defined(STM32F103x6) || defined(STM32F103xB) || \
       defined(STM32F103xE) || defined(STM32F103xG) || \

inc/usbd_core.h

@@ -25,9 +25,10 @@
 /**\name Compile-time control macros
  * @{ */
 #define USBD_SOF_DISABLED   /**<\brief Disables SOF handling.*/
-#define USBD_VBUS_DETECT    /**<\brief Enables Vbus detection for V2 driver.*/
+#define USBD_VBUS_DETECT    /**<\brief Enables Vbus detection for L4/F4 driver.*/
 #define USBD_DP_PORT        /**<\brief DP pullup port for F103/F303 driver.*/
 #define USBD_DP_PIN         /**<\brief DP pullup pin for F103/F303 driver.*/
+#define USBD_SOF_OUT        /**<\brief Enables SOF output pin for F4 OTGFS. */
 /** @} */
 #endif