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@NixOS @efabless @AUCOHL

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donn/Readme.md

Hi!

I am Mohamed "Donn" Gaber, a Senior EDA Engineer at Efabless Corporation. I've previously interned as a research engineer at Microsoft Advanced Technology Labs, where I worked on speaker recognition.

I studied Computer Engineering at the American University in Cairo, where I am now involved with their Open Hardware Lab.

Highlights

  • OpenLane - The premier open-source RTL-to-GDSII flow by Efabless Corporation, used for countless designs on the Google OpenMPW and Efabless chipIgnite shuttles, based on Yosys, OpenROAD, Magic, KLayout and other tools.
  • Fault - Somehow the only open-source design-for-test solution, including ATPG, Scan Chain Stitching, and TAP insertion and verification.

Side Projects

These get patches in my dwindling spare time and are pretty inactive, but I'm still mostly proud of them.

  • Nudelta, a reverse-engineered open-source alternative to the console for NuPhy keyboards
  • Oak, a browser-based assembler/simulator generator
  • Phi, a more focused take on Verilog that started as my undergrad thesis project

Contacts

I do not maintain other social media presences.

Pinned Loading

  1. nudelta nudelta Public

    Open source NuPhy Console alternative

    JavaScript 529 24

  2. AUCOHL/Fault AUCOHL/Fault Public

    A complete open-source design-for-testing (DFT) Solution

    Swift 139 30

  3. AUCOHL/DFFRAM AUCOHL/DFFRAM Public

    Standard Cell Library based Memory Compiler using FF/Latch cells

    Verilog 134 33

  4. efabless/openlane2 efabless/openlane2 Public

    The next generation of OpenLane, rewritten from scratch with a modular architecture

    Python 218 38