soc/cores/spi_mmap: Fix clock divider

enjoy-digital · Sep 1, 2023 · d494e30 · d494e30
1 parent 405296b
commit d494e30
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/litex/soc/cores/spi/spi_mmap.py b/litex/soc/cores/spi/spi_mmap.py
@@ -124,7 +124,7 @@ def __init__(self, pads, data_width, sys_clk_freq, clk_settle_time=20e-9):
         self.sync += [
             If(clk_enable,
                 clk_count.eq(clk_count + 1),
-                If(clk_count == self.clk_divider[2:],
+                If(clk_count == self.clk_divider[1:],
                     clk.eq(~clk),
                     clk_count.eq(0)
                 ),