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Add remaining docs, fix oversampling
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eric-wood committed Feb 7, 2021
1 parent b8d83db commit 543b71d
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Showing 5 changed files with 55 additions and 5 deletions.
4 changes: 4 additions & 0 deletions src/active.rs
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
//! Control to activate/deactivate interface

use crate::Register;

pub struct Active {
Expand All @@ -9,13 +11,15 @@ impl Active {
Active { address }
}

/// Activate interface
pub fn inactive(&self) -> Register {
Register {
address: self.address,
value: 0,
}
}

/// Deactivate interface
pub fn active(&self) -> Register {
Register {
address: self.address,
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3 changes: 2 additions & 1 deletion src/digital_audio_interface_format.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
//! Configuration for the digital audio interface

use crate::bitmask::BitMask;
use crate::EnableDisable;

pub struct LeftRight<'a> {
index: u16,
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10 changes: 10 additions & 0 deletions src/power_down.rs
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
//! Configuration for power to different parts of the device

use crate::bitmask::BitMask;

pub struct PowerOnOff<'a> {
Expand Down Expand Up @@ -33,34 +35,42 @@ impl PowerDown {
}
}

/// Line input
pub fn line_input(&mut self) -> PowerOnOff {
PowerOnOff::new(0, &mut self.data)
}

/// Microphone input and bias
pub fn mic(&mut self) -> PowerOnOff {
PowerOnOff::new(1, &mut self.data)
}

/// ADC
pub fn adc(&mut self) -> PowerOnOff {
PowerOnOff::new(2, &mut self.data)
}

/// DAC
pub fn dac(&mut self) -> PowerOnOff {
PowerOnOff::new(3, &mut self.data)
}

/// Outputs
pub fn output(&mut self) -> PowerOnOff {
PowerOnOff::new(4, &mut self.data)
}

/// Oscillator
pub fn oscillator(&mut self) -> PowerOnOff {
PowerOnOff::new(5, &mut self.data)
}

/// CLKOUT
pub fn clock_output(&mut self) -> PowerOnOff {
PowerOnOff::new(6, &mut self.data)
}

/// POWEROFF mode
pub fn power_off(&mut self) -> PowerOnOff {
PowerOnOff::new(7, &mut self.data)
}
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41 changes: 38 additions & 3 deletions src/sampling.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
//! Configuration for sampling

use crate::bitmask::BitMask;
use crate::EnableDisable;
use crate::SamplingRate;

pub struct UsbNormal<'a> {
Expand Down Expand Up @@ -44,6 +45,35 @@ impl<'a> ClockDivider<'a> {
}
}

pub struct Oversampling<'a> {
index: u16,
bitmask: BitMask<'a>,
}

impl<'a> Oversampling<'a> {
pub fn new(index: u16, data: &'a mut u16) -> Self {
let bitmask = BitMask::new(data);

Oversampling { index, bitmask }
}

pub fn usb_272(&mut self) {
self.bitmask.set(self.index);
}

pub fn usb_250(&mut self) {
self.bitmask.unset(self.index);
}

pub fn normal_384(&mut self) {
self.bitmask.set(self.index);
}

pub fn normal_256(&mut self) {
self.bitmask.unset(self.index);
}
}

#[derive(Debug, Copy, Clone)]
pub struct Sampling {
pub(crate) data: u16,
Expand All @@ -56,22 +86,27 @@ impl Sampling {
}
}

/// USB/normal mode select
pub fn usb_normal(&mut self) -> UsbNormal {
UsbNormal::new(0, &mut self.data)
}

pub fn base_oversampling_rate(&mut self) -> EnableDisable {
EnableDisable::new(1, &mut self.data)
/// Base over-sampling rate
pub fn base_oversampling_rate(&mut self) -> Oversampling {
Oversampling::new(1, &mut self.data)
}

/// ADC and DAC sample rate
pub fn sample_rate(&mut self) -> SamplingRate {
SamplingRate::new(2, &mut self.data)
}

/// Core clock divider select
pub fn core_clock_divider_select(&mut self) -> ClockDivider {
ClockDivider::new(6, &mut self.data)
}

/// CLKOUT divider select
pub fn clock_out_divider_select(&mut self) -> ClockDivider {
ClockDivider::new(7, &mut self.data)
}
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2 changes: 1 addition & 1 deletion src/tests.rs
Original file line number Diff line number Diff line change
Expand Up @@ -97,7 +97,7 @@ fn possible_real_world() {
// no clock division, normal mode, 48k
let result = WM8731::sampling(|w| {
w.core_clock_divider_select().normal();
w.base_oversampling_rate().disable();
w.base_oversampling_rate().normal_256();
w.sample_rate().adc_48();
w.usb_normal().normal();
});
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