NDP

FPGA based computer inspired by the C128, PDP-11, and Macintosh

TODOs

Neccesities

[#C] Actually write a proper README

Only having TODOs is tacky. :p

[#A] Update Clash Version

I want explicit clocking and reset lines.

[#C] Move Clock Generation into Clash

Investigate creating the necessary primitives and whatnot necessary for having the entire clock generation setup written in clash.

Niceties

[#D] Make GHC plugin to generate Xilinx artefacts

Define a set of custom annotations that let the following artefacts be defined inline:

• Constraints
• Clock related stuff?
• xflow’s .prj files

  A front-end GHC plugin can then read those annotations and generate the correcte artefacts for the xilinx toolchain to consume.

[#E] Move LPDDR Controller into Clash

Make the necessary primitives that let Clash instantiate the memory controller. Ideally the entire thing could be configurable in clash, but it might be necessary to generate the controller with the xilinx tools and make it easy to instantiate the resulting wrapper inside clash.

[#B] Move from HSpec to Tasty

Tasty looks fancy and I lust a bit for it. :p

Possibilities

[#C] Dhall

Consider using the Dhall configuration language as an alternative to the configuration language currently being used. There are a few places where it might be a good substitute for the current arrangement.

NDP.config

A more structured configuration file would be nice, also the current syntax is kind of icky.

Top level entity config.hs

The current ‘haskell subset that isn’t quite haskell’ arrangement is a little squicky at times.

Constraint files and ROM maps

more structure, better type checking would be nice. Somewhat less opaque errors would also be nice…

References

QA 76.9 C62 E72

Digital Arithmetic

QA 76.9 C62 P37

Computer Arithmetic: Algorithms and Hardware Designs

QA 76.9 C643 H46

Computer Organization and Design

QA 76.9 C643 S73

Computer Organization and Architecture