Format code

derive/src/lib.rs

@@ -7,7 +7,7 @@ use quote::quote;
 use syn::{parse_macro_input, DeriveInput};
 
 /// Derive macro to implement the allegro_motor_drivers::io::SpiMessages trait.
-/// 
+///
 /// Please note that a compile failure will occur if derive macros are defined in the wrong order,
 /// or if the bitsize derive macro is not used at all. This occurs because derive macros are parsed
 /// from the outside in, and each macro depends on implementations defined by other macros.
@@ -17,15 +17,15 @@ use syn::{parse_macro_input, DeriveInput};
 ///     field_1: bool,
 /// }
 /// ```
-/// 
+///
 /// ```compile_fail
 /// #[bitsize(1)]
 /// #[derive(spi_derive)]
 /// struct MyStruct {
 ///     field_1: bool,
 /// }
 /// ```
-/// 
+///
 #[proc_macro_derive(spi_derive)]
 pub fn derive(input: TokenStream) -> TokenStream {
     let DeriveInput { ident, attrs, .. } = parse_macro_input!(input as DeriveInput);

drivers/src/a49xx/a4962/regs/diagnostic.rs

@@ -0,0 +1 @@
+

drivers/src/a49xx/a4963/mod.rs

@@ -0,0 +1 @@
+

drivers/src/a49xx/a4964/mod.rs

@@ -0,0 +1 @@
+

drivers/src/amt49xxx/amt49100/mod.rs

@@ -0,0 +1 @@
+

drivers/src/amt49xxx/amt49101/mod.rs

@@ -0,0 +1 @@
+

drivers/src/amt49xxx/amt49106/mod.rs

@@ -0,0 +1 @@
+

drivers/src/amt49xxx/amt49107/mod.rs

@@ -0,0 +1 @@
+

drivers/src/io.rs

@@ -1,10 +1,10 @@
 //! Input/output messaging between hosts and peripherals.
 
 /// A trait abstracting SPI Messages to and from the motor driver.
-/// 
+///
 /// Implements read_request, read_response, and write_request functions
 /// to encode and decode u16 messages into and out of a chip's register.
-/// 
+///
 /// Note: the write_response function is separately defined separately for
 /// each chip's protocol. Write responses contain a copy of the diagnostic
 /// register, so the written register has no bearing on the output message.

drivers/tests/tests.rs

@@ -6,13 +6,12 @@ fn test_spi_derive() {
     use allegro_motor_drivers::a49xx::a4910::regs::config::*;
     use allegro_motor_drivers::io::SpiMessages;
     use bilge::prelude::*;
-    
+
     let mut c1 = Config1::default();
     assert_eq!(c1.write_request(), 0b01_1_1_1_00_0_0_0100000);
-    
+
     assert_eq!(c1.read_request(), 0b01_0_0000000000000);
-    
+
     c1.read_response(0b00_0_0_0_11_1_1_1011111);
     assert_eq!(c1.vt(), u7::new(0b1011111).into());
-
 }