ResourceData: invertible.

src/main/scala/ee/hrzn/chryse/platform/resource/Button.scala

@@ -2,17 +2,9 @@ package ee.hrzn.chryse.platform.resource
 
 import chisel3._
 
-class Button extends ResourceData[Bool](Input(Bool())) {
-  private var invert = false
-
-  def inverted: this.type = {
-    invert = true
-    this
-  }
-
-  override def connectIo(user: Bool, top: Bool) =
-    user := (if (!invert) top else ~top)
-}
+class Button
+    extends ResourceData[Bool](Input(Bool()))
+    with ResourceDataUserInvertible[Bool] {}
 
 object Button {
   def apply() = new Button

src/main/scala/ee/hrzn/chryse/platform/resource/InOut.scala

@@ -6,8 +6,8 @@ import chisel3._
 // of fish entirely) — this'll currently throw an obscure Chisel error (since
 // they'll both get the same name).
 class InOut extends ResourceBase with ResourceSinglePin {
-  val i = new ResourceData[Bool](Input(Bool())) {}
-  val o = new ResourceData[Bool](Output(Bool())) {}
+  val i = ResourceData(Input(Bool()))
+  val o = ResourceData(Output(Bool()))
 
   def setName(name: String): Unit = {
     i.setName(s"$name")

src/main/scala/ee/hrzn/chryse/platform/resource/LED.scala

@@ -2,17 +2,9 @@ package ee.hrzn.chryse.platform.resource
 
 import chisel3._
 
-class LED extends ResourceData[Bool](Output(Bool())) {
-  private var invert = false
-
-  def inverted: this.type = {
-    invert = true
-    this
-  }
-
-  override def connectIo(user: Bool, top: Bool) =
-    top := (if (!invert) user else ~user)
-}
+class LED
+    extends ResourceData[Bool](Output(Bool()))
+    with ResourceDataUserInvertible[Bool] {}
 
 object LED {
   def apply() = new LED

src/main/scala/ee/hrzn/chryse/platform/resource/ResourceData.scala

@@ -6,9 +6,18 @@ import ee.hrzn.chryse.chisel.DirectionOf
 
 import scala.language.implicitConversions
 
-abstract class ResourceData[HW <: Data](gen: => HW) extends ResourceSinglePin {
+trait ResourceDataUserInvertible[HW <: Data] extends ResourceData[HW] {
+  def inverted: this.type = {
+    _invert = true
+    this
+  }
+}
+
+abstract class ResourceData[HW <: Data](gen: => HW, invert: Boolean = false)
+    extends ResourceSinglePin {
   final private[chryse] var pinId: Option[Pin] = None
   final var name: Option[String]               = None
+  final protected var _invert                  = invert
 
   // Should return Chisel datatype with Input/Output attached.
   def makeIo(): HW = gen
@@ -40,9 +49,9 @@ abstract class ResourceData[HW <: Data](gen: => HW) extends ResourceSinglePin {
   protected def connectIo(user: HW, top: HW): Unit = {
     DirectionOf(top) match {
       case SpecifiedDirection.Input =>
-        user := top
+        user := (if (!_invert) top else ~top.asInstanceOf[Bits])
       case SpecifiedDirection.Output =>
-        top := user
+        top := (if (!_invert) user else ~user.asInstanceOf[Bits])
       case dir =>
         throw new Exception(s"unhandled direction: $dir")
     }
@@ -59,6 +68,9 @@ abstract class ResourceData[HW <: Data](gen: => HW) extends ResourceSinglePin {
 }
 
 object ResourceData {
+  def apply[HW <: Data](gen: => HW, invert: Boolean = false): ResourceData[HW] =
+    new ResourceData(gen, invert) {}
+
   // Note that the DataView doesn't really need or care about the generated
   // data's direction or lack thereof.
 

src/main/scala/ee/hrzn/chryse/platform/resource/SPIFlash.scala

@@ -3,13 +3,12 @@ package ee.hrzn.chryse.platform.resource
 import chisel3._
 
 class SPIFlash extends ResourceBase {
-  // TODO NEXT: refactoring out inversion (and other interposed) logic here should be fruitful.
-  val cs    = new ResourceData[Bool](Output(Bool())) {}   // TODO: invert
-  val clock = new ResourceData[Clock](Output(Clock())) {} // XXX: Clock here OK?
-  val copi  = new ResourceData[Bool](Output(Bool())) {}
-  val cipo  = new ResourceData[Bool](Input(Bool())) {}
-  val wp    = new ResourceData[Bool](Output(Bool())) {}   // TODO: invert
-  val hold  = new ResourceData[Bool](Output(Bool())) {}   // TODO: invert
+  val cs    = ResourceData(Output(Bool()), invert = true)
+  val clock = ResourceData(Output(Clock()))
+  val copi  = ResourceData(Output(Bool()))
+  val cipo  = ResourceData(Input(Bool()))
+  val wp    = ResourceData(Output(Bool()), invert = true)
+  val hold  = ResourceData(Output(Bool()), invert = true)
 
   def setName(name: String): Unit = {
     cs.setName(s"${name}_cs")

src/main/scala/ee/hrzn/chryse/platform/resource/UART.scala

@@ -5,8 +5,8 @@ import chisel3._
 class UART extends ResourceBase {
   // TODO (iCE40): lower IO_STANDARD=SB_LVTTL and PULLUP=1.
   // TODO: these will differ per-platform so need to come in from outside.
-  val rx = new ResourceData[Bool](Input(Bool())) {}
-  val tx = new ResourceData[Bool](Output(Bool())) {}
+  val rx = ResourceData(Input(Bool()))
+  val tx = ResourceData(Output(Bool()))
 
   def setName(name: String): Unit = {
     rx.setName(s"${name}_rx")