adjustment of TWR 2.1 speaker volume for monitoring of a voice freque…

…ncy [skip ci]
lyusupov · Mar 9, 2024 · 4979023 · 4979023
1 parent ecb26f6
commit 4979023
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Showing 3 changed files with 24 additions and 10 deletions.
diff --git a/software/firmware/source/SoftRF/src/driver/RF.cpp b/software/firmware/source/SoftRF/src/driver/RF.cpp
@@ -2557,14 +2557,18 @@ static void sa8x8_setup()
         controller.closeTail();
       }
 
+      byte volume = 1;
+      if (hw_info.revision == 1 && rx == false && Voice_Frequency) {
+        volume = 3;
+      }
       /*
        * Owners of T-TWR Plus V2.0 board with no R22 fix
        * may consider to increase the volume setting
        * up to 6 for a better 'APRS sensitivity' at an expense of
        * very loud sound from the speaker.
        * A disconnect of the speaker is one of the options to think about.
        */
-      controller.setVolume(1);
+      controller.setVolume(volume);
 
       break;
   }

diff --git a/software/firmware/source/SoftRF/src/platform/ESP32.cpp b/software/firmware/source/SoftRF/src/platform/ESP32.cpp
@@ -2972,10 +2972,18 @@ static void ESP32_SPI_begin()
       SPI.begin(SOC_GPIO_PIN_S3_SCK,  SOC_GPIO_PIN_S3_MISO,
                 SOC_GPIO_PIN_S3_MOSI, SOC_GPIO_PIN_S3_SS);
       break;
+    case ESP32_C2_DEVKIT:
+      SPI.begin(SOC_GPIO_PIN_C2_SCK,  SOC_GPIO_PIN_C2_MISO,
+                SOC_GPIO_PIN_C2_MOSI, SOC_GPIO_PIN_C2_SS);
+      break;
     case ESP32_C3_DEVKIT:
       SPI.begin(SOC_GPIO_PIN_C3_SCK,  SOC_GPIO_PIN_C3_MISO,
                 SOC_GPIO_PIN_C3_MOSI, SOC_GPIO_PIN_C3_SS);
       break;
+    case ESP32_C6_DEVKIT:
+      SPI.begin(SOC_GPIO_PIN_C6_SCK,  SOC_GPIO_PIN_C6_MISO,
+                SOC_GPIO_PIN_C6_MOSI, SOC_GPIO_PIN_C6_SS);
+      break;
     case ESP32_LILYGO_T_TWR2:
       SPI.begin(SOC_GPIO_PIN_TWR2_SCK,  SOC_GPIO_PIN_TWR2_MISO,
                 SOC_GPIO_PIN_TWR2_MOSI, SOC_GPIO_PIN_TWR2_SS);
@@ -2984,10 +2992,6 @@ static void ESP32_SPI_begin()
       SPI.begin(SOC_GPIO_PIN_HELTRK_SCK,  SOC_GPIO_PIN_HELTRK_MISO,
                 SOC_GPIO_PIN_HELTRK_MOSI, SOC_GPIO_PIN_HELTRK_SS);
       break;
-    case ESP32_C6_DEVKIT:
-      SPI.begin(SOC_GPIO_PIN_C6_SCK,  SOC_GPIO_PIN_C6_MISO,
-                SOC_GPIO_PIN_C6_MOSI, SOC_GPIO_PIN_C6_SS);
-      break;
     case ESP32_LILYGO_T3C6:
       SPI.begin(SOC_GPIO_PIN_T3C6_SCK,  SOC_GPIO_PIN_T3C6_MISO,
                 SOC_GPIO_PIN_T3C6_MOSI, SOC_GPIO_PIN_T3C6_SS);
@@ -3045,6 +3049,10 @@ static void ESP32_swSer_begin(unsigned long baud)
       Serial.println(F("INFO: ESP32-S3 DevKit is detected."));
       Serial_GNSS_In.begin(baud, SERIAL_IN_BITS,
                            SOC_GPIO_PIN_S3_GNSS_RX, SOC_GPIO_PIN_S3_GNSS_TX);
+    } else if (esp32_board == ESP32_C2_DEVKIT) {
+      Serial.println(F("INFO: ESP32-C2 DevKit is detected."));
+      Serial_GNSS_In.begin(baud, SERIAL_IN_BITS,
+                           SOC_GPIO_PIN_C2_GNSS_RX, SOC_GPIO_PIN_C2_GNSS_TX);
     } else if (esp32_board == ESP32_C3_DEVKIT) {
       Serial.println(F("INFO: ESP32-C3 DevKit is detected."));
       Serial_GNSS_In.begin(baud, SERIAL_IN_BITS,
@@ -3913,7 +3921,9 @@ static float ESP32_Battery_param(uint8_t param)
          (esp32_board   == ESP32_TTGO_V2_OLED && hw_info.revision == 16) ||
           esp32_board   == ESP32_S2_T8_V1_1) {
         voltage += voltage;
-      } else if (esp32_board == ESP32_C3_DEVKIT || esp32_board == ESP32_C6_DEVKIT) {
+      } else if (esp32_board == ESP32_C2_DEVKIT ||
+                 esp32_board == ESP32_C3_DEVKIT ||
+                 esp32_board == ESP32_C6_DEVKIT) {
       /* NodeMCU has voltage divider 100k/220k on board */
         voltage *= 3.2;
       } else if (esp32_board == ESP32_HELTEC_TRACKER) {
@@ -3960,6 +3970,10 @@ static bool ESP32_Baro_setup()
 
     Wire.setPins(SOC_GPIO_PIN_S3_SDA, SOC_GPIO_PIN_S3_SCL);
 
+  } else if (esp32_board == ESP32_C2_DEVKIT) {
+
+    Wire.setPins(SOC_GPIO_PIN_C2_SDA, SOC_GPIO_PIN_C2_SCL);
+
   } else if (esp32_board == ESP32_C3_DEVKIT) {
 
     Wire.setPins(SOC_GPIO_PIN_C3_SDA, SOC_GPIO_PIN_C3_SCL);

diff --git a/software/firmware/source/SoftRF/src/platform/iomap/WT0132C6.h b/software/firmware/source/SoftRF/src/platform/iomap/WT0132C6.h
@@ -46,10 +46,6 @@
 #define SOC_GPIO_PIN_C2_GNSS_TX         18
 #define SOC_GPIO_PIN_C2_GNSS_PPS        SOC_UNUSED_PIN // 0
 
-// USB CDC/JTAG
-#define SOC_GPIO_PIN_C2_USB_DP          13 /* NC */
-#define SOC_GPIO_PIN_C2_USB_DN          12 /* NC */
-
 // SPI
 #define SOC_GPIO_PIN_C2_MOSI            6  /* D7 */
 #define SOC_GPIO_PIN_C2_MISO            5  /* D6 */