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[CHERRY-PICK] UefiCpuPkg/PiSmmCpuDxeSmm: Consume PcdCpuSmmApSyncTimeout2
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This patch is to consume the PcdCpuSmmApSyncTimeout2 to
enhance the flexibility of timeout configuration.
In some cases, certain processors may not be able to enter
SMI, and prolonged waiting could lead to kernel soft/hard
lockup. We have now defined two timeouts. The first timeout
can be set to a smaller value to reduce the waiting period.
Processors that are unable to enter SMI will be woken up
through SMIIPL to enter SMI, followed by a second waiting
period. The second timeout can be set to a larger value to
prevent delays in processors entering SMI case due to the
long instruction execution.

This patch adjust the location of PcdCpuSmmApSyncTimeout2
to avoid conflict.

Signed-off-by: Yanbo Huang <[email protected]>
Cc: Ray Ni <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Gerd Hoffmann <[email protected]>
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shuishouqiaozhi authored and os-d committed Aug 24, 2024
1 parent 125e5a0 commit 4d722ac
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Showing 4 changed files with 28 additions and 13 deletions.
10 changes: 5 additions & 5 deletions UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
/** @file
SMM MP service implementation
Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2009 - 2024, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
Expand Down Expand Up @@ -270,7 +270,7 @@ SmmWaitForApArrival (
// Sync with APs 1st timeout
//
for (Timer = StartSyncTimer ();
!IsSyncTimerTimeout (Timer) && !(LmceEn && LmceSignal);
!IsSyncTimerTimeout (Timer, mTimeoutTicker) && !(LmceEn && LmceSignal);
)
{
mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmExceptBlockedDisabled ();
Expand Down Expand Up @@ -311,7 +311,7 @@ SmmWaitForApArrival (
// Sync with APs 2nd timeout.
//
for (Timer = StartSyncTimer ();
!IsSyncTimerTimeout (Timer);
!IsSyncTimerTimeout (Timer, mTimeoutTicker2);
)
{
mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmExceptBlockedDisabled ();
Expand Down Expand Up @@ -738,7 +738,7 @@ APHandler (
// Timeout BSP
//
for (Timer = StartSyncTimer ();
!IsSyncTimerTimeout (Timer) &&
!IsSyncTimerTimeout (Timer, mTimeoutTicker) &&
!(*mSmmMpSyncData->InsideSmm);
)
{
Expand Down Expand Up @@ -766,7 +766,7 @@ APHandler (
// Now clock BSP for the 2nd time
//
for (Timer = StartSyncTimer ();
!IsSyncTimerTimeout (Timer) &&
!IsSyncTimerTimeout (Timer, mTimeoutTicker2) &&
!(*mSmmMpSyncData->InsideSmm);
)
{
Expand Down
11 changes: 8 additions & 3 deletions UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
Original file line number Diff line number Diff line change
Expand Up @@ -482,6 +482,9 @@ extern BOOLEAN mSmmDebugAgentSupport;
//
extern UINT64 mAddressEncMask;

extern UINT64 mTimeoutTicker;
extern UINT64 mTimeoutTicker2;

/**
Create 4G PageTable in SMRAM.
Expand Down Expand Up @@ -544,15 +547,17 @@ StartSyncTimer (
);

/**
Check if the SMM AP Sync timer is timeout.
Check if the SMM AP Sync Timer is timeout specified by Timeout.
@param Timer The start timer from the begin.
@param Timer The start timer from the begin.
@param Timeout The timeout ticker to wait.
**/
BOOLEAN
EFIAPI
IsSyncTimerTimeout (
IN UINT64 Timer
IN UINT64 Timer,
IN UINT64 Timeout
);

/**
Expand Down
1 change: 1 addition & 0 deletions UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
Original file line number Diff line number Diff line change
Expand Up @@ -138,6 +138,7 @@
gUefiCpuPkgTokenSpaceGuid.PcdSmmApPerfLogEnable

[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout2 ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize ## SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize ## CONSUMES
Expand Down
19 changes: 14 additions & 5 deletions UefiCpuPkg/PiSmmCpuDxeSmm/SyncTimer.c
Original file line number Diff line number Diff line change
@@ -1,14 +1,17 @@
/** @file
SMM Timer feature support
Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2009 - 2024, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/

#include "PiSmmCpuDxeSmm.h"

UINT64 mTimeoutTicker = 0;

UINT64 mTimeoutTicker2 = 0;

//
// Number of counts in a roll-over cycle of the performance counter.
//
Expand Down Expand Up @@ -36,6 +39,10 @@ InitializeSmmTimer (
MultU64x64 (TimerFrequency, PcdGet64 (PcdCpuSmmApSyncTimeout)),
1000 * 1000
);
mTimeoutTicker2 = DivU64x32 (
MultU64x64 (TimerFrequency, PcdGet64 (PcdCpuSmmApSyncTimeout2)),
1000 * 1000
);
if (End < Start) {
mCountDown = TRUE;
mCycle = Start - End;
Expand All @@ -59,15 +66,17 @@ StartSyncTimer (
}

/**
Check if the SMM AP Sync timer is timeout.
Check if the SMM AP Sync Timer is timeout specified by Timeout.
@param Timer The start timer from the begin.
@param Timer The start timer from the begin.
@param Timeout The timeout ticker to wait.
**/
BOOLEAN
EFIAPI
IsSyncTimerTimeout (
IN UINT64 Timer
IN UINT64 Timer,
IN UINT64 Timeout
)
{
UINT64 CurrentTimer;
Expand Down Expand Up @@ -105,5 +114,5 @@ IsSyncTimerTimeout (
}
}

return (BOOLEAN)(Delta >= mTimeoutTicker);
return (BOOLEAN)(Delta >= Timeout);
}

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