Merge branch 'main' into Devel

orbcode · Jun 3, 2022 · c250f29 · c250f29
2 parents 1c26db0 + e06aa25
commit c250f29
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Showing 3 changed files with 13 additions and 2 deletions.
diff --git a/CHANGES.md b/CHANGES.md
@@ -15,6 +15,17 @@ Version 2.00 in Progress
 * (From V1.11) Fix depreciation warning with latest versions of libftdi
 * (From V1.11) Fix bitrot in documentation URL (master -> main transition, Jan Christoph Bernack)
 
+3rd June 2022 (Version 1.13)
+
+* Fix -v missing parameter
+* Allow orbcat sockets to reconnect on loss of connection
+* Add SAM5X SWO support
+* Prevent segfault in orbtop when elf changes
+* Fix assert when fpga has no data to deliver
+* Add pyocd to list of trace sources
+*Complete fix for specified length integers on 32 bit platforms (Rasbian support)
+* Compatability with languages other than C family (specifically Rust)
+
 23rd October 2020 (Version 1.10)
 
 * Replace `master` with `main`.

diff --git a/Src/orbcat.c b/Src/orbcat.c
@@ -50,6 +50,7 @@ struct
 
     char *file;                                          /* File host connection */
     bool endTerminate;                                  /* Terminate when file/socket "ends" */
+
 } options = {.forceITMSync = true, .tpiuChannel = 1, .port = NWCLIENT_SERVER_PORT, .server = "localhost"};
 
 struct
@@ -613,6 +614,7 @@ int socketFeeder( void )
 
     close( sockfd );
     return -2;
+
 }
 
 // ====================================================================================================

diff --git a/Support/gdbtrace.init b/Support/gdbtrace.init
@@ -386,8 +386,6 @@ enableSTM32SWO Configure output pin on STM32 for SWO use.
 end
 # ====================================================================
 define enableSAMD5XSWD
-
-  _setAddressesSAM
   # Enable peripheral channel clock on GCLK#0
   # GCLK->PHCTRL[47] = GCLK_PCHCTRL_GEN(0)
   set *(unsigned char *)0x40001D3C = 0