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Fixes in traceDecoder and loadelf #159

Merged
merged 7 commits into from
Oct 27, 2024
Merged

Fixes in traceDecoder and loadelf #159

merged 7 commits into from
Oct 27, 2024

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lvb2000
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@lvb2000 lvb2000 commented Oct 24, 2024

I also added cycle count packets to trace decode etm4. However, it is not 100% complete. To see this check the branch 'Mortrall' (sha: ac9514e) in https://github.com/niklaut/orbuculum.

Lukas added 6 commits October 24, 2024 10:48
add overflow debug parameter
could not find inline functions, LDR was missing
could not find inline functions, LDR was missing
@@ -143,6 +143,9 @@ struct TRACECPUState

// Convinience, for debug reporting
genericsReportCB report;

// Debugging
uint64_t overflows;
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While using instruction tracing we had problems with overflows even with implicit tracing. Because there is no feedback I added an overflow counter and a debug message.

{
dwarf_highpc_b ( die, &h, 0, &formclass, 0 );
dwarf_lowpc ( die, &l, 0 );
if (DW_DLV_OK == dwarf_offdie_b( dbg, abstract_origin_offset, IS_INFO, &abstract_origin_die, 0 ))
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There has been an issue with inline low/high addresses, where function names could not be matched to addresses this should be fixed with this part.

@@ -1001,7 +1002,7 @@ char *symbolDisassembleLine( struct symbol *p, enum instructionClass *ic, symbol
if ( !p->caphandle )
{
/* Disassembler isn't initialised yet */
if ( cs_open( CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_LITTLE_ENDIAN, &p->caphandle ) != CS_ERR_OK )
if ( cs_open( CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_LITTLE_ENDIAN + CS_MODE_MCLASS, &p->caphandle ) != CS_ERR_OK )
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Some Instructions could not be decoded because this Makro was missing.

@@ -1044,6 +1045,14 @@ char *symbolDisassembleLine( struct symbol *p, enum instructionClass *ic, symbol
&& strstr( insn->op_str, "pc" ) )
) ? LE_IC_JUMP : 0;

/* create a copy to check if load in pc */
char *copy = strdup(insn->op_str);
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@lvb2000 lvb2000 Oct 24, 2024

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Load to PC were not detected as Jump instructions.

@@ -336,7 +341,7 @@ static bool _pumpAction( struct TRACEDecoderEngine *e, struct TRACECPUState *cpu

case 0b11000000 ... 0b11010100:
case 0b11100000 ... 0b11110100: /* Atom format 6, Figure 6-44, Pg 6.307 */
cpu->eatoms = ( c & 0x1f ) + 3;
cpu->eatoms = ( c & 0x1f ) + 4;
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It moves by 3 + 1 because the COUNT value needs to be added

@@ -404,6 +409,8 @@ static bool _pumpAction( struct TRACEDecoderEngine *e, struct TRACECPUState *cpu
cpu->addr = j->q[match].addr;
retVal = TRACE_EV_MSG_RXED;
_stateChange( cpu, EV_CH_ADDRESS );
_stackQ( j );
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After Exact Match Address the function update_address_regs is called therefore a stackQ is needed

@@ -685,7 +692,7 @@ static bool _pumpAction( struct TRACEDecoderEngine *e, struct TRACECPUState *cpu
}
else
{
if ( j->idx == 8 )
if ( j->idx == 9 )
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for j->idx = 2 initialised, adding 7 from above should be 9 instead of 8

@mubes
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mubes commented Oct 27, 2024

It was a chunk of work to find these...thanks for the effort!!!

@mubes mubes merged commit dfb021d into orbcode:main Oct 27, 2024
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2 participants