Poke for internal registers

[danielkasza]

This is related to #17 and #182.

It would be nice to be able to poke internal registers of modules. It would make it much easier to test modules with complex state machines.

I understand that registers may be removed by transformations. I think it would be acceptable to only support this when registers are somehow marked for modification by tests.

[ekiwi]

The big problem with this feature is that poking registers in a Verilator simulation is very difficult. Not because of the name mapping. Tracking register names and generating the correct flags for Verilator to expose them is do-able. The problem is that Verilator will pre-compute the next value for registers. So if you change the register content from the outside and then continue the simulation, the register value will change back to the pre-computed next value which is not what we want.