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fixes macro version
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@tess-eract
tess-eract committed Jun 4, 2024
1 parent 62d30b1 commit da4f49c
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Showing 20 changed files with 75 additions and 60 deletions.
42 changes: 42 additions & 0 deletions Cargo.lock
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2 changes: 1 addition & 1 deletion Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ members = [
"assembler",
"alu_u32",
"basic",
#"basic_macro",
"basic_macro",
"bus",
"cpu",
"derive",
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2 changes: 1 addition & 1 deletion alu_u32/src/add/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ use core::mem::transmute;
use valida_bus::{MachineWithGeneralBus, MachineWithRangeBus8};
use valida_cpu::MachineWithCpuChip;
use valida_machine::{
instructions, Chip, Instruction, Interaction, Operands, PublicRow, ValidaPublicValues, Word,
instructions, Chip, Instruction, Interaction, Operands, ValidaPublicValues, Word,
};
use valida_opcodes::ADD32;
use valida_range::MachineWithRangeChip;
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2 changes: 1 addition & 1 deletion alu_u32/src/bitwise/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ use core::mem::transmute;
use valida_bus::MachineWithGeneralBus;
use valida_cpu::MachineWithCpuChip;
use valida_machine::{
instructions, Chip, Instruction, Interaction, Operands, PublicRow, ValidaPublicValues, Word,
instructions, Chip, Instruction, Interaction, Operands, ValidaPublicValues, Word,
};
use valida_opcodes::{AND32, OR32, XOR32};

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2 changes: 1 addition & 1 deletion alu_u32/src/com/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -7,11 +7,11 @@ use core::iter;
use core::mem::transmute;
use valida_bus::MachineWithGeneralBus;
use valida_cpu::MachineWithCpuChip;
use valida_machine::StarkConfig;
use valida_machine::{
instructions, Chip, Instruction, Interaction, Operands, ValidaPublicValues, Word,
MEMORY_CELL_BYTES,
};
use valida_machine::{PublicRow, StarkConfig};
use valida_opcodes::{EQ32, NE32};

use p3_air::VirtualPairCol;
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2 changes: 1 addition & 1 deletion alu_u32/src/lt/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ use core::mem::transmute;
use valida_bus::MachineWithGeneralBus;
use valida_cpu::MachineWithCpuChip;
use valida_machine::{
instructions, Chip, Instruction, Interaction, Operands, PublicRow, ValidaPublicValues, Word,
instructions, Chip, Instruction, Interaction, Operands, ValidaPublicValues, Word,
MEMORY_CELL_BYTES,
};
use valida_opcodes::{LT32, LTE32, SLE32, SLT32};
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3 changes: 1 addition & 2 deletions alu_u32/src/mul/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,7 @@ use columns::{Mul32Cols, MUL_COL_MAP, NUM_MUL_COLS};
use valida_bus::MachineWithGeneralBus;
use valida_cpu::MachineWithCpuChip;
use valida_machine::{
instructions, Chip, Instruction, Interaction, Mulhs, Mulhu, Operands, PublicRow,
ValidaPublicValues, Word,
instructions, Chip, Instruction, Interaction, Mulhs, Mulhu, Operands, ValidaPublicValues, Word,
};
use valida_opcodes::{MUL32, MULHS32, MULHU32};
use valida_range::MachineWithRangeChip;
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3 changes: 1 addition & 2 deletions alu_u32/src/shift/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,7 @@ use core::mem::transmute;
use valida_bus::{MachineWithGeneralBus, MachineWithRangeBus8};
use valida_cpu::MachineWithCpuChip;
use valida_machine::{
instructions, Chip, Instruction, Interaction, Operands, PublicRow, Sra, ValidaPublicValues,
Word,
instructions, Chip, Instruction, Interaction, Operands, Sra, ValidaPublicValues, Word,
};
use valida_opcodes::{DIV32, MUL32, SDIV32, SHL32, SHR32, SRA32};

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2 changes: 1 addition & 1 deletion alu_u32/src/sub/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ use core::mem::transmute;
use valida_bus::{MachineWithGeneralBus, MachineWithRangeBus8};
use valida_cpu::MachineWithCpuChip;
use valida_machine::{
instructions, Chip, Instruction, Interaction, Operands, PublicRow, ValidaPublicValues, Word,
instructions, Chip, Instruction, Interaction, Operands, ValidaPublicValues, Word,
};
use valida_opcodes::SUB32;
use valida_range::MachineWithRangeChip;
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28 changes: 0 additions & 28 deletions basic/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -281,7 +281,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.cpu();
#[cfg(debug_assertions)]
println!("checking cpu");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -290,7 +289,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("cpu checked");
quotients.push(quotient(
self,
config,
Expand All @@ -308,7 +306,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.program();
#[cfg(debug_assertions)]
println!("checking program");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -317,7 +314,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("program checked");
quotients.push(quotient(
self,
config,
Expand All @@ -335,7 +331,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.mem();
#[cfg(debug_assertions)]
println!("checking mem");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -344,7 +339,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("mem checked");
quotients.push(quotient(
self,
config,
Expand All @@ -361,7 +355,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
i += 1;

let chip = self.add_u32();
println!("checking add_u32");
#[cfg(debug_assertions)]
check_constraints::<Self, _, SC>(
self,
Expand All @@ -371,7 +364,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("add_u32 checked");
quotients.push(quotient(
self,
config,
Expand All @@ -389,7 +381,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.sub_u32();
#[cfg(debug_assertions)]
println!("checking sub_u32");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -398,7 +389,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("sub_u32 checked");
quotients.push(quotient(
self,
config,
Expand All @@ -416,7 +406,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.mul_u32();
#[cfg(debug_assertions)]
println!("checking mul_u32");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -425,7 +414,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("mul_u32 checked");
quotients.push(quotient(
self,
config,
Expand All @@ -443,7 +431,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.div_u32();
#[cfg(debug_assertions)]
println!("checking div_u32");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -452,7 +439,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("div_u32 checked");
quotients.push(quotient(
self,
config,
Expand All @@ -470,7 +456,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.shift_u32();
#[cfg(debug_assertions)]
println!("checking shift_u32");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -479,7 +464,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("shift_u32 checked");
quotients.push(quotient(
self,
config,
Expand All @@ -497,7 +481,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.lt_u32();
#[cfg(debug_assertions)]
println!("checking lt_u32");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -506,7 +489,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("lt_u32 checked");
quotients.push(quotient(
self,
config,
Expand All @@ -524,7 +506,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.com_u32();
#[cfg(debug_assertions)]
println!("checking com_u32");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -533,7 +514,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("com_u32 checked");
quotients.push(quotient(
self,
config,
Expand All @@ -551,7 +531,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.bitwise_u32();
#[cfg(debug_assertions)]
println!("checking bitwise_u32");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -560,7 +539,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("bitwise_u32 checked");
quotients.push(quotient(
self,
config,
Expand All @@ -578,7 +556,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.output();
#[cfg(debug_assertions)]
println!("checking output");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -587,7 +564,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("output checked");
quotients.push(quotient(
self,
config,
Expand All @@ -605,7 +581,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.range();
#[cfg(debug_assertions)]
println!("checking range");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -614,7 +589,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("range checked");
quotients.push(quotient(
self,
config,
Expand All @@ -632,7 +606,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {

let chip = self.static_data();
#[cfg(debug_assertions)]
println!("checking static data");
check_constraints::<Self, _, SC>(
self,
chip,
Expand All @@ -641,7 +614,6 @@ impl<F: PrimeField32 + TwoAdicField> Machine<F> for BasicMachine<F> {
&perm_challenges,
&public_values[i],
);
println!("static data checked");
quotients.push(quotient(
self,
config,
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2 changes: 1 addition & 1 deletion cpu/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ use valida_machine::is_mul_4;
use valida_machine::ValidaPublicValues;
use valida_machine::{
addr_of_word, index_of_byte, instructions, AdviceProvider, Chip, Instruction, InstructionWord,
Interaction, Operands, PublicRow, Word,
Interaction, Operands, Word,
};
use valida_memory::{MachineWithMemoryChip, Operation as MemoryOperation};
use valida_opcodes::{
Expand Down
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