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Feature/rmii 100M rt #70

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0c581b4
Initial API for rmii_rt
ed-xmos Nov 23, 2024
3230356
WIP RMII RT mac top level
ed-xmos Nov 23, 2024
4c0075a
Working initial port extraction from union
ed-xmos Nov 25, 2024
2c58632
Add compiler warning workaround for RMII
ed-xmos Nov 25, 2024
a648569
Simple test app for RMII ethernet build
ed-xmos Nov 25, 2024
a99bd72
Setup API for rmii_master_init_xx
ed-xmos Nov 25, 2024
82d3c1e
Initial rmii_master.xc
ed-xmos Nov 25, 2024
bb967cf
Re-use mii_ethernet_filter and mii_ethernet_server in RMII master
ed-xmos Nov 25, 2024
f2dc266
rmii_master plumbing and prep
ed-xmos Nov 25, 2024
e4feb9c
Initial hardware setup for RMII (untested)
ed-xmos Nov 26, 2024
d654cfa
Source check
ed-xmos Nov 26, 2024
ae53788
Initial chunks for rmii_master_rx_pins
ed-xmos Nov 26, 2024
4657365
remove error handling
ed-xmos Nov 26, 2024
18571fb
Chunks compiling (use *rxdata)
ed-xmos Nov 26, 2024
37683bc
Remove unneeded kernel stack
ed-xmos Nov 26, 2024
b808ac3
Unify rmii_master_tx_pins
ed-xmos Nov 26, 2024
41afa75
rmii_master_tx_pins impl
ed-xmos Nov 26, 2024
07cdc5d
initial tx_packet from mii
ed-xmos Nov 26, 2024
415d3b9
Building tx (not yet rmii)
ed-xmos Nov 26, 2024
baef811
Tidy rmii_transmit_packet
ed-xmos Nov 26, 2024
f049224
Merge commit '02343159640e8d46ba929d86c8c37cae0e9c45ac' into feature/…
ed-xmos Nov 27, 2024
4f91a4e
Add 1b rmii skeleton
ed-xmos Nov 27, 2024
fb550af
Plumb in clock txclk for 1b
ed-xmos Nov 27, 2024
228b101
Label enums for easier compiler comparison
ed-xmos Nov 27, 2024
6c3dd7d
populate Tx pins for RMII with static inlines
ed-xmos Nov 27, 2024
88ead40
Comment about optimisation of clock start/stop
ed-xmos Nov 27, 2024
277e0ca
WIP MII Rx 4b with comments
ed-xmos Nov 27, 2024
916999c
Fix crc position in rmii_master_rx_pins_4b
ed-xmos Nov 28, 2024
a30f9bf
Do single clock stop (at start) for rmii_transmit_packet_1b
ed-xmos Nov 28, 2024
6305e2a
WIP rmii_master_rx_pins_4b tail handling
ed-xmos Nov 28, 2024
a37ab26
WIP rmii_master_rx_pins_1b
ed-xmos Nov 28, 2024
92badf9
enhance test_rmii_rt with sim loopback
ed-xmos Nov 28, 2024
5ec3b5a
WIP for S.K. testing
ed-xmos Nov 28, 2024
65be48d
Avoid spurious txen activity at startup
ed-xmos Nov 28, 2024
ad7c767
Typo in last commit
ed-xmos Nov 28, 2024
4488601
Fix non word 4b tx
ed-xmos Nov 28, 2024
91cdaa0
WIP Rx rmii_master_rx_pins_4b
ed-xmos Nov 28, 2024
feac7c8
Initial changes for adding RMII phy
Nov 29, 2024
9350c6d
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Nov 29, 2024
ccd6d58
CRC and tail handling fixed (need to add to buffer still)
ed-xmos Nov 29, 2024
f395a14
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Nov 29, 2024
9d20d8d
WIP rmii_master_rx_pins_4b CRC for tail
ed-xmos Nov 29, 2024
41730cb
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Nov 29, 2024
4981a49
Working rmii_master_rx_pins_4b CRC
ed-xmos Nov 29, 2024
8d19519
Comments & tidy
ed-xmos Nov 29, 2024
7d0e7fe
Start testing rmii rx
Nov 29, 2024
116531e
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Nov 29, 2024
3ff2337
Tidy and small optimisations of rx
ed-xmos Nov 30, 2024
9e3a779
App does for loop of packet lengths + custom XN for speed tests
ed-xmos Nov 30, 2024
9a2f5e6
Support all 4/1b permutations in build/sim
ed-xmos Dec 2, 2024
9aea4b0
Use 900MHz for now
ed-xmos Dec 2, 2024
0dd6dc9
1b WIP
ed-xmos Dec 2, 2024
c04c50f
Some tidy and WIP 1b Rx
ed-xmos Dec 2, 2024
5a7b2a3
Start writing test_rmii_tx properly
Dec 3, 2024
31ec69d
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Dec 3, 2024
0b7a4f4
Add run all script and fix printing
ed-xmos Dec 3, 2024
eb4b53c
Working 1b receive and rmii_master.xc tidy + remove debug print
ed-xmos Dec 3, 2024
655c745
Fix tx packets priority swap issue
shuchitak Dec 3, 2024
51aa58c
Run RMII at 50MHz (full speed) but set xcore to 800MHz for now
ed-xmos Dec 3, 2024
c3f20d2
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
ed-xmos Dec 3, 2024
70ac57e
Merge commit 'af6fb090c90f79fc0f585f7e87cdbf77ff2e8533' into feature/…
ed-xmos Dec 3, 2024
a3abfe2
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Dec 3, 2024
cb4910b
test high and low prio packet tx
Dec 3, 2024
d71c7d5
Get back to back tx working
Dec 3, 2024
f841671
Optimise from 28 to 18 cycles (works at 550MHz)
ed-xmos Dec 3, 2024
33638d3
Option to swap ports
ed-xmos Dec 4, 2024
264fbb9
400MHz XC 4b_rx
ed-xmos Dec 4, 2024
9006680
Re-arrange to hit 355MHz (fast mode, dual issue etc.)
ed-xmos Dec 4, 2024
10ad161
Get test_rmii_tx running for 4b(lower and upper) and 1b TX ports
Dec 4, 2024
5cf4950
Get other tests running
Dec 4, 2024
1a92c06
WIP ASM rmii_master_4x_pins_4b_body.S
ed-xmos Dec 4, 2024
124782e
Initial working single issue ASM
ed-xmos Dec 4, 2024
d21621c
Tidy of SI rx - 370MHz OK
ed-xmos Dec 4, 2024
fb701c0
Initial dual issue - 310MHz
ed-xmos Dec 4, 2024
9129d65
295MHz without fast_mode
ed-xmos Dec 4, 2024
77df47d
270MHz and tidy/comment
ed-xmos Dec 4, 2024
0133668
Comment only
ed-xmos Dec 4, 2024
9b2cdc7
Merge commit '5cf4950615fb6469adfe0c0359657d7b571211ed' into feature/…
ed-xmos Dec 4, 2024
bbdbe8a
Added RMII RX test. Only works with 25MHz clock freq though
Dec 5, 2024
5c3f460
Merge branch 'feature/rmii_opt' of github.com:xmos/lib_ethernet into …
Dec 5, 2024
c1bd2b6
Tidy and add buffer length check in 4b Rx at start
ed-xmos Dec 6, 2024
618cf15
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Dec 6, 2024
8c30b26
Spelling mistakes correct
ed-xmos Dec 6, 2024
b70add9
Better comments/labels in ASM
ed-xmos Dec 6, 2024
7adee66
Rewrote RMII transmitter and receiver sim thread to look at the 50MHz…
Dec 6, 2024
abd5f25
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Dec 6, 2024
13aca10
Added PacketManager class. Disable tracing
Dec 6, 2024
2a373a7
ASM comment only
ed-xmos Dec 6, 2024
02a696f
In the MII Clock class, define self._bit_time as a divided down versi…
Dec 6, 2024
ec8d173
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Dec 6, 2024
d754077
run rmii_rx (loopback) test with all combinations of tx and rx widths
Dec 6, 2024
95fc38d
Copyright
ed-xmos Dec 6, 2024
f11eb0c
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
ed-xmos Dec 6, 2024
a730b0f
Define RMII_ETHERNET_IFS_AS_REF_CLOCK_COUNT_1b and RMII_ETHERNET_IFS_…
Dec 6, 2024
8ceed28
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Dec 6, 2024
81a2177
Check for timer wraparound in rmii tx
Dec 6, 2024
211cba1
Add nop slots into ASM and run at 350MHz
ed-xmos Dec 9, 2024
00e1587
Remove MASTER_RX_CHUNK_TAIL/HEAD macros
ed-xmos Dec 9, 2024
47a95b7
Bring rx_1b into inline while(1) select for performance
ed-xmos Dec 9, 2024
e0c08df
Don't assum num_rx_bytes in 1b rx
ed-xmos Dec 9, 2024
6701b21
Simplify preamble check logic 1b rx
ed-xmos Dec 9, 2024
f4cbeaf
Added filler threads in test_rmii_tx and test_rmii_rx
Dec 9, 2024
7081176
Extend test_tx.py to run rmii configs
Dec 10, 2024
c354cb5
Comment and local test prog buffer size
ed-xmos Dec 10, 2024
78f1a0c
Merge branch 'feature/rmii_100m_rt' into feature/asm_wrap_rx
ed-xmos Dec 10, 2024
19ac0a6
Extend test_rx to run rmii configs
Dec 10, 2024
b2e9291
Merge branch 'feature/rmii_100m_rt' of github.com:ed-xmos/lib_etherne…
Dec 10, 2024
61a7d4a
Test program self checks
ed-xmos Dec 10, 2024
ee5b473
WIP update ASM
ed-xmos Dec 10, 2024
25bde38
Extend test_time_tx to test rmii configs
Dec 10, 2024
7df7d91
Extend test_timestamp_tx to test rmii configs
Dec 10, 2024
337da7b
Implement buffer write checking in ASM
ed-xmos Dec 11, 2024
99f0d0e
Tidy only
ed-xmos Dec 11, 2024
f7d75df
Merge branch 'feature/asm_wrap_rx' into feature/rmii_100m_rt
ed-xmos Dec 11, 2024
983602a
Don't skip rx tests for rmii
Dec 11, 2024
877b8d2
reorder the order in which ports are declared in rmii tests
Dec 11, 2024
54d1fba
Extend test_vlan_strip to test rmii configs
Dec 12, 2024
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Initial rmii_master.xc
  • Loading branch information
ed-xmos committed Nov 25, 2024
commit 82d3c1e9906ea946df2cb6a023ad1ce773230359
83 changes: 83 additions & 0 deletions lib_ethernet/src/rmii_master.xc
Original file line number Diff line number Diff line change
@@ -0,0 +1,83 @@
// Copyright 2024 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1.
#include "rmii_master.h"
#include <xs1.h>
#include <print.h>
#include <stdlib.h>
#include <syscall.h>
#include <xclib.h>
#include <hwtimer.h>
#include "mii_buffering.h"
#include "debug_print.h"
#include "default_ethernet_conf.h"
#include "mii_common_lld.h"
#include "string.h"

#define QUOTEAUX(x) #x
#define QUOTE(x) QUOTEAUX(x)

// As of the v12/13 xTIMEcomper tools. The compiler schedules code around a
// bit too much which violates the timing constraints. This change to the
// crc32 makes it a barrier to scheduling. This is not really
// recommended practice since it inhibits the compiler in a bit of a hacky way,
// but is perfectly safe.
#undef crc32
#define crc32(a, b, c) {__builtin_crc32(a, b, c); asm volatile (""::"r"(a):"memory");}


#ifndef ETHERNET_ENABLE_FULL_TIMINGS
#define ETHERNET_ENABLE_FULL_TIMINGS (1)
#endif

// Timing tuning constants
#define PAD_DELAY_RECEIVE 0
#define PAD_DELAY_TRANSMIT 0
#define CLK_DELAY_RECEIVE 0
#define CLK_DELAY_TRANSMIT 7 // Note: used to be 2 (improved simulator?)
// After-init delay (used at the end of mii_init)
#define PHY_INIT_DELAY 10000000

// The inter-frame gap is 96 bit times (1 clock tick at 100Mb/s). However,
// the EOF time stamp is taken when the last but one word goes into the
// transfer register, so that leaves 96 bits of data still to be sent
// on the wire (shift register word, transfer register word, crc word).
// In the case of a non word-aligned transfer compensation is made for
// that in the code at runtime.
// The adjustment is due to the fact that the instruction
// that reads the timer is the next instruction after the out at the
// end of the packet and the timer wait is an instruction before the
// out of the pre-amble
#define MII_ETHERNET_IFS_AS_REF_CLOCK_COUNT (96 + 96 - 9)


void rmii_master_init_rx_4b(in port p_clk,
in buffered port:32 * unsafe rx_data_0,
rmii_data_4b_pin_assignment_t rx_port_4b_pins,
in port p_rxdv,
clock rxclk){

}

void rmii_master_init_rx_1b(in port p_clk,
in buffered port:32 * unsafe rx_data_0,
in buffered port:32 * unsafe rx_data_1,
in port p_rxdv,
clock rxclk){

}

void rmii_master_init_tx_4b(in port p_clk,
out buffered port:32 * unsafe tx_data_0,
rmii_data_4b_pin_assignment_t tx_port_4b_pins,
out port p_txen,
clock txclk){

}

void rmii_master_init_tx_1b(in port p_clk,
out buffered port:32 * unsafe tx_data_0,
out buffered port:32 * unsafe tx_data_1,
out port p_txen,
clock txclk){

}